#include <pmi.h>
#include "ucs/type/class.h"
#include "uct/base/uct_pd.h"
#include <ucs/arch/cpu.h>
#include <uct/ugni/base/ugni_iface.h>
#include "ugni_rdma_iface.h"
#include "ugni_rdma_ep.h"
static ucs_config_field_t uct_ugni_rdma_iface_config_table[] = {
/* This tuning controls the allocation priorities for bouncing buffers */
{ "", "MAX_SHORT=2048;MAX_BCOPY=2048;ALLOC=huge,mmap,heap", NULL,
ucs_offsetof(uct_ugni_rdma_iface_config_t, super), UCS_CONFIG_TYPE_TABLE(uct_iface_config_table)},
UCT_IFACE_MPOOL_CONFIG_FIELDS("RDMA", -1, 0, "rdma",
ucs_offsetof(uct_ugni_rdma_iface_config_t, mpool),
"\nAttention: Setting this param with value != -1 is a dangerous thing\n"
"and could cause deadlock or performance degradation."),
{NULL}
};
static ucs_status_t uct_ugni_rdma_query_tl_resources(uct_pd_h pd,
uct_tl_resource_desc_t **resource_p,
unsigned *num_resources_p)
{
return uct_ugni_query_tl_resources(pd, UCT_UGNI_RDMA_TL_NAME,
resource_p, num_resources_p);
*/
#include <pmi.h>
#include "ucs/type/class.h"
#include <ucs/arch/cpu.h>
#include <uct/ugni/base/ugni_iface.h>
#include "ugni_smsg_iface.h"
#include "ugni_smsg_ep.h"
#define UCT_UGNI_SMSG_TL_NAME "ugni_smsg"
static ucs_config_field_t uct_ugni_smsg_iface_config_table[] = {
{"", "ALLOC=huge,mmap,heap", NULL,
ucs_offsetof(uct_ugni_iface_config_t, super),
UCS_CONFIG_TYPE_TABLE(uct_iface_config_table)},
UCT_IFACE_MPOOL_CONFIG_FIELDS("SMSG", -1, 0, "smsg",
ucs_offsetof(uct_ugni_iface_config_t, mpool),
"\nAttention: Setting this param with value != -1 is a dangerous thing\n"
"and could cause deadlock or performance degradation."),
{NULL}
};
static ucs_status_t progress_local_cq(uct_ugni_smsg_iface_t *iface){
gni_return_t ugni_rc;
gni_cq_entry_t event_data;
uct_ugni_smsg_desc_t message_data;
uct_ugni_smsg_desc_t *message_pointer;
#include <uct/ib/mlx5/ib_mlx5.h>
#include <uct/ib/mlx5/ib_mlx5_log.h>
#include <uct/ib/base/ib_device.h>
#include <uct/tl/context.h>
#include <ucs/debug/log.h>
#include "rc_mlx5.h"
#define UCT_RC_MLX5_SRQ_STRIDE (sizeof(struct mlx5_wqe_srq_next_seg) + \
sizeof(struct mlx5_wqe_data_seg))
ucs_config_field_t uct_rc_mlx5_iface_config_table[] = {
{"RC_", "", NULL,
ucs_offsetof(uct_rc_mlx5_iface_config_t, super), UCS_CONFIG_TYPE_TABLE(uct_rc_iface_config_table)},
{NULL}
};
#if ENABLE_STATS
ucs_stats_class_t uct_rc_mlx5_iface_stats_class = {
.name = "mlx5",
.num_counters = UCT_RC_MLX5_IFACE_STAT_LAST,
.counter_names = {
[UCT_RC_MLX5_IFACE_STAT_RX_INL_32] = "rx_inl_32",
[UCT_RC_MLX5_IFACE_STAT_RX_INL_64] = "rx_inl_64"
}
};
#endif
#include "gdr_copy_md.h"
#include <string.h>
#include <limits.h>
#include <ucs/debug/log.h>
#include <ucs/sys/sys.h>
#include <ucs/debug/memtrack.h>
#include <ucs/type/class.h>
#include <cuda_runtime.h>
#include <cuda.h>
#define UCT_GDR_COPY_MD_RCACHE_DEFAULT_ALIGN 65536
static ucs_config_field_t uct_gdr_copy_md_config_table[] = {
{"", "", NULL,
ucs_offsetof(uct_gdr_copy_md_config_t, super), UCS_CONFIG_TYPE_TABLE(uct_md_config_table)},
{"RCACHE", "try", "Enable using memory registration cache",
ucs_offsetof(uct_gdr_copy_md_config_t, enable_rcache), UCS_CONFIG_TYPE_TERNARY},
{"", "RCACHE_ADDR_ALIGN=" UCS_PP_MAKE_STRING(UCT_GDR_COPY_MD_RCACHE_DEFAULT_ALIGN), NULL,
ucs_offsetof(uct_gdr_copy_md_config_t, rcache),
UCS_CONFIG_TYPE_TABLE(uct_md_config_rcache_table)},
{"MEM_REG_OVERHEAD", "16us", "Memory registration overhead", /* TODO take default from device */
ucs_offsetof(uct_gdr_copy_md_config_t, uc_reg_cost.overhead), UCS_CONFIG_TYPE_TIME},
{"MEM_REG_GROWTH", "0.06ns", "Memory registration growth rate", /* TODO take default from device */
ucs_offsetof(uct_gdr_copy_md_config_t, uc_reg_cost.growth), UCS_CONFIG_TYPE_TIME},
{NULL}
#include "cm.h"
#include <uct/api/uct.h>
#include <uct/ib/base/ib_iface.h>
#include <uct/base/uct_pd.h>
#include <ucs/arch/atomic.h>
#include <ucs/async/async.h>
#include <ucs/debug/log.h>
#include <poll.h>
#include <infiniband/arch.h>
static ucs_config_field_t uct_cm_iface_config_table[] = {
{"IB_", "RX_INLINE=0", NULL,
ucs_offsetof(uct_cm_iface_config_t, super), UCS_CONFIG_TYPE_TABLE(uct_ib_iface_config_table)},
{"ASYNC_MODE", "thread", "Async mode to use",
ucs_offsetof(uct_cm_iface_config_t, async_mode), UCS_CONFIG_TYPE_ENUM(ucs_async_mode_names)},
{"TIMEOUT", "300ms", "Timeout for MAD layer",
ucs_offsetof(uct_cm_iface_config_t, timeout), UCS_CONFIG_TYPE_TIME},
{"RETRY_COUNT", "20", "Number of retries for MAD layer",
ucs_offsetof(uct_cm_iface_config_t, retry_count), UCS_CONFIG_TYPE_UINT},
{"MAX_OP", "1024", "Maximal number of outstanding SIDR operations",
ucs_offsetof(uct_cm_iface_config_t, max_outstanding), UCS_CONFIG_TYPE_UINT},
{NULL}
};
#include <uct/api/uct.h>
#include <uct/ib/base/ib_device.h>
#include <uct/ib/base/ib_log.h>
#include <uct/ib/mlx5/ib_mlx5_log.h>
#include <uct/base/uct_md.h>
#include <ucs/arch/bitops.h>
#include <ucs/arch/cpu.h>
#include <ucs/debug/log.h>
#include <string.h>
static ucs_config_field_t uct_dc_mlx5_iface_config_table[] = {
{"DC_", "", NULL,
ucs_offsetof(uct_dc_mlx5_iface_config_t, super),
UCS_CONFIG_TYPE_TABLE(uct_dc_iface_config_table)},
{"", "", NULL,
ucs_offsetof(uct_dc_mlx5_iface_config_t, ud_common),
UCS_CONFIG_TYPE_TABLE(uct_ud_mlx5_iface_common_config_table)},
{NULL}
};
static UCS_CLASS_INIT_FUNC(uct_dc_mlx5_ep_t, uct_iface_t *tl_iface,
const uct_device_addr_t *dev_addr,
const uct_iface_addr_t *iface_addr)
{
uct_dc_mlx5_iface_t *iface = ucs_derived_of(tl_iface, uct_dc_mlx5_iface_t);
const uct_ib_address_t *ib_addr = (const uct_ib_address_t *)dev_addr;
const uct_dc_iface_addr_t *if_addr = (const uct_dc_iface_addr_t *)iface_addr;
*/
#include "ib_pd.h"
#include "ib_device.h"
#define UCT_IB_PD_PREFIX "ib"
#define UCT_IB_MEM_ACCESS_FLAGS (IBV_ACCESS_LOCAL_WRITE | \
IBV_ACCESS_REMOTE_WRITE | \
IBV_ACCESS_REMOTE_READ | \
IBV_ACCESS_REMOTE_ATOMIC)
static ucs_config_field_t uct_ib_pd_config_table[] = {
{"", "", NULL,
ucs_offsetof(uct_ib_pd_config_t, super), UCS_CONFIG_TYPE_TABLE(uct_pd_config_table)},
{"RCACHE", "try", "Enable using memory registration cache",
ucs_offsetof(uct_ib_pd_config_t, rcache.enable), UCS_CONFIG_TYPE_TERNARY},
{"RCACHE_MEM_PRIO", "1000", "Registration cache memory event priority",
ucs_offsetof(uct_ib_pd_config_t, rcache.event_prio), UCS_CONFIG_TYPE_UINT},
{NULL}
};
#if ENABLE_STATS
static ucs_stats_class_t uct_ib_pd_stats_class = {
.name = "",
.num_counters = UCT_IB_PD_STAT_LAST,
.counter_names = {
