コード例 #1
0
ファイル: main.c プロジェクト: ansonb/CCS-codes-backup
//function definitions
void Clock_init(void)
{
	UCS_setExternalClockSource(
                               32768,
                               0);

    // Set Vcore to accomodate for max. allowed system speed
    PMM_setVCore(
    		PMM_CORE_LEVEL_3
                );

    // Use 32.768kHz XTAL as reference
    UCS_LFXT1Start(
        UCS_XT1_DRIVE0,
        UCS_XCAP_3
        );


    // Set system clock to max (25MHz)
    UCS_initFLLSettle(
    	25000,
        762
        );

    SFR_enableInterrupt(
                        SFR_OSCILLATOR_FAULT_INTERRUPT
                       );

    // Globally enable interrupts
    __enable_interrupt();
}
コード例 #2
0
ファイル: main.c プロジェクト: NHLBI-MR/PRiME
void initClocks()
{

	// Set core power mode

	PMM_setVCore(PMM_CORE_LEVEL_3);

    // Configure pins for crystals

    GPIO_setAsPeripheralModuleFunctionInputPin(
	GPIO_PORT_P5,
	GPIO_PIN4+GPIO_PIN2
    );

    GPIO_setAsPeripheralModuleFunctionOutputPin(
	GPIO_PORT_P5,
	GPIO_PIN5+GPIO_PIN3
    );

    // Inform the system of the crystal frequencies

    UCS_setExternalClockSource(
	   XT1_FREQ,  // Frequency of XT1 in Hz.
	   XT2_FREQ   // Frequency of XT2 in Hz.
    );

    // Initialize the crystals

    UCS_turnOnXT2( // used to be UCS_XT2Start in previous driverlib version
	   UCS_XT2_DRIVE_4MHZ_8MHZ
    );

    UCS_turnOnLFXT1( //used to be UCS_LFXT1Start in previous driverlib version
	   UCS_XT1_DRIVE_0,
	   UCS_XCAP_3
    );

	UCS_initClockSignal(
		  UCS_FLLREF,         // The reference for Frequency Locked Loop
	      UCS_XT2CLK_SELECT,  // Select XT2
	      UCS_CLOCK_DIVIDER_4 // The FLL reference will be 1 MHz (4MHz XT2/4)
	);

	// Start the FLL and let it settle
	// This becomes the MCLCK and SMCLK automatically

	UCS_initFLLSettle(
		MCLK_FREQ_KHZ,
		MCLK_FLLREF_RATIO
	);

   // Optional: set SMCLK to something else than full speed

	UCS_initClockSignal(
	   UCS_SMCLK,
	   UCS_DCOCLKDIV_SELECT,
	   UCS_CLOCK_DIVIDER_1
	);

	// Set auxiliary clock

	UCS_initClockSignal(
	   UCS_ACLK,
	   UCS_XT1CLK_SELECT,
	   UCS_CLOCK_DIVIDER_1
	);
}