//! 2.2.6.1 Write Value to Register
//!
//! @param dnRegNumber
//! @param drvValue
//!
USBDM_GDI_DECLSPEC
DiReturnT DiRegisterWrite ( DiUInt32T dnRegNumber,
DiRegisterValueT drvValue ) {
LOGGING;
U32c value(drvValue);
USBDM_ErrorCode rc = BDM_RC_OK;
log.print("DiRegisterWrite(0x%X(%d) <= 0x%08X)\n", dnRegNumber, dnRegNumber, (uint32_t)value);
CHECK_ERROR_STATE();
if (dnRegNumber > S12Z_RegCCR) {
return setErrorState(DI_ERR_PARAM, ("Illegal register identifier"));
}
rc = USBDM_WriteReg(dnRegNumber, value);
if ((dnRegNumber == S12Z_RegPC) && !pcWritten) {
log.print("Saving initial PC write = 0x%08X)\n", (uint32_t)value);
pcWritten = true;
pcResetValue = value;
}
if (rc != BDM_RC_OK) {
log.error("0x%X Failed, reason= %s\n",
dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
return setErrorState(DI_OK);
}
//! (CFv1) Write Core registers
//!
//! @param regNo Register #
//! @param value 32-bit value
//!
OSBDM_API void _opensourcebdm_write_reg(unsigned char regNo, unsigned int value) {
if (regNo>15) {// debugger tries to write to illegal registers !
print("_opensourcebdm_write_reg(%d,%X) - illegal register\r\n", regNo, value);
return;
}
USBDM_WriteReg(regNo, value);
}
//! 2.2.6.1 Write Value to Register
//!
//! @param dnRegNumber
//! @param drvValue
//!
USBDM_GDI_API
DiReturnT DiRegisterWrite ( DiUInt32T dnRegNumber,
DiRegisterValueT drvValue ) {
LOGGING;
U32c value(drvValue);
USBDM_ErrorCode rc = BDM_RC_OK;
// Logging::print("DiRegisterWrite(0x%X(%d) <= 0x%08X)\n", dnRegNumber, dnRegNumber, (uint32_t)value);
CHECK_ERROR_STATE();
if (dnRegNumber>cfv234regID_FIRST_DEBUG_REG) {
dnRegNumber -= cfv234regID_FIRST_DEBUG_REG;
Logging::print("DiRegisterWriteD(0x%X(%s) <= 0x%08X)\n", dnRegNumber, getCFVxDebugRegName(dnRegNumber), (uint32_t)value);
rc = USBDM_WriteDReg(dnRegNumber,value);
}
else if (dnRegNumber > cfv234regID_FIRST_CONTROL_REG) {
dnRegNumber -= cfv234regID_FIRST_CONTROL_REG;
Logging::print("DiRegisterWriteC(0x%X(%s) <= 0x%08X)\n", dnRegNumber, getCFVxControlRegName(dnRegNumber), (uint32_t)value);
rc = USBDM_WriteCReg(dnRegNumber,value);
}
else {
switch (dnRegNumber) {
case cfv234regID_pc :
Logging::print("DiRegisterWrite(0x%X(%s) <= 0x%08X)\n", CFVx_CRegPC, getCFVxControlRegName(CFVx_CRegPC), (uint32_t)value);
rc = USBDM_WriteCReg(CFVx_CRegPC,value);
break;
case cfv234regID_sr :
Logging::print("DiRegisterWrite(0x%X(%s) <= 0x%08X)\n", CFVx_CRegSR, getCFVxControlRegName(CFVx_CRegSR), (uint32_t)value);
rc = USBDM_WriteCReg(CFVx_CRegSR,value);
break;
default : // D0-7, A0-7
if (dnRegNumber<=cfv234regID_a7) {
Logging::print("DiRegisterWrite(0x%X(%s) <= 0x%08X)\n", dnRegNumber, getCFVxRegName(dnRegNumber), (uint32_t)value);
rc = USBDM_WriteReg(dnRegNumber,value);
}
else {
Logging::print("DiRegisterWrite(illegal reg# = 0x%X (%d)\n", dnRegNumber, dnRegNumber);
rc = BDM_RC_ILLEGAL_PARAMS;
}
break;
}
}
if (rc != BDM_RC_OK) {
// Logging::error("DiRegisterWrite(0x%X,%s) Failed, reason= %s\n",
// dnRegNumber, DSC_GetRegisterName(regNum), USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
return setErrorState(DI_OK);
}
//! (HCS12, HCS08 & RS08) Writes D=B:A (HCS12) or A (HCS08, RS08)
//!
//! @param value 16-bit / 8-bit value
//!
TBDML_API void _tbdml_write_reg_d(unsigned int value) {
USBDM_WriteReg(HCS12_RegD, value);
}
//! 2.2.6.1 Write Value to Register
//!
//! @param dnRegNumber
//! @param drvValue
//!
USBDM_GDI_DECLSPEC
DiReturnT DiRegisterWrite ( DiUInt32T dnRegNumber,
DiRegisterValueT drvValue ) {
LOGGING;
U32c value(drvValue);
USBDM_ErrorCode rc = BDM_RC_OK;
log.print("(0x%X(%d) <= 0x%08X)\n", dnRegNumber, dnRegNumber, (uint32_t)value);
CHECK_ERROR_STATE();
if (dnRegNumber>cfv1regID_FIRST_DEBUG_regID_BYTE) {
switch (dnRegNumber) {
case cfv1regID_xcsr_byte :
rc = USBDM_WriteControlReg(value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
"XCSR.byte", dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
break;
case cfv1regID_csr2_byte :
rc = USBDM_WriteDReg(CFV1_DRegCSR2byte,value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
"CSR2.byte", dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
break;
case cfv1regID_csr3_byte :
rc = USBDM_WriteDReg(CFV1_DRegCSR3byte,value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
"CSR3.byte", dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
break;
default :
log.print("DiRegisterWrite(Illegal Reg# 0x%X(%d)\n", dnRegNumber, dnRegNumber);
rc = BDM_RC_ILLEGAL_PARAMS;
break;
}
}
else if (dnRegNumber>cfv1regID_FIRST_DEBUG_REG) {
int regNum = dnRegNumber-cfv1regID_FIRST_DEBUG_REG;
rc = USBDM_WriteDReg(regNum,value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
getCFV1DebugRegName(regNum), dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
}
else if (dnRegNumber > cfv1regID_FIRST_CONTROL_REG) {
int regNum = dnRegNumber-cfv1regID_FIRST_CONTROL_REG;
rc = USBDM_WriteCReg(regNum,value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
getCFV1ControlRegName(regNum), dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
}
else {
switch (dnRegNumber) {
case cfv1regID_pc : /* PC */
if (!pcWritten) {
log.print("Saving initial PC write = 0x%08X)\n", (uint32_t)value);
pcWritten = true;
pcResetValue = value;
}
rc = USBDM_WriteCReg(CFV1_CRegPC,value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
"PC", dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
break;
case cfv1regID_sr :
rc = USBDM_WriteCReg(CFV1_CRegSR,value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
"SR", dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
break;
default : // D0-7, A0-7
if (dnRegNumber>15) {
log.print("DiRegisterWrite(Illegal Reg# 0x%X(%d)\n", dnRegNumber, dnRegNumber);
rc = BDM_RC_ILLEGAL_PARAMS;
}
else {
rc = USBDM_WriteReg(dnRegNumber,value);
if (rc != BDM_RC_OK) {
log.print("DiRegisterWrite(%s(0x%X)) Failed, reason= %s\n",
getCFV1RegName(dnRegNumber), dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
}
break;
}
}
if (rc != BDM_RC_OK) {
log.error("0x%X Failed, reason= %s\n",
dnRegNumber, USBDM_GetErrorString(rc));
return setErrorState(DI_ERR_NONFATAL, rc);
}
return setErrorState(DI_OK);
}
USBDM_ErrorCode BdmInterface_RS08::writePC(unsigned long regValue) {
return USBDM_WriteReg(RS08_RegCCR_PC, regValue);
};
//! 2.2.8.2 Execute a Single Step
//!
//! @param dnNrInstructions
//!
USBDM_GDI_DECLSPEC
DiReturnT DiExecSingleStep ( DiUInt32T dnNrInstructions ) {
LOGGING_Q;
log.print("(%d)\n", dnNrInstructions);
USBDM_ErrorCode BDMrc;
long unsigned ccrValue;
long unsigned pcValue;
unsigned char currentOpcode;
const int interruptMask = (1<<3);
const int tapOpcode = 0x84;
const int tpaOpcode = 0x85;
const int seiOpcode = 0x9B;
const int cliOpcode = 0x9A;
const int waitOpcode = 0x8F;
const int rtiOpcode = 0x80;
const int swiOpcode = 0x83;
const int stopOpcode = 0x8E;
CHECK_ERROR_STATE();
#if (TARGET == MC56F80xx)
BDMrc = DSC_TargetStepN(dnNrInstructions);
#else
if (dnNrInstructions>1) {
log.print("DiExecSingleStep() - Only a single step is supported!\n");
return setErrorState(DI_ERR_PARAM, ("Only a single step is allowed"));
}
/*
* Cases to consider when masking interrupts during step
*
* +--------+-----------+---------+-----------------------------------------------------+
* | Opcode | Initial I | Final I | Problem - action |
* +--------+-----------+---------+-----------------------------------------------------+
* | --- | 1 | X | None - no action (interrupts already masked) |
* +--------+-----------+---------+-----------------------------------------------------+
* | CLI | 0 | ? | It may be possible for an interrupt to occur, |
* | WAIT | | | setting I-flag which is then incorrectly cleared. |
* | STOP | | | (I don't think it applies to CLI but be safe.) |
* | SWI | | | - don't 'fix' CCR |
* +--------+-----------+---------+-----------------------------------------------------+
* | RTI | 0 | 1 | Contrived but possible situation. I flag |
* | | | | incorrectly cleared - don't 'fix' CCR |
* +--------+-----------+---------+-----------------------------------------------------+
* | SEI | 0 | 1 | The instruction may set I-flag which is then |
* | TAP | 0 | 1 | incorrectly cleared - don't 'fix' CCR |
* +--------+-----------+---------+-----------------------------------------------------+
* | TPA | 0 | X | The wrong value is transferred to A - fix A |
* +--------+-----------+---------+-----------------------------------------------------+
* | --- | 0 | 0 | CCR change - clear I-flag in new CCR |
* +--------+-----------+---------+-----------------------------------------------------+
*/
if (bdmOptions.maskInterrupts) {
log.print("DiExecSingleStep() - checking if interrupt masking needed\n");
USBDM_ReadReg(HCS08_RegCCR, &ccrValue);
if ((ccrValue&interruptMask) != 0) {
// Interrupts already masked - just step
BDMrc = USBDM_TargetStep();
}
else {
// Mask interrupts
log.print("DiExecSingleStep() - masking interrupts\n");
USBDM_WriteReg(HCS08_RegCCR, ccrValue|interruptMask);
// Get current instruction opcode
USBDM_ReadReg(HCS08_RegPC, &pcValue);
USBDM_ReadMemory(1,1,pcValue,¤tOpcode);
// Do a step
BDMrc = USBDM_TargetStep();
switch(currentOpcode) {
case cliOpcode :
case waitOpcode :
case seiOpcode :
case tapOpcode :
case rtiOpcode :
case swiOpcode : // Not ever stepped - treated as subroutine?
case stopOpcode :
log.print("DiExecSingleStep() - skipping CCR restore\n");
// Don't 'fix' CCR as updated by instruction or int ack
break;
case tpaOpcode :
// Fix A & CCR (clear I flag)
log.print("DiExecSingleStep() - fixing A & CCR reg\n");
USBDM_WriteReg(HCS08_RegA, ccrValue&~interruptMask);
USBDM_WriteReg(HCS08_RegCCR, ccrValue&~interruptMask);
break;
default :
// Fix CCR (clear I flag)
// Unmask interrupts
log.print("DiExecSingleStep() - fixing CCR reg\n");
USBDM_ReadReg(HCS08_RegCCR, &ccrValue);
USBDM_WriteReg(HCS08_RegCCR, ccrValue&~interruptMask);
break;
}
}
}
else
BDMrc = USBDM_TargetStep();
#endif
if (BDMrc != BDM_RC_OK) {
return setErrorState(DI_ERR_NONFATAL, BDMrc);
}
return setErrorState(DI_OK);
}
USBDM_ErrorCode BdmInterface_ARM::writePC(unsigned long regValue) {
return USBDM_WriteReg(ARM_RegPC, regValue);
}
//! (HCS12 & HCS08) Writes CCR
//!
//! @param value 8-bit value
//!
OSBDM_API void _opensourcebdm_write_reg_ccr(unsigned int value) {
USBDM_WriteReg(HCS08_RegCCR, value);
}
