void Dar_BalanceUniqify( Aig_Obj_t * pObj, Vec_Ptr_t * vNodes, int fExor )
{
Aig_Obj_t * pTemp, * pTempNext;
int i, k;
// sort the nodes by their literal
Vec_PtrSort( vNodes, (int (*)())Dar_ObjCompareLits );
// remove duplicates
k = 0;
Vec_PtrForEachEntry( Aig_Obj_t *, vNodes, pTemp, i )
{
if ( i + 1 == Vec_PtrSize(vNodes) )
{
Vec_PtrWriteEntry( vNodes, k++, pTemp );
break;
}
pTempNext = (Aig_Obj_t *)Vec_PtrEntry( vNodes, i+1 );
if ( !fExor && pTemp == Aig_Not(pTempNext) ) // pos_lit & neg_lit = 0
{
Vec_PtrClear( vNodes );
return;
}
if ( pTemp != pTempNext ) // save if different
Vec_PtrWriteEntry( vNodes, k++, pTemp );
else if ( fExor ) // in case of XOR, remove identical
i++;
}
Vec_PtrShrink( vNodes, k );
// check that there is no duplicates
pTemp = (Aig_Obj_t *)Vec_PtrEntry( vNodes, 0 );
Vec_PtrForEachEntryStart( Aig_Obj_t *, vNodes, pTempNext, i, 1 )
{
assert( pTemp != pTempNext );
pTemp = pTempNext;
}
}
/**Function*************************************************************
Synopsis [Computes and adds all single-cube divisors to storage.]
Description [This procedure should be called once when the matrix is
already contructed before the process of logic extraction begins..]
SideEffects []
SeeAlso []
***********************************************************************/
void Fxu_MatrixComputeSingles( Fxu_Matrix * p, int fUse0, int nSingleMax )
{
Fxu_Var * pVar;
Vec_Ptr_t * vSingles;
int i, k;
// set the weight limit
p->nWeightLimit = 1 - fUse0;
// iterate through columns in the matrix and collect single-cube divisors
vSingles = Vec_PtrAlloc( 10000 );
Fxu_MatrixForEachVariable( p, pVar )
Fxu_MatrixComputeSinglesOneCollect( p, pVar, vSingles );
p->nSingleTotal = Vec_PtrSize(vSingles) / 3;
// check if divisors should be filtered
if ( Vec_PtrSize(vSingles) > nSingleMax )
{
int * pWeigtCounts, nDivCount, Weight, i, c;;
assert( Vec_PtrSize(vSingles) % 3 == 0 );
// count how many divisors have the given weight
pWeigtCounts = ABC_ALLOC( int, 1000 );
memset( pWeigtCounts, 0, sizeof(int) * 1000 );
for ( i = 2; i < Vec_PtrSize(vSingles); i += 3 )
{
Weight = (int)(ABC_PTRUINT_T)Vec_PtrEntry(vSingles, i);
if ( Weight >= 999 )
pWeigtCounts[999]++;
else
pWeigtCounts[Weight]++;
}
// select the bound on the weight (above this bound, singles will be included)
nDivCount = 0;
for ( c = 999; c >= 0; c-- )
{
nDivCount += pWeigtCounts[c];
if ( nDivCount >= nSingleMax )
break;
}
ABC_FREE( pWeigtCounts );
// collect singles with the given costs
k = 0;
for ( i = 2; i < Vec_PtrSize(vSingles); i += 3 )
{
Weight = (int)(ABC_PTRUINT_T)Vec_PtrEntry(vSingles, i);
if ( Weight < c )
continue;
Vec_PtrWriteEntry( vSingles, k++, Vec_PtrEntry(vSingles, i-2) );
Vec_PtrWriteEntry( vSingles, k++, Vec_PtrEntry(vSingles, i-1) );
Vec_PtrWriteEntry( vSingles, k++, Vec_PtrEntry(vSingles, i) );
if ( k/3 == nSingleMax )
break;
}
Vec_PtrShrink( vSingles, k );
// adjust the weight limit
p->nWeightLimit = c;
}
/**Function*************************************************************
Synopsis [Returns the array of constraint candidates.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Llb_ManComputeIndCase( Aig_Man_t * p, DdManager * dd, Vec_Int_t * vNodes )
{
Vec_Ptr_t * vBdds;
Aig_Obj_t * pObj;
DdNode * bFunc;
int i, Entry;
vBdds = Vec_PtrStart( Aig_ManObjNumMax(p) );
bFunc = Cudd_ReadOne(dd); Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Aig_ObjId(Aig_ManConst1(p)), bFunc );
Saig_ManForEachPi( p, pObj, i )
{
bFunc = Cudd_bddIthVar( dd, Aig_ManPiNum(p) + i ); Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Aig_ObjId(pObj), bFunc );
}
/**Function*************************************************************
Synopsis [Converts combinational AIG with latches into sequential AIG.]
Description [The const/PI/PO nodes are duplicated. The internal
nodes are duplicated in the topological order. The dangling nodes
are not duplicated. The choice nodes are duplicated.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkAigToSeq( Abc_Ntk_t * pNtk )
{
Abc_Ntk_t * pNtkNew;
Abc_Obj_t * pObj, * pFaninNew;
Vec_Int_t * vInitValues;
Abc_InitType_t Init;
int i, k, RetValue;
// make sure it is an AIG without self-feeding latches
assert( Abc_NtkIsStrash(pNtk) );
assert( Abc_NtkIsDfsOrdered(pNtk) );
if ( RetValue = Abc_NtkRemoveSelfFeedLatches(pNtk) )
printf( "Modified %d self-feeding latches. The result will not verify.\n", RetValue );
assert( Abc_NtkCountSelfFeedLatches(pNtk) == 0 );
// start the network
pNtkNew = Abc_NtkAlloc( ABC_NTK_SEQ, ABC_FUNC_AIG, 1 );
// duplicate the name and the spec
pNtkNew->pName = Extra_UtilStrsav(pNtk->pName);
pNtkNew->pSpec = Extra_UtilStrsav(pNtk->pSpec);
// map the constant nodes
Abc_NtkCleanCopy( pNtk );
Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pNtkNew);
// copy all objects, except the latches and constant
Vec_PtrFill( pNtkNew->vObjs, Abc_NtkObjNumMax(pNtk), NULL );
Vec_PtrWriteEntry( pNtkNew->vObjs, 0, Abc_AigConst1(pNtk)->pCopy );
Abc_NtkForEachObj( pNtk, pObj, i )
{
if ( i == 0 || Abc_ObjIsLatch(pObj) )
continue;
pObj->pCopy = Abc_ObjAlloc( pNtkNew, pObj->Type );
pObj->pCopy->Id = pObj->Id; // the ID is the same for both
pObj->pCopy->fPhase = pObj->fPhase; // used to work with choices
pObj->pCopy->Level = pObj->Level; // used for upper bound on clock cycle
Vec_PtrWriteEntry( pNtkNew->vObjs, pObj->pCopy->Id, pObj->pCopy );
pNtkNew->nObjs++;
}
pNtkNew->nObjCounts[ABC_OBJ_NODE] = pNtk->nObjCounts[ABC_OBJ_NODE];
// create PI/PO and their names
Abc_NtkForEachPi( pNtk, pObj, i )
{
Vec_PtrPush( pNtkNew->vPis, pObj->pCopy );
Vec_PtrPush( pNtkNew->vCis, pObj->pCopy );
Abc_ObjAssignName( pObj->pCopy, Abc_ObjName(pObj), NULL );
}
/**Function*************************************************************
Synopsis [Deletes the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ivy_ObjDelete( Ivy_Man_t * p, Ivy_Obj_t * pObj, int fFreeTop )
{
assert( !Ivy_IsComplement(pObj) );
assert( Ivy_ObjRefs(pObj) == 0 || !fFreeTop );
// update node counters of the manager
p->nObjs[pObj->Type]--;
p->nDeleted++;
// remove connections
Ivy_ObjDisconnect( p, pObj );
// remove PIs/POs from the arrays
if ( Ivy_ObjIsPi(pObj) )
Vec_PtrRemove( p->vPis, pObj );
else if ( Ivy_ObjIsPo(pObj) )
Vec_PtrRemove( p->vPos, pObj );
else if ( p->fFanout && Ivy_ObjIsBuf(pObj) )
Vec_PtrRemove( p->vBufs, pObj );
// clean and recycle the entry
if ( fFreeTop )
{
// free the node
Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
Ivy_ManRecycleMemory( p, pObj );
}
else
{
int nRefsOld = pObj->nRefs;
Ivy_Obj_t * pFanout = pObj->pFanout;
Ivy_ObjClean( pObj );
pObj->pFanout = pFanout;
pObj->nRefs = nRefsOld;
}
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Starts the Mv-Var manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkStartMvVars( Abc_Ntk_t * pNtk )
{
Vec_Att_t * pAttMan;
assert( Abc_NtkMvVar(pNtk) == NULL );
pAttMan = Vec_AttAlloc( Abc_NtkObjNumMax(pNtk) + 1, Mem_FlexStart(), (void(*)(void*))Mem_FlexStop, NULL, NULL );
Vec_PtrWriteEntry( pNtk->vAttrs, VEC_ATTR_MVVAR, pAttMan );
//printf( "allocing attr\n" );
}
/**Function*************************************************************
Synopsis [ Given a node, evaluate its cuts and save the best one ]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Rewrite_NodeRewrite( Mig_Man_t * pMig, Rewrite_Man_t * p, Cut_Man_t * pManCut, Mig_Obj_t * pNode, Cut_Cut_t * pCut, int fUpdateLevel )
{
Gra_Graph_t * pGraph;
Mig_Obj_t * pFanin;
unsigned uPhase;
unsigned uTruthBest = 0;
unsigned uTruth;
char * pPerm;
int Required, nNodesSaved, nNodesSaveCur = -1;
int i, GainCur = -1, GainBest = -1;
Required = fUpdateLevel ? Mig_ObjRequiredLevel(pMig, pNode) : ABC_INFINITY;
// triv cut is omitted
for ( pCut = pCut->pNext; pCut; pCut = pCut->pNext )
{
if ( pCut->nLeaves < 4 ) continue;
// NPN conditions
uTruth = 0xFFFF & *Cut_CutReadTruth(pCut);
pPerm = p->pPerms4[ (int)p->pPerms[uTruth] ];
uPhase = p->pPhases[uTruth];
// collect fanin nodes
Vec_PtrClear( p->vFaninsCur );
Vec_PtrFill( p->vFaninsCur, (int)pCut->nLeaves, 0 );
for ( i = 0; i < (int)pCut->nLeaves; i++ )
{
pFanin = Mig_ManObj( pMig, pCut->pLeaves[(int)pPerm[i]] );
if( pFanin == NULL ) break;
//assert( pFanin ); // bad cut condition-> fanin may be removed
pFanin = Mig_NotCond( pFanin, ((uPhase & (1<<i)) > 0) );
Vec_PtrWriteEntry( p->vFaninsCur, i, pFanin );
}
if ( i != (int)pCut->nLeaves ) continue; // bad cut: fanin is removed
// 1. mark boundary 2. mark MFFC 3.recover boundary
Vec_PtrForEachEntry( Mig_Obj_t *, p->vFaninsCur, pFanin, i )
Mig_Regular(pFanin)->vFanouts.nSize++;
Mig_ManIncTravId( pMig );
nNodesSaved = Mig_NodeMffcLabelMig( pMig, pNode );
Vec_PtrForEachEntry( Mig_Obj_t *, p->vFaninsCur, pFanin, i )
Mig_Regular(pFanin)->vFanouts.nSize--;
// evaluate the cut
pGraph = Rewrite_CutEvaluate( pMig, p, pNode, pCut, nNodesSaved, &GainCur, Required, 0xFFFF );
if( pGraph != NULL && GainBest < GainCur )
{
nNodesSaveCur = nNodesSaved;
GainBest = GainCur;
p->pGraph = pGraph;
p->fCompl = ((uPhase & (1<<4)) > 0 );
uTruthBest = 0xFFFF & *Cut_CutReadTruth(pCut);
Vec_PtrClear( p->vFanins );
Vec_PtrForEachEntry( Mig_Obj_t *, p->vFaninsCur, pFanin, i )
Vec_PtrPush( p->vFanins, pFanin );
}
}
/**Function*************************************************************
Synopsis [Reproduces script "compress2".]
Description [Consumes the input AIG to reduce memory usage.]
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Dar_ManChoiceNewAig( Aig_Man_t * pAig, Dch_Pars_t * pPars )
{
// extern Aig_Man_t * Dch_DeriveTotalAig( Vec_Ptr_t * vAigs );
extern Aig_Man_t * Dch_ComputeChoices( Aig_Man_t * pAig, Dch_Pars_t * pPars );
int fVerbose = pPars->fVerbose;
Aig_Man_t * pMan, * pTemp;
Vec_Ptr_t * vAigs;
Vec_Ptr_t * vPios;
void * pManTime;
char * pName, * pSpec;
int i;
abctime clk;
clk = Abc_Clock();
vAigs = Dar_ManChoiceSynthesis( pAig, 1, 1, pPars->fPower, fVerbose );
pPars->timeSynth = Abc_Clock() - clk;
// swap the first and last network
// this should lead to the primary choice being "better" because of synthesis
// (it is also important when constructing choices)
pMan = (Aig_Man_t *)Vec_PtrPop( vAigs );
Vec_PtrPush( vAigs, Vec_PtrEntry(vAigs,0) );
Vec_PtrWriteEntry( vAigs, 0, pMan );
// derive the total AIG
pMan = Dch_DeriveTotalAig( vAigs );
// cleanup
Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
Aig_ManStop( pTemp );
Vec_PtrFree( vAigs );
// compute choices
pMan = Dch_ComputeChoices( pTemp = pMan, pPars );
Aig_ManStop( pTemp );
// save useful things
pManTime = pAig->pManTime; pAig->pManTime = NULL;
pName = Abc_UtilStrsav( pAig->pName );
pSpec = Abc_UtilStrsav( pAig->pSpec );
// create guidence
vPios = Aig_ManOrderPios( pMan, pAig );
Aig_ManStop( pAig );
// reconstruct the network
pMan = Aig_ManDupDfsGuided( pTemp = pMan, vPios );
Aig_ManStop( pTemp );
Vec_PtrFree( vPios );
// reset levels
pMan->pManTime = pManTime;
Aig_ManChoiceLevel( pMan );
// copy names
ABC_FREE( pMan->pName );
ABC_FREE( pMan->pSpec );
pMan->pName = pName;
pMan->pSpec = pSpec;
return pMan;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cov_Man_t * Cov_ManAlloc( Abc_Ntk_t * pNtk, int nFaninMax )
{
Cov_Man_t * pMan;
Cov_Obj_t * pMem;
Abc_Obj_t * pObj;
int i;
assert( pNtk->pManCut == NULL );
// start the manager
pMan = ABC_ALLOC( Cov_Man_t, 1 );
memset( pMan, 0, sizeof(Cov_Man_t) );
pMan->nFaninMax = nFaninMax;
pMan->nCubesMax = 2 * pMan->nFaninMax;
pMan->nWords = Abc_BitWordNum( nFaninMax * 2 );
// get the cubes
pMan->vComTo0 = Vec_IntAlloc( 2*nFaninMax );
pMan->vComTo1 = Vec_IntAlloc( 2*nFaninMax );
pMan->vPairs0 = Vec_IntAlloc( nFaninMax );
pMan->vPairs1 = Vec_IntAlloc( nFaninMax );
pMan->vTriv0 = Vec_IntAlloc( 1 ); Vec_IntPush( pMan->vTriv0, -1 );
pMan->vTriv1 = Vec_IntAlloc( 1 ); Vec_IntPush( pMan->vTriv1, -1 );
// allocate memory for object structures
pMan->pMemory = pMem = ABC_ALLOC( Cov_Obj_t, sizeof(Cov_Obj_t) * Abc_NtkObjNumMax(pNtk) );
memset( pMem, 0, sizeof(Cov_Obj_t) * Abc_NtkObjNumMax(pNtk) );
// allocate storage for the pointers to the memory
pMan->vObjStrs = Vec_PtrAlloc( Abc_NtkObjNumMax(pNtk) );
Vec_PtrFill( pMan->vObjStrs, Abc_NtkObjNumMax(pNtk), NULL );
Abc_NtkForEachObj( pNtk, pObj, i )
Vec_PtrWriteEntry( pMan->vObjStrs, i, pMem + i );
// create the cube manager
pMan->pManMin = Min_ManAlloc( nFaninMax );
return pMan;
}
/**Function*************************************************************
Synopsis [This procedure transforms tech-ind Ptr into mapped Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PtrUpdateBox( Vec_Ptr_t * vBox, Vec_Ptr_t * vGatesNames )
{
Mio_Gate_t * pGate; Mio_Pin_t * pPin; int i = 1;
Mio_Library_t * pLib = (Mio_Library_t *)Abc_FrameReadLibGen( Abc_FrameGetGlobalFrame() );
// update gate name
char * pNameNew, * pName = (char *)Vec_PtrEntry(vBox, 0);
if ( !strcmp(pName, "Const0T") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_C0);
else if ( !strcmp(pName, "Const1T") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_C1);
else if ( !strcmp(pName, "BufT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_BUF);
else if ( !strcmp(pName, "InvT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_INV);
else if ( !strcmp(pName, "AndT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_AND);
else if ( !strcmp(pName, "NandT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_NAND);
else if ( !strcmp(pName, "OrT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_OR);
else if ( !strcmp(pName, "NorT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_NOR);
else if ( !strcmp(pName, "XorT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_XOR);
else if ( !strcmp(pName, "XnorT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_XNOR);
else // user hierarchy
return;
ABC_FREE( pName );
Vec_PtrWriteEntry( vBox, 0, Abc_UtilStrsav(pNameNew) );
// remove instance name
pName = (char *)Vec_PtrEntry(vBox, 1);
ABC_FREE( pName );
Vec_PtrWriteEntry( vBox, 1, NULL );
// update formal input names
pGate = Mio_LibraryReadGateByName( pLib, pNameNew, NULL );
Mio_GateForEachPin( pGate, pPin )
{
pName = (char *)Vec_PtrEntry( vBox, 2 * i );
ABC_FREE( pName );
pNameNew = Mio_PinReadName(pPin);
Vec_PtrWriteEntry( vBox, 2 * i++, Abc_UtilStrsav(pNameNew) );
}
/**Function*************************************************************
Synopsis [Deletes the node.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Aig_ObjDelete( Aig_Man_t * p, Aig_Obj_t * pObj )
{
assert( !Aig_IsComplement(pObj) );
assert( !Aig_ObjIsTerm(pObj) );
assert( Aig_ObjRefs(pObj) == 0 );
if ( p->pFanData && Aig_ObjIsBuf(pObj) )
Vec_PtrRemove( p->vBufs, pObj );
p->nObjs[pObj->Type]--;
Vec_PtrWriteEntry( p->vObjs, pObj->Id, NULL );
Aig_ManRecycleMemory( p, pObj );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Io_ReadBlifReorderFormalNames( Vec_Ptr_t * vTokens, Mio_Gate_t * pGate )
{
Mio_Pin_t * pGatePin;
char * pName, * pNamePin;
int i, k, nSize, Length;
nSize = Vec_PtrSize(vTokens);
if ( nSize - 3 != Mio_GateReadInputs(pGate) )
return 0;
// check if the names are in order
for ( pGatePin = Mio_GateReadPins(pGate), i = 0; pGatePin; pGatePin = Mio_PinReadNext(pGatePin), i++ )
{
pNamePin = Mio_PinReadName(pGatePin);
Length = strlen(pNamePin);
pName = (char *)Vec_PtrEntry(vTokens, i+2);
if ( !strncmp( pNamePin, pName, Length ) && pName[Length] == '=' )
continue;
break;
}
if ( i == nSize - 3 )
return 1;
// reorder the pins
for ( pGatePin = Mio_GateReadPins(pGate), i = 0; pGatePin; pGatePin = Mio_PinReadNext(pGatePin), i++ )
{
pNamePin = Mio_PinReadName(pGatePin);
Length = strlen(pNamePin);
for ( k = 2; k < nSize; k++ )
{
pName = (char *)Vec_PtrEntry(vTokens, k);
if ( !strncmp( pNamePin, pName, Length ) && pName[Length] == '=' )
{
Vec_PtrPush( vTokens, pName );
break;
}
}
}
pNamePin = Mio_GateReadOutName(pGate);
Length = strlen(pNamePin);
for ( k = 2; k < nSize; k++ )
{
pName = (char *)Vec_PtrEntry(vTokens, k);
if ( !strncmp( pNamePin, pName, Length ) && pName[Length] == '=' )
{
Vec_PtrPush( vTokens, pName );
break;
}
}
if ( Vec_PtrSize(vTokens) - nSize != nSize - 2 )
return 0;
Vec_PtrForEachEntryStart( char *, vTokens, pName, k, nSize )
Vec_PtrWriteEntry( vTokens, k - nSize + 2, pName );
Vec_PtrShrink( vTokens, nSize );
return 1;
}
/**Function*************************************************************
Synopsis [Derive BDD of the characteristic function.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Abc_ResBuildBdd( Abc_Ntk_t * pNtk, DdManager * dd )
{
Vec_Ptr_t * vNodes, * vBdds, * vLocals;
Abc_Obj_t * pObj, * pFanin;
DdNode * bFunc, * bPart, * bTemp, * bVar;
int i, k;
assert( Abc_NtkIsSopLogic(pNtk) );
assert( Abc_NtkCoNum(pNtk) <= 3 );
vBdds = Vec_PtrStart( Abc_NtkObjNumMax(pNtk) );
Abc_NtkForEachCi( pNtk, pObj, i )
Vec_PtrWriteEntry( vBdds, Abc_ObjId(pObj), Cudd_bddIthVar(dd, i) );
// create internal node BDDs
vNodes = Abc_NtkDfs( pNtk, 0 );
vLocals = Vec_PtrAlloc( 6 );
Vec_PtrForEachEntry( Abc_Obj_t *, vNodes, pObj, i )
{
if ( Abc_ObjFaninNum(pObj) == 0 )
{
bFunc = Cudd_NotCond( Cudd_ReadOne(dd), Abc_SopIsConst0((char *)pObj->pData) ); Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Abc_ObjId(pObj), bFunc );
continue;
}
Vec_PtrClear( vLocals );
Abc_ObjForEachFanin( pObj, pFanin, k )
Vec_PtrPush( vLocals, Vec_PtrEntry(vBdds, Abc_ObjId(pFanin)) );
bFunc = Abc_ConvertSopToBdd( dd, (char *)pObj->pData, (DdNode **)Vec_PtrArray(vLocals) ); Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Abc_ObjId(pObj), bFunc );
}
Vec_PtrFree( vLocals );
// create char function
bFunc = Cudd_ReadOne( dd ); Cudd_Ref( bFunc );
Abc_NtkForEachCo( pNtk, pObj, i )
{
bVar = Cudd_bddIthVar( dd, i + Abc_NtkCiNum(pNtk) );
bTemp = (DdNode *)Vec_PtrEntry( vBdds, Abc_ObjFaninId0(pObj) );
bPart = Cudd_bddXnor( dd, bTemp, bVar ); Cudd_Ref( bPart );
bFunc = Cudd_bddAnd( dd, bTemp = bFunc, bPart ); Cudd_Ref( bFunc );
Cudd_RecursiveDeref( dd, bTemp );
Cudd_RecursiveDeref( dd, bPart );
}
/**Function*************************************************************
Synopsis [Implements the function.]
Description [Returns the node implementing this function.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Obj_t * Lpk_Implement( Lpk_Man_t * pMan, Abc_Ntk_t * pNtk, Vec_Ptr_t * vLeaves, int nLeavesOld )
{
Abc_Obj_t * pFanin, * pRes;
int i;
assert( nLeavesOld < Vec_PtrSize(vLeaves) );
// mark implemented nodes
Vec_PtrForEachEntryStop( Abc_Obj_t *, vLeaves, pFanin, i, nLeavesOld )
Vec_PtrWriteEntry( vLeaves, i, Abc_ObjNot(pFanin) );
// recursively construct starting from the first entry
pRes = Lpk_Implement_rec( pMan, pNtk, vLeaves, (Lpk_Fun_t *)Vec_PtrEntry( vLeaves, nLeavesOld ) );
Vec_PtrShrink( vLeaves, nLeavesOld );
return pRes;
}
/**Function*************************************************************
Synopsis [Reproduces script "compress2".]
Description [Takes AIG manager, consumes it, and produces GIA manager.]
SideEffects []
SeeAlso []
***********************************************************************/
Gia_Man_t * Dar_NewChoiceSynthesis( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fPower, int fLightSynth, int fVerbose )
//alias resyn "b; rw; rwz; b; rwz; b"
//alias resyn2 "b; rw; rf; b; rw; rwz; b; rfz; rwz; b"
{
Vec_Ptr_t * vGias;
Gia_Man_t * pGia, * pTemp;
int i;
if ( fUpdateLevel && Dar_NewChoiceSynthesisGuard(pAig) )
{
if ( fVerbose )
printf( "Warning: Due to high fanout count of some nodes, level updating is disabled.\n" );
fUpdateLevel = 0;
}
vGias = Vec_PtrAlloc( 3 );
pGia = Gia_ManFromAig(pAig);
Vec_PtrPush( vGias, pGia );
pAig = Dar_NewCompress( pAig, fBalance, fUpdateLevel, fPower, fVerbose );
pGia = Gia_ManFromAig(pAig);
Vec_PtrPush( vGias, pGia );
//Aig_ManPrintStats( pAig );
pAig = Dar_NewCompress2( pAig, fBalance, fUpdateLevel, 1, fPower, fLightSynth, fVerbose );
pGia = Gia_ManFromAig(pAig);
Vec_PtrPush( vGias, pGia );
//Aig_ManPrintStats( pAig );
Aig_ManStop( pAig );
// swap around the first and the last
pTemp = (Gia_Man_t *)Vec_PtrPop( vGias );
Vec_PtrPush( vGias, Vec_PtrEntry(vGias,0) );
Vec_PtrWriteEntry( vGias, 0, pTemp );
// Aig_Man_t * pAig;
// int i;
// printf( "Choicing will be performed with %d AIGs:\n", Vec_PtrSize(p->vAigs) );
// Vec_PtrForEachEntry( Aig_Man_t *, p->vAigs, pAig, i )
// Aig_ManPrintStats( pAig );
// derive the miter
pGia = Gia_ManChoiceMiter( vGias );
// cleanup
Vec_PtrForEachEntry( Gia_Man_t *, vGias, pTemp, i )
Gia_ManStop( pTemp );
Vec_PtrFree( vGias );
return pGia;
}
/**Function*************************************************************
Synopsis [Returns the array of constraint candidates.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
DdNode * Llb_ManComputeIndCase_rec( Aig_Man_t * p, Aig_Obj_t * pObj, DdManager * dd, Vec_Ptr_t * vBdds )
{
DdNode * bBdd0, * bBdd1;
DdNode * bFunc = (DdNode *)Vec_PtrEntry( vBdds, Aig_ObjId(pObj) );
if ( bFunc != NULL )
return bFunc;
assert( Aig_ObjIsNode(pObj) );
bBdd0 = Llb_ManComputeIndCase_rec( p, Aig_ObjFanin0(pObj), dd, vBdds );
bBdd1 = Llb_ManComputeIndCase_rec( p, Aig_ObjFanin1(pObj), dd, vBdds );
bBdd0 = Cudd_NotCond( bBdd0, Aig_ObjFaninC0(pObj) );
bBdd1 = Cudd_NotCond( bBdd1, Aig_ObjFaninC1(pObj) );
bFunc = Cudd_bddAnd( dd, bBdd0, bBdd1 ); Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Aig_ObjId(pObj), bFunc );
return bFunc;
}
/**Function*************************************************************
Synopsis [Moves closer to the end the node that is best for sharing.]
Description [If there is no node with sharing, randomly chooses one of
the legal nodes.]
SideEffects []
SeeAlso []
***********************************************************************/
void Dar_BalancePermute( Aig_Man_t * p, Vec_Ptr_t * vSuper, int LeftBound, int fExor )
{
Aig_Obj_t * pObj1, * pObj2, * pObj3, * pGhost;
int RightBound, i;
// get the right bound
RightBound = Vec_PtrSize(vSuper) - 2;
assert( LeftBound <= RightBound );
if ( LeftBound == RightBound )
return;
// get the two last nodes
pObj1 = (Aig_Obj_t *)Vec_PtrEntry( vSuper, RightBound + 1 );
pObj2 = (Aig_Obj_t *)Vec_PtrEntry( vSuper, RightBound );
if ( Aig_Regular(pObj1) == p->pConst1 || Aig_Regular(pObj2) == p->pConst1 || Aig_Regular(pObj1) == Aig_Regular(pObj2) )
return;
// find the first node that can be shared
for ( i = RightBound; i >= LeftBound; i-- )
{
pObj3 = (Aig_Obj_t *)Vec_PtrEntry( vSuper, i );
if ( Aig_Regular(pObj3) == p->pConst1 )
{
Vec_PtrWriteEntry( vSuper, i, pObj2 );
Vec_PtrWriteEntry( vSuper, RightBound, pObj3 );
return;
}
if ( Aig_Regular(pObj1) == Aig_Regular(pObj3) )
{
if ( pObj3 == pObj2 )
return;
Vec_PtrWriteEntry( vSuper, i, pObj2 );
Vec_PtrWriteEntry( vSuper, RightBound, pObj3 );
return;
}
pGhost = Aig_ObjCreateGhost( p, pObj1, pObj3, fExor? AIG_OBJ_EXOR : AIG_OBJ_AND );
if ( Aig_TableLookup( p, pGhost ) )
{
if ( pObj3 == pObj2 )
return;
Vec_PtrWriteEntry( vSuper, i, pObj2 );
Vec_PtrWriteEntry( vSuper, RightBound, pObj3 );
return;
}
}
/*
// we did not find the node to share, randomize choice
{
int Choice = Aig_ManRandom(0) % (RightBound - LeftBound + 1);
pObj3 = Vec_PtrEntry( vSuper, LeftBound + Choice );
if ( pObj3 == pObj2 )
return;
Vec_PtrWriteEntry( vSuper, LeftBound + Choice, pObj2 );
Vec_PtrWriteEntry( vSuper, RightBound, pObj3 );
}
*/
}
/**Function*************************************************************
Synopsis [Fetches the memory entry of the given size.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
char * Part_ManFetch( Part_Man_t * p, int nSize )
{
int Type, nSizeReal;
char * pMemory;
assert( nSize > 0 );
Type = Part_SizeType( nSize, p->nStepSize );
Vec_PtrFillExtra( p->vFree, Type + 1, NULL );
if ( pMemory = Vec_PtrEntry( p->vFree, Type ) )
{
Vec_PtrWriteEntry( p->vFree, Type, Part_OneNext(pMemory) );
return pMemory;
}
nSizeReal = p->nStepSize * Type;
if ( p->nFreeSize < nSizeReal )
{
p->pFreeBuf = ALLOC( char, p->nChunkSize );
p->nFreeSize = p->nChunkSize;
Vec_PtrPush( p->vMemory, p->pFreeBuf );
}
/**Function*************************************************************
Synopsis [Implements the function.]
Description [Returns the node implementing this function.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Obj_t * Lpk_Implement_rec( Lpk_Man_t * pMan, Abc_Ntk_t * pNtk, Vec_Ptr_t * vLeaves, Lpk_Fun_t * pFun )
{
Abc_Obj_t * pFanin, * pRes;
int i;
// prepare the leaves of the function
for ( i = 0; i < (int)pFun->nVars; i++ )
{
pFanin = (Abc_Obj_t *)Vec_PtrEntry( vLeaves, pFun->pFanins[i] );
if ( !Abc_ObjIsComplement(pFanin) )
Lpk_Implement_rec( pMan, pNtk, vLeaves, (Lpk_Fun_t *)pFanin );
pFanin = (Abc_Obj_t *)Vec_PtrEntry( vLeaves, pFun->pFanins[i] );
assert( Abc_ObjIsComplement(pFanin) );
}
// construct the function
pRes = Lpk_ImplementFun( pMan, pNtk, vLeaves, pFun );
// replace the function
Vec_PtrWriteEntry( vLeaves, pFun->Id, Abc_ObjNot(pRes) );
Lpk_FunFree( pFun );
return pRes;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Nwk_Man_t * Nwk_ManFromIf( If_Man_t * pIfMan, Aig_Man_t * p, Vec_Ptr_t * vAigToIf )
{
Vec_Ptr_t * vIfToAig;
Nwk_Man_t * pNtk;
Nwk_Obj_t * pObjNew;
Aig_Obj_t * pObj, * pObjRepr;
If_Obj_t * pIfObj;
If_Cut_t * pCutBest;
int i, k, nLeaves, * ppLeaves;
assert( Aig_ManCiNum(p) == If_ManCiNum(pIfMan) );
assert( Aig_ManCoNum(p) == If_ManCoNum(pIfMan) );
assert( Aig_ManNodeNum(p) == If_ManAndNum(pIfMan) );
Aig_ManCleanData( p );
If_ManCleanCutData( pIfMan );
// create mapping of IF to AIG
vIfToAig = Vec_PtrStart( If_ManObjNum(pIfMan) );
Aig_ManForEachObj( p, pObj, i )
{
pIfObj = (If_Obj_t *)Vec_PtrEntry( vAigToIf, i );
Vec_PtrWriteEntry( vIfToAig, pIfObj->Id, pObj );
}
/**Function*************************************************************
Synopsis [Reproduces script "compress2".]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Aig_Man_t * Dar_ManChoice( Aig_Man_t * pAig, int fBalance, int fUpdateLevel, int fConstruct, int nConfMax, int nLevelMax, int fVerbose )
{
Aig_Man_t * pMan, * pTemp;
Vec_Ptr_t * vAigs;
int i;
abctime clk;
clk = Abc_Clock();
// vAigs = Dar_ManChoiceSynthesisExt();
vAigs = Dar_ManChoiceSynthesis( pAig, fBalance, fUpdateLevel, 0, fVerbose );
// swap the first and last network
// this should lead to the primary choice being "better" because of synthesis
// (it is also important when constructing choices)
if ( !fConstruct )
{
pMan = (Aig_Man_t *)Vec_PtrPop( vAigs );
Vec_PtrPush( vAigs, Vec_PtrEntry(vAigs,0) );
Vec_PtrWriteEntry( vAigs, 0, pMan );
}
if ( fVerbose )
{
ABC_PRT( "Synthesis time", Abc_Clock() - clk );
}
clk = Abc_Clock();
if ( fConstruct )
pMan = Aig_ManChoiceConstructive( vAigs, fVerbose );
else
pMan = Aig_ManChoicePartitioned( vAigs, 300, nConfMax, nLevelMax, fVerbose );
Vec_PtrForEachEntry( Aig_Man_t *, vAigs, pTemp, i )
Aig_ManStop( pTemp );
Vec_PtrFree( vAigs );
if ( fVerbose )
{
ABC_PRT( "Choicing time ", Abc_Clock() - clk );
}
return pMan;
// return NULL;
}
/**Function*************************************************************
Synopsis [Load the network into FPGA manager.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
If_Man_t * Nwk_ManToIf( Aig_Man_t * p, If_Par_t * pPars, Vec_Ptr_t * vAigToIf )
{
extern Vec_Int_t * Saig_ManComputeSwitchProbs( Aig_Man_t * p, int nFrames, int nPref, int fProbOne );
Vec_Int_t * vSwitching = NULL, * vSwitching2 = NULL;
float * pSwitching = NULL, * pSwitching2 = NULL;
If_Man_t * pIfMan;
If_Obj_t * pIfObj;
Aig_Obj_t * pNode, * pFanin, * pPrev;
int i;
abctime clk = Abc_Clock();
// set the number of registers (switch activity will be combinational)
Aig_ManSetRegNum( p, 0 );
if ( pPars->fPower )
{
vSwitching = Saig_ManComputeSwitchProbs( p, 48, 16, 0 );
if ( pPars->fVerbose )
{
ABC_PRT( "Computing switching activity", Abc_Clock() - clk );
}
pSwitching = (float *)vSwitching->pArray;
vSwitching2 = Vec_IntStart( Aig_ManObjNumMax(p) );
pSwitching2 = (float *)vSwitching2->pArray;
}
// start the mapping manager and set its parameters
pIfMan = If_ManStart( pPars );
pIfMan->vSwitching = vSwitching2;
// load the AIG into the mapper
Aig_ManForEachObj( p, pNode, i )
{
if ( Aig_ObjIsAnd(pNode) )
{
pIfObj = If_ManCreateAnd( pIfMan,
If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ),
If_NotCond( (If_Obj_t *)Aig_ObjFanin1(pNode)->pData, Aig_ObjFaninC1(pNode) ) );
// printf( "no%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
}
else if ( Aig_ObjIsCi(pNode) )
{
pIfObj = If_ManCreateCi( pIfMan );
If_ObjSetLevel( pIfObj, Aig_ObjLevel(pNode) );
// printf( "pi%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
if ( pIfMan->nLevelMax < (int)pIfObj->Level )
pIfMan->nLevelMax = (int)pIfObj->Level;
}
else if ( Aig_ObjIsCo(pNode) )
{
pIfObj = If_ManCreateCo( pIfMan, If_NotCond( (If_Obj_t *)Aig_ObjFanin0(pNode)->pData, Aig_ObjFaninC0(pNode) ) );
// printf( "po%d=%d\n ", If_ObjId(pIfObj), If_ObjLevel(pIfObj) );
}
else if ( Aig_ObjIsConst1(pNode) )
pIfObj = If_ManConst1( pIfMan );
else // add the node to the mapper
assert( 0 );
// save the result
assert( Vec_PtrEntry(vAigToIf, i) == NULL );
Vec_PtrWriteEntry( vAigToIf, i, pIfObj );
pNode->pData = pIfObj;
if ( vSwitching2 )
pSwitching2[pIfObj->Id] = pSwitching[pNode->Id];
// set up the choice node
if ( Aig_ObjIsChoice( p, pNode ) )
{
for ( pPrev = pNode, pFanin = Aig_ObjEquiv(p, pNode); pFanin; pPrev = pFanin, pFanin = Aig_ObjEquiv(p, pFanin) )
If_ObjSetChoice( (If_Obj_t *)pPrev->pData, (If_Obj_t *)pFanin->pData );
If_ManCreateChoice( pIfMan, (If_Obj_t *)pNode->pData );
}
// assert( If_ObjLevel(pIfObj) == Aig_ObjLevel(pNode) );
}
if ( vSwitching )
Vec_IntFree( vSwitching );
return pIfMan;
}
/**Function*************************************************************
Synopsis [Structurally hashes the given window.]
Description [The first PO is the observability condition. The second
is the node's function. The remaining POs are the candidate divisors.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Res_WndStrash( Res_Win_t * p )
{
Vec_Ptr_t * vPairs;
Abc_Ntk_t * pAig;
Abc_Obj_t * pObj, * pMiter;
int i;
assert( Abc_NtkHasAig(p->pNode->pNtk) );
// Abc_NtkCleanCopy( p->pNode->pNtk );
// create the network
pAig = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pAig->pName = Extra_UtilStrsav( "window" );
// create the inputs
Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, i )
pObj->pCopy = Abc_NtkCreatePi( pAig );
Vec_PtrForEachEntry( Abc_Obj_t *, p->vBranches, pObj, i )
pObj->pCopy = Abc_NtkCreatePi( pAig );
// go through the nodes in the topological order
Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, i )
{
pObj->pCopy = Abc_ConvertAigToAig( pAig, pObj );
if ( pObj == p->pNode )
pObj->pCopy = Abc_ObjNot( pObj->pCopy );
}
// collect the POs
vPairs = Vec_PtrAlloc( 2 * Vec_PtrSize(p->vRoots) );
Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
{
Vec_PtrPush( vPairs, pObj->pCopy );
Vec_PtrPush( vPairs, NULL );
}
// mark the TFO of the node
Abc_NtkIncrementTravId( p->pNode->pNtk );
Res_WinSweepLeafTfo_rec( p->pNode, (int)p->pNode->Level + p->nWinTfoMax );
// update strashing of the node
p->pNode->pCopy = Abc_ObjNot( p->pNode->pCopy );
Abc_NodeSetTravIdPrevious( p->pNode );
// redo strashing in the TFO
Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, i )
{
if ( Abc_NodeIsTravIdCurrent(pObj) )
pObj->pCopy = Abc_ConvertAigToAig( pAig, pObj );
}
// collect the POs
Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
Vec_PtrWriteEntry( vPairs, 2 * i + 1, pObj->pCopy );
// add the miter
pMiter = Abc_AigMiter( (Abc_Aig_t *)pAig->pManFunc, vPairs, 0 );
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pMiter );
Vec_PtrFree( vPairs );
// add the node
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), p->pNode->pCopy );
// add the fanins
Abc_ObjForEachFanin( p->pNode, pObj, i )
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pObj->pCopy );
// add the divisors
Vec_PtrForEachEntry( Abc_Obj_t *, p->vDivs, pObj, i )
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pObj->pCopy );
// add the names
Abc_NtkAddDummyPiNames( pAig );
Abc_NtkAddDummyPoNames( pAig );
// check the resulting network
if ( !Abc_NtkCheck( pAig ) )
fprintf( stdout, "Res_WndStrash(): Network check has failed.\n" );
return pAig;
}
Saig_ManForEachLi( p, pObj, i )
{
bFunc = (DdNode *)pObj->pData; Cudd_Ref( bFunc );
Vec_PtrWriteEntry( vBdds, Aig_ObjId(Saig_ObjLiToLo(p, pObj)), bFunc );
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
static inline void Saig_ObjSetDual( Vec_Ptr_t * vCopies, int Id, int fPos, Aig_Obj_t * pItem ) { Vec_PtrWriteEntry( vCopies, 2*Id+fPos, pItem ); }
/**Function*************************************************************
Synopsis [Replaces one object by another.]
Description [Both objects are currently in the manager. The new object
(pObjNew) should be used instead of the old object (pObjOld). If the
new object is complemented or used, the buffer is added.]
SideEffects []
SeeAlso []
***********************************************************************/
void Ivy_ObjReplace( Ivy_Man_t * p, Ivy_Obj_t * pObjOld, Ivy_Obj_t * pObjNew, int fDeleteOld, int fFreeTop, int fUpdateLevel )
{
int nRefsOld;//, clk;
// the object to be replaced cannot be complemented
assert( !Ivy_IsComplement(pObjOld) );
// the object to be replaced cannot be a terminal
assert( Ivy_ObjIsNone(pObjOld) || !Ivy_ObjIsPi(pObjOld) );
// the object to be used cannot be a PO or assert
assert( !Ivy_ObjIsBuf(Ivy_Regular(pObjNew)) );
// the object cannot be the same
assert( pObjOld != Ivy_Regular(pObjNew) );
//printf( "Replacing %d by %d.\n", Ivy_Regular(pObjOld)->Id, Ivy_Regular(pObjNew)->Id );
// if HAIG is defined, create the choice node
if ( p->pHaig )
{
// if ( pObjOld->Id == 31 )
// {
// Ivy_ManShow( p, 0 );
// Ivy_ManShow( p->pHaig, 1 );
// }
Ivy_ManHaigCreateChoice( p, pObjOld, pObjNew );
}
// if the new object is complemented or already used, add the buffer
if ( Ivy_IsComplement(pObjNew) || Ivy_ObjIsLatch(pObjNew) || Ivy_ObjRefs(pObjNew) > 0 || Ivy_ObjIsPi(pObjNew) || Ivy_ObjIsConst1(pObjNew) )
pObjNew = Ivy_ObjCreate( p, Ivy_ObjCreateGhost(p, pObjNew, NULL, IVY_BUF, IVY_INIT_NONE) );
assert( !Ivy_IsComplement(pObjNew) );
if ( fUpdateLevel )
{
//clk = clock();
// if the new node's arrival time is different, recursively update arrival time of the fanouts
if ( p->fFanout && !Ivy_ObjIsBuf(pObjNew) && pObjOld->Level != pObjNew->Level )
{
assert( Ivy_ObjIsNode(pObjOld) );
pObjOld->Level = pObjNew->Level;
Ivy_ObjUpdateLevel_rec( p, pObjOld );
}
//p->time1 += clock() - clk;
// if the new node's required time has changed, recursively update required time of the fanins
//clk = clock();
if ( p->vRequired )
{
int ReqNew = Vec_IntEntry(p->vRequired, pObjOld->Id);
if ( ReqNew < Vec_IntEntry(p->vRequired, pObjNew->Id) )
{
Vec_IntWriteEntry( p->vRequired, pObjNew->Id, ReqNew );
Ivy_ObjUpdateLevelR_rec( p, pObjNew, ReqNew );
}
}
//p->time2 += clock() - clk;
}
// delete the old object
if ( fDeleteOld )
Ivy_ObjDelete_rec( p, pObjOld, fFreeTop );
// make sure object is not pointing to itself
assert( Ivy_ObjFanin0(pObjNew) == NULL || pObjOld != Ivy_ObjFanin0(pObjNew) );
assert( Ivy_ObjFanin1(pObjNew) == NULL || pObjOld != Ivy_ObjFanin1(pObjNew) );
// make sure the old node has no fanin fanout pointers
if ( p->fFanout )
{
assert( pObjOld->pFanout != NULL );
assert( pObjNew->pFanout == NULL );
pObjNew->pFanout = pObjOld->pFanout;
}
// transfer the old object
assert( Ivy_ObjRefs(pObjNew) == 0 );
nRefsOld = pObjOld->nRefs;
Ivy_ObjOverwrite( pObjOld, pObjNew );
pObjOld->nRefs = nRefsOld;
// patch the fanout of the fanins
if ( p->fFanout )
{
Ivy_ObjPatchFanout( p, Ivy_ObjFanin0(pObjOld), pObjNew, pObjOld );
if ( Ivy_ObjFanin1(pObjOld) )
Ivy_ObjPatchFanout( p, Ivy_ObjFanin1(pObjOld), pObjNew, pObjOld );
}
// update the hash table
Ivy_TableUpdate( p, pObjNew, pObjOld->Id );
// recycle the object that was taken over by pObjOld
Vec_PtrWriteEntry( p->vObjs, pObjNew->Id, NULL );
Ivy_ManRecycleMemory( p, pObjNew );
// if the new node is the buffer propagate it
if ( p->fFanout && Ivy_ObjIsBuf(pObjOld) )
Vec_PtrPush( p->vBufs, pObjOld );
// Ivy_ManCheckFanouts( p );
// printf( "\n" );
/*
if ( p->pHaig )
{
int x;
Ivy_ManShow( p, 0, NULL );
Ivy_ManShow( p->pHaig, 1, NULL );
x = 0;
}
*/
// if ( Ivy_ManCheckFanoutNums(p) )
// {
// int x = 0;
// }
}
static inline void Abc_ObjSetIvy2Abc( Ivy_Man_t * p, int IvyId, Abc_Obj_t * pObjAbc ) { assert(Vec_PtrEntry(p->pCopy, IvyId) == NULL); assert(!Abc_ObjIsComplement(pObjAbc)); Vec_PtrWriteEntry( p->pCopy, IvyId, pObjAbc ); }
/**Function*************************************************************
Synopsis [Collect elementary gates from the library.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_ManCollectGateNameOne( Mio_Library_t * pLib, Ptr_ObjType_t Type, word Truth, Vec_Ptr_t * vGateNames )
{
Mio_Gate_t * pGate = Mio_LibraryReadGateByTruth( pLib, Truth );
if ( pGate != NULL )
Vec_PtrWriteEntry( vGateNames, Type, Mio_GateReadName(pGate) );
}
/**Function*************************************************************
Synopsis [Performs rewriting for one node.]
Description [This procedure considers all the cuts computed for the node
and tries to rewrite each of them using the "forest" of different AIG
structures precomputed and stored in the RWR manager.
Determines the best rewriting and computes the gain in the number of AIG
nodes in the final network. In the end, p->vFanins contains information
about the best cut that can be used for rewriting, while p->pGraph gives
the decomposition dag (represented using decomposition graph data structure).
Returns gain in the number of nodes or -1 if node cannot be rewritten.]
SideEffects []
SeeAlso []
***********************************************************************/
int Rwr_NodeRewrite( Rwr_Man_t * p, Cut_Man_t * pManCut, Abc_Obj_t * pNode, int fUpdateLevel, int fUseZeros, int fPlaceEnable )
{
int fVeryVerbose = 0;
Dec_Graph_t * pGraph;
Cut_Cut_t * pCut;//, * pTemp;
Abc_Obj_t * pFanin;
unsigned uPhase, uTruthBest, uTruth;
char * pPerm;
int Required, nNodesSaved, nNodesSaveCur;
int i, GainCur, GainBest = -1;
int clk, clk2;//, Counter;
p->nNodesConsidered++;
// get the required times
Required = fUpdateLevel? Abc_ObjRequiredLevel(pNode) : ABC_INFINITY;
// get the node's cuts
clk = clock();
pCut = (Cut_Cut_t *)Abc_NodeGetCutsRecursive( pManCut, pNode, 0, 0 );
assert( pCut != NULL );
p->timeCut += clock() - clk;
//printf( " %d", Rwr_CutCountNumNodes(pNode, pCut) );
/*
Counter = 0;
for ( pTemp = pCut->pNext; pTemp; pTemp = pTemp->pNext )
Counter++;
printf( "%d ", Counter );
*/
// go through the cuts
clk = clock();
for ( pCut = pCut->pNext; pCut; pCut = pCut->pNext )
{
// consider only 4-input cuts
if ( pCut->nLeaves < 4 )
continue;
// Cut_CutPrint( pCut, 0 ), printf( "\n" );
// get the fanin permutation
uTruth = 0xFFFF & *Cut_CutReadTruth(pCut);
pPerm = p->pPerms4[ p->pPerms[uTruth] ];
uPhase = p->pPhases[uTruth];
// collect fanins with the corresponding permutation/phase
Vec_PtrClear( p->vFaninsCur );
Vec_PtrFill( p->vFaninsCur, (int)pCut->nLeaves, 0 );
for ( i = 0; i < (int)pCut->nLeaves; i++ )
{
pFanin = Abc_NtkObj( pNode->pNtk, pCut->pLeaves[pPerm[i]] );
if ( pFanin == NULL )
break;
pFanin = Abc_ObjNotCond(pFanin, ((uPhase & (1<<i)) > 0) );
Vec_PtrWriteEntry( p->vFaninsCur, i, pFanin );
}
if ( i != (int)pCut->nLeaves )
{
p->nCutsBad++;
continue;
}
p->nCutsGood++;
{
int Counter = 0;
Vec_PtrForEachEntry( p->vFaninsCur, pFanin, i )
if ( Abc_ObjFanoutNum(Abc_ObjRegular(pFanin)) == 1 )
Counter++;
if ( Counter > 2 )
continue;
}
clk2 = clock();
/*
printf( "Considering: (" );
Vec_PtrForEachEntry( p->vFaninsCur, pFanin, i )
printf( "%d ", Abc_ObjFanoutNum(Abc_ObjRegular(pFanin)) );
printf( ")\n" );
*/
// mark the fanin boundary
Vec_PtrForEachEntry( p->vFaninsCur, pFanin, i )
Abc_ObjRegular(pFanin)->vFanouts.nSize++;
// label MFFC with current ID
Abc_NtkIncrementTravId( pNode->pNtk );
nNodesSaved = Abc_NodeMffcLabelAig( pNode );
// unmark the fanin boundary
Vec_PtrForEachEntry( p->vFaninsCur, pFanin, i )
Abc_ObjRegular(pFanin)->vFanouts.nSize--;
p->timeMffc += clock() - clk2;
// evaluate the cut
clk2 = clock();
pGraph = Rwr_CutEvaluate( p, pNode, pCut, p->vFaninsCur, nNodesSaved, Required, &GainCur, fPlaceEnable );
p->timeEval += clock() - clk2;
// check if the cut is better than the current best one
if ( pGraph != NULL && GainBest < GainCur )
{
// save this form
nNodesSaveCur = nNodesSaved;
GainBest = GainCur;
p->pGraph = pGraph;
p->fCompl = ((uPhase & (1<<4)) > 0);
uTruthBest = 0xFFFF & *Cut_CutReadTruth(pCut);
// collect fanins in the
Vec_PtrClear( p->vFanins );
Vec_PtrForEachEntry( p->vFaninsCur, pFanin, i )
Vec_PtrPush( p->vFanins, pFanin );
}
}
p->timeRes += clock() - clk;
if ( GainBest == -1 )
return -1;
/*
if ( GainBest > 0 )
{
printf( "Class %d ", p->pMap[uTruthBest] );
printf( "Gain = %d. Node %d : ", GainBest, pNode->Id );
Vec_PtrForEachEntry( p->vFanins, pFanin, i )
printf( "%d ", Abc_ObjRegular(pFanin)->Id );
Dec_GraphPrint( stdout, p->pGraph, NULL, NULL );
printf( "\n" );
}
*/
// printf( "%d", nNodesSaveCur - GainBest );
/*
if ( GainBest > 0 )
{
if ( Rwr_CutIsBoolean( pNode, p->vFanins ) )
printf( "b" );
else
{
printf( "Node %d : ", pNode->Id );
Vec_PtrForEachEntry( p->vFanins, pFanin, i )
printf( "%d ", Abc_ObjRegular(pFanin)->Id );
printf( "a" );
}
}
*/
/*
if ( GainBest > 0 )
if ( p->fCompl )
printf( "c" );
else
printf( "." );
*/
// copy the leaves
Vec_PtrForEachEntry( p->vFanins, pFanin, i )
Dec_GraphNode(p->pGraph, i)->pFunc = pFanin;
/*
printf( "(" );
Vec_PtrForEachEntry( p->vFanins, pFanin, i )
printf( " %d", Abc_ObjRegular(pFanin)->vFanouts.nSize - 1 );
printf( " ) " );
*/
// printf( "%d ", Rwr_NodeGetDepth_rec( pNode, p->vFanins ) );
p->nScores[p->pMap[uTruthBest]]++;
p->nNodesGained += GainBest;
if ( fUseZeros || GainBest > 0 )
{
p->nNodesRewritten++;
}
// report the progress
if ( fVeryVerbose && GainBest > 0 )
{
printf( "Node %6s : ", Abc_ObjName(pNode) );
printf( "Fanins = %d. ", p->vFanins->nSize );
printf( "Save = %d. ", nNodesSaveCur );
printf( "Add = %d. ", nNodesSaveCur-GainBest );
printf( "GAIN = %d. ", GainBest );
printf( "Cone = %d. ", p->pGraph? Dec_GraphNodeNum(p->pGraph) : 0 );
printf( "Class = %d. ", p->pMap[uTruthBest] );
printf( "\n" );
}
return GainBest;
}
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Inserts the given mapping into the netlist.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Ntl_Man_t * Ntl_ManInsertMapping( Ntl_Man_t * p, Vec_Ptr_t * vMapping, Aig_Man_t * pAig )
{
char Buffer[1000];
Vec_Ptr_t * vCopies;
Vec_Int_t * vCover;
Ntl_Mod_t * pRoot;
Ntl_Obj_t * pNode;
Ntl_Net_t * pNet, * pNetCo;
Ntl_Lut_t * pLut;
int i, k, nDigits;
assert( Vec_PtrSize(p->vCis) == Aig_ManPiNum(pAig) );
assert( Vec_PtrSize(p->vCos) == Aig_ManPoNum(pAig) );
p = Ntl_ManStartFrom( p );
pRoot = Ntl_ManRootModel( p );
assert( Ntl_ModelNodeNum(pRoot) == 0 );
// map the AIG back onto the design
Ntl_ManForEachCiNet( p, pNet, i )
pNet->pCopy = Aig_ManPi( pAig, i );
// start mapping of AIG nodes into their copies
vCopies = Vec_PtrStart( Aig_ManObjNumMax(pAig) );
Ntl_ManForEachCiNet( p, pNet, i )
Vec_PtrWriteEntry( vCopies, ((Aig_Obj_t *)pNet->pCopy)->Id, pNet );
// create a new node for each LUT
vCover = Vec_IntAlloc( 1 << 16 );
nDigits = Aig_Base10Log( Vec_PtrSize(vMapping) );
Vec_PtrForEachEntry( Ntl_Lut_t *, vMapping, pLut, i )
{
pNode = Ntl_ModelCreateNode( pRoot, pLut->nFanins );
pNode->pSop = Kit_PlaFromTruth( p->pMemSops, pLut->pTruth, pLut->nFanins, vCover );
if ( !Kit_TruthIsConst0(pLut->pTruth, pLut->nFanins) && !Kit_TruthIsConst1(pLut->pTruth, pLut->nFanins) )
{
for ( k = 0; k < pLut->nFanins; k++ )
{
pNet = (Ntl_Net_t *)Vec_PtrEntry( vCopies, pLut->pFanins[k] );
if ( pNet == NULL )
{
printf( "Ntl_ManInsert(): Internal error: Net not found.\n" );
return 0;
}
Ntl_ObjSetFanin( pNode, pNet, k );
}
}
else
pNode->nFanins = 0;
sprintf( Buffer, "lut%0*d", nDigits, i );
if ( (pNet = Ntl_ModelFindNet( pRoot, Buffer )) )
{
printf( "Ntl_ManInsert(): Internal error: Intermediate net name is not unique.\n" );
return 0;
}
pNet = Ntl_ModelFindOrCreateNet( pRoot, Buffer );
if ( !Ntl_ModelSetNetDriver( pNode, pNet ) )
{
printf( "Ntl_ManInsert(): Internal error: Net has more than one fanin.\n" );
return 0;
}
Vec_PtrWriteEntry( vCopies, pLut->Id, pNet );
}
