static void NetModeSet(uint8_t networkType)
{
switch (networkType) {
case WDRV_NETWORK_TYPE_INFRASTRUCTURE:
WDRV_EXT_CmdNetModeBSSSet();
break;
case WDRV_NETWORK_TYPE_ADHOC:
WDRV_ASSERT(false, "Ad-Hoc is not supported for now");
break;
case WDRV_NETWORK_TYPE_SOFT_AP:
WDRV_EXT_CmdNetModeAPSet();
break;
case WDRV_NETWORK_TYPE_P2P:
WDRV_ASSERT(false, "P2P is not supported for now");
break;
default:
WDRV_ASSERT(false, "Undefined network type");
break;
}
}
void WDRV_GPIO_Init(int board)
{
switch (board) {
case MZ_ESK_BD:
break;
case MX_ESK_BD:
break;
case EXP16_BD:
break;
case MEB2_BD:
break;
default:
WDRV_ASSERT(false, "Unsupported board");
break;
}
}
static bool Spi_Init(void)
{
if (s_SpiHandle == NULL) {
s_SpiHandle = DRV_SPI_Open(WDRV_SPI_INDEX, DRV_IO_INTENT_READWRITE|DRV_IO_INTENT_BLOCKING);
if (s_SpiHandle == (DRV_SPI_BUFFER_HANDLE)NULL)
{
WDRV_ASSERT(false, "SPI init failed");
return false;
}
}
WDRV_SemInit(&g_wdrv_priv.dmaTxSync);
WDRV_SemInit(&g_wdrv_priv.dmaRxSync);
return true;
}
void WDRV_GPIO_OutHigh(int board)
{
switch (board) {
case MZ_ESK_BD:
PLIB_PORTS_PinModePerPortSelect(PORTS_ID_0, WF_TEST_PORT_CHANNEL,WF_TEST_BIT_POS,PORTS_PIN_MODE_DIGITAL);
PLIB_PORTS_PinDirectionOutputSet(PORTS_ID_0,WF_TEST_PORT_CHANNEL,WF_TEST_BIT_POS);
SYS_PORTS_PinSet (PORTS_ID_0, WF_TEST_PORT_CHANNEL,WF_TEST_BIT_POS);
break;
case MX_ESK_BD:
break;
case EXP16_BD:
break;
case MEB2_BD:
break;
default:
WDRV_ASSERT(false, "Unsupported board");
break;
}
}
static bool Spi_Write(unsigned char *p_txBuf, uint32_t txLen)
{
bool ret = true;
int c = 0;
CS_Assert();
while (txLen > SPI_DMA_MAX_TX_SIZE) {
ret = _Spi_Tx(p_txBuf + c * SPI_DMA_MAX_TX_SIZE, SPI_DMA_MAX_TX_SIZE);
txLen -= SPI_DMA_MAX_TX_SIZE;
c ++;
}
if (txLen > 0)
ret = _Spi_Tx(p_txBuf + c * SPI_DMA_MAX_TX_SIZE, txLen);
CS_Deassert();
WDRV_ASSERT(ret, "Spi_Write failed");
return ret;
}
static void SecuritySet(uint8_t securityMode)
{
bool pinMode;
switch (securityMode) {
case WDRV_SECURITY_OPEN:
WDRV_EXT_CmdSecNoneSet();
break;
case WDRV_SECURITY_WEP_40:
case WDRV_SECURITY_WEP_104:
if ((WDRV_CONFIG_PARAMS(securityKeyLen) == 5) || (WDRV_CONFIG_PARAMS(securityKeyLen) == 13))
{
int i;
uint8_t tmpBuf[26];
uint8_t c_value;
for (i = 0; i < WDRV_CONFIG_PARAMS(securityKeyLen) * 2; i++)
{
c_value = (i % 2 == 0 ) ? (WDRV_CONFIG_PARAMS(securityKey)[i / 2] >> 4) : (WDRV_CONFIG_PARAMS(securityKey)[i / 2] & 0x0F);
tmpBuf[i] = (c_value > 9) ? ('A' + c_value - 0x0A) : ('0' + c_value - 0x00);
}
WDRV_CONFIG_PARAMS(securityKeyLen) *= 2;
memcpy(WDRV_CONFIG_PARAMS(securityKey), tmpBuf, WDRV_CONFIG_PARAMS(securityKeyLen));
WDRV_CONFIG_PARAMS(securityKey)[WDRV_CONFIG_PARAMS(securityKeyLen)] = 0x00;
}
WDRV_EXT_CmdSecWEPSet(WDRV_CONFIG_PARAMS(securityKey), WDRV_CONFIG_PARAMS(securityKeyLen));
break;
case WDRV_SECURITY_WPA_WITH_PASS_PHRASE:
WDRV_EXT_CmdSecWPASet(WDRV_CONFIG_PARAMS(securityKey), WDRV_CONFIG_PARAMS(securityKeyLen));
break;
case WDRV_SECURITY_WPA2_WITH_PASS_PHRASE:
WDRV_EXT_CmdSecWPA2Set(WDRV_CONFIG_PARAMS(securityKey), WDRV_CONFIG_PARAMS(securityKeyLen));
break;
case WDRV_SECURITY_WPS_PIN:
case WDRV_SECURITY_WPS_PUSH_BUTTON:
pinMode = WDRV_CONFIG_PARAMS(securityMode) == WDRV_SECURITY_WPS_PIN ? true : false;
WDRV_EXT_CmdSecWpsSet(pinMode, WDRV_CONFIG_PARAMS(securityKey), WDRV_CONFIG_PARAMS(securityKeyLen));
break;
default:
WDRV_ASSERT(false, "Undefined security mode");
break;
}
static bool Spi_Read(unsigned char *p_cmd, uint32_t cmdLen, unsigned char *p_rxBuf, uint32_t rxLen)
{
bool ret = true;
int c = 0;
CS_Assert();
if (cmdLen > 0)
ret = _Spi_Tx(p_cmd, cmdLen);
if (ret && rxLen > 0) {
while (rxLen > SPI_DMA_MAX_RX_SIZE) {
ret = _Spi_Rx(p_rxBuf + c * SPI_DMA_MAX_RX_SIZE, SPI_DMA_MAX_RX_SIZE);
rxLen -= SPI_DMA_MAX_RX_SIZE;
c ++;
}
if (rxLen > 0)
ret = _Spi_Rx(p_rxBuf + c * SPI_DMA_MAX_RX_SIZE, rxLen);
}
CS_Deassert();
WDRV_ASSERT(ret, "Spi_Read failed");
return ret;
}
