/**
* \brief DMA driver configuration
*/
static void _ConfigureDma(void)
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize(&dmad, 0);
/* IRQ configure */
NVIC_EnableIRQ(XDMAC_IRQn);
/* Allocate DMA channels for USART */
usartDmaTxChannel = XDMAD_AllocateChannel(pDmad, XDMAD_TRANSFER_MEMORY,
ID_USART);
usartDmaRxChannel = XDMAD_AllocateChannel(pDmad, ID_USART,
XDMAD_TRANSFER_MEMORY);
/* Set RX callback */
XDMAD_SetCallback(pDmad, usartDmaRxChannel,
(XdmadTransferCallback)_UsDmaRxCallback,
0);
/* Set TX callback */
XDMAD_SetCallback(pDmad, usartDmaTxChannel,
(XdmadTransferCallback)_UsDmaTxCallback,
0);
XDMAD_PrepareChannel(pDmad, usartDmaRxChannel);
XDMAD_PrepareChannel(pDmad, usartDmaTxChannel);
}
/**
* \brief This function initialize the appropriate DMA channel for Rx/Tx channel of SPI or SMC
* \returns 0 if the transfer has been started successfully; otherwise returns
* ILI9488_ERROR_XX is the driver is in use, or ILI9488_ERROR_XX if the command is not
* valid.
*/
static uint8_t _ILI9488DmaConfigChannels(void)
{
uint32_t srcType,dstType;
/* Driver initialize */
XDMAD_Initialize( ili9488Dma.xdmaD, 0 );
XDMAD_FreeChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaTxChannel);
XDMAD_FreeChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaRxChannel);
#if !defined(BOARD_LCD_SMC)
srcType = XDMAD_TRANSFER_MEMORY;
dstType = ili9488Dma.spiId;
#else
srcType = XDMAD_TRANSFER_MEMORY;
dstType = XDMAD_TRANSFER_MEMORY;
#endif
/* Allocate a DMA channel for ILI9488_SPI TX. */
ili9488Dma.ili9488DmaTxChannel = XDMAD_AllocateChannel( ili9488Dma.xdmaD, srcType, dstType);
{
if ( ili9488Dma.ili9488DmaTxChannel == XDMAD_ALLOC_FAILED )
{
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
}
}
/* Allocate a DMA channel for ILI9488_SPI RX. */
ili9488Dma.ili9488DmaRxChannel = XDMAD_AllocateChannel( ili9488Dma.xdmaD, dstType, srcType);
{
if ( ili9488Dma.ili9488DmaRxChannel == XDMAD_ALLOC_FAILED )
{
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
}
}
/* Setup callbacks for ILI9488_SPI RX */
XDMAD_SetCallback(ili9488Dma.xdmaD, ili9488Dma.ili9488DmaRxChannel, (XdmadTransferCallback)_ILI9488_Rx_CB, &ili9488Dma);
if (XDMAD_PrepareChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaRxChannel ))
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
/* Setup callbacks for ILI9488_SPI TX (ignored) */
XDMAD_SetCallback(ili9488Dma.xdmaD, ili9488Dma.ili9488DmaTxChannel, (XdmadTransferCallback)_ILI9488_Tx_CB, &ili9488Dma);
if ( XDMAD_PrepareChannel( ili9488Dma.xdmaD, ili9488Dma.ili9488DmaTxChannel ))
return ILI9488_ERROR_DMA_ALLOCATE_CHANNEL;
/* Check if DMA IRQ is enable; if not Enable it */
if(!(NVIC_GetActive(XDMAC_IRQn)))
{
/* Enable interrupt */
NVIC_EnableIRQ(XDMAC_IRQn);
}
return 0;
}
uint32_t USARTD_EnableTxChannels( UsartDma *pUsartd, UsartChannel *pTxCh)
{
Usart *pUsartHw = pUsartd->pUsartHw;
// Initialize the callback
pUsartd->pTxChannel = pTxCh;
/* Enables the USART to transfer data. */
USART_SetTransmitterEnabled ( pUsartHw , 1);
XDMAD_FreeChannel( pUsartd->pXdmad, pTxCh->ChNum);
/* Allocate a DMA channel for USART0/1 TX. */
pTxCh->ChNum = XDMAD_AllocateChannel( pUsartd->pXdmad, XDMAD_TRANSFER_MEMORY, pUsartd->usartId);
if ( pTxCh->ChNum == XDMAD_ALLOC_FAILED ) {
return USARTD_ERROR;
}
/* Setup callbacks for USART0/1 TX */
XDMAD_SetCallback(pUsartd->pXdmad, pTxCh->ChNum, (XdmadTransferCallback)USARTD_Tx_Cb, pUsartd);
if ( XDMAD_PrepareChannel( pUsartd->pXdmad, pTxCh->ChNum ))
return USARTD_ERROR;
/* Enable interrupt */
NVIC_EnableIRQ(XDMAC_IRQn);
if (_configureTxLinkList(pUsartHw, pUsartd->pXdmad, pTxCh))
return USARTD_ERROR_LOCK;
return 0;
}
/**
* \brief DMA driver configuration
*/
static void Dma_configure(void)
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize( pDmad, 0 );
/* Configure TWI interrupts */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_EnableIRQ(XDMAC_IRQn);
/* Allocate DMA channels for SSC */
sscDmaTxChannel = XDMAD_AllocateChannel( pDmad, XDMAD_TRANSFER_MEMORY, ID_SSC);
sscDmaRxChannel = XDMAD_AllocateChannel( pDmad, ID_SSC, XDMAD_TRANSFER_MEMORY);
if ( sscDmaTxChannel == XDMAD_ALLOC_FAILED || sscDmaRxChannel == XDMAD_ALLOC_FAILED )
{
printf("xDMA channel allocation error\n\r");
while(1);
}
XDMAD_PrepareChannel(pDmad, sscDmaTxChannel );
XDMAD_PrepareChannel(pDmad, sscDmaRxChannel );
}
/**
* \brief Configure the DMA Channels: 0 RX, 1 TX.
* Channels are disabled after configure.
* \returns 0 if the dma channel configuration successfully; otherwise returns
* SPID_ERROR_XXX.
*/
static uint8_t _spid_configureDmaChannels( Spid* pSpid )
{
/* Driver initialize */
XDMAD_Initialize( pSpid->pXdmad, 0 );
XDMAD_FreeChannel( pSpid->pXdmad, spiDmaTxChannel);
XDMAD_FreeChannel( pSpid->pXdmad, spiDmaRxChannel);
/* Allocate a DMA channel for SPI0/1 TX. */
spiDmaTxChannel = XDMAD_AllocateChannel( pSpid->pXdmad, XDMAD_TRANSFER_MEMORY, pSpid->spiId);
{
if ( spiDmaTxChannel == XDMAD_ALLOC_FAILED )
{
return SPID_ERROR;
}
}
/* Allocate a DMA channel for SPI0/1 RX. */
spiDmaRxChannel = XDMAD_AllocateChannel( pSpid->pXdmad, pSpid->spiId, XDMAD_TRANSFER_MEMORY);
{
if ( spiDmaRxChannel == XDMAD_ALLOC_FAILED )
{
return SPID_ERROR;
}
}
/* Setup callbacks for SPI0/1 RX */
XDMAD_SetCallback(pSpid->pXdmad, spiDmaRxChannel, (XdmadTransferCallback)SPID_Rx_Cb, pSpid);
if (XDMAD_PrepareChannel( pSpid->pXdmad, spiDmaRxChannel ))
return SPID_ERROR;
/* Setup callbacks for SPI0/1 TX (ignored) */
XDMAD_SetCallback(pSpid->pXdmad, spiDmaTxChannel, NULL, NULL);
if ( XDMAD_PrepareChannel( pSpid->pXdmad, spiDmaTxChannel ))
return SPID_ERROR;
return 0;
}
/*
* \brief DMA driver configuration
*/
static void _ConfigureDma(void)
{
/* Driver initialize */
XDMAD_Initialize(&dmad, 0);
/* Allocate XDMA channels for USART */
usartDmaTxChannel = XDMAD_AllocateChannel(&dmad, XDMAD_TRANSFER_MEMORY, ID_USART);
usartDmaRxChannel = XDMAD_AllocateChannel(&dmad, ID_USART, XDMAD_TRANSFER_MEMORY);
if (usartDmaTxChannel == XDMAD_ALLOC_FAILED ||
usartDmaRxChannel == XDMAD_ALLOC_FAILED) {
printf("XDMA channel allocat failed!\n\r");
while (1);
}
/* Set RX callback */
XDMAD_SetCallback(&dmad, usartDmaRxChannel,(XdmadTransferCallback)_DmaRxCallback, 0);
/* Set TX callback */
XDMAD_SetCallback(&dmad, usartDmaTxChannel,(XdmadTransferCallback)_DmaTxCallback, 0);
XDMAD_PrepareChannel(&dmad, usartDmaRxChannel);
XDMAD_PrepareChannel(&dmad, usartDmaTxChannel);
}
/**
* HSMCI DMA R/W prepare
*/
static uint32_t _MciDMAPrepare(sMcid *pMcid, uint8_t bRd)
{
sXdmad *pXdmad = pMcid->pXdmad;
/* Allocate a channel */
if (bRd) {
pMcid->dwDmaCh = XDMAD_AllocateChannel(pXdmad, pMcid->bID, XDMAD_TRANSFER_MEMORY);
} else {
pMcid->dwDmaCh = XDMAD_AllocateChannel(pXdmad, XDMAD_TRANSFER_MEMORY, pMcid->bID);
}
if (pMcid->dwDmaCh == XDMAD_ALLOC_FAILED) {
return SDMMC_ERROR_BUSY;
}
XDMAD_SetCallback(pXdmad, pMcid->dwDmaCh, NULL, NULL);
XDMAD_PrepareChannel( pXdmad, pMcid->dwDmaCh );
return SDMMC_SUCCESS;
}
/**
* \brief This function initialize the appropriate DMA channel for Rx channel
* of USART
* \param pUsartd Pointer to a UsartDma instance.
* \param pRxCh Pointer to TxChannel configuration
* \returns 0 if the transfer has been started successfully;
* otherwise returns USARTD_ERROR_LOCK is the driver is in use, or
* USARTD_ERROR if the command is not valid.
*/
uint32_t USARTD_EnableRxChannels(UsartDma *pUsartd, UsartChannel *pRxCh)
{
uint32_t Channel;
assert(pRxCh);
/* Init USART Rx Channel. */
pUsartd->pRxChannel = pRxCh;
/* Enables the USART to receive data. */
USART_SetReceiverEnabled (pUsartd->pUsartHw , ENABLE);
/* Allocate a DMA channel for USART0/1 RX. */
Channel = XDMAD_AllocateChannel(pUsartd->pXdmad, pUsartd->usartId,
XDMAD_TRANSFER_MEMORY);
if (Channel == XDMAD_ALLOC_FAILED)
return USARTD_ERROR;
pRxCh->ChNum = Channel;
/* Setup callbacks for USART RX */
if (pUsartd->pRxChannel->callback) {
XDMAD_SetCallback(pUsartd->pXdmad, pRxCh->ChNum,
(XdmadTransferCallback)pRxCh->callback, pRxCh->pArgument);
} else {
XDMAD_SetCallback(pUsartd->pXdmad, pRxCh->ChNum,
(XdmadTransferCallback)USARTD_Rx_Cb, pUsartd);
}
if (XDMAD_PrepareChannel(pUsartd->pXdmad, pRxCh->ChNum))
return USARTD_ERROR;
if (_configureRxDma(pUsartd , pUsartd->pRxChannel))
return USARTD_ERROR_LOCK;
/* Check if DMA IRQ is enable; if not Enable it */
if (!(NVIC_GetActive(XDMAC_IRQn))) {
/* Enable interrupt */
NVIC_EnableIRQ(XDMAC_IRQn);
}
return 0;
}
/**
* \brief xDMA driver configuration
*/
static void _ConfigureDma( void )
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize( pDmad, 0 );
/* Allocate DMA channels for PWM */
pwmDmaTxChannel = XDMAD_AllocateChannel( pDmad, XDMAD_TRANSFER_MEMORY, ID_PWM0);
if (pwmDmaTxChannel == XDMAD_ALLOC_FAILED )
{
printf("xDMA channel allocation error\n\r");
while(1);
}
XDMAD_PrepareChannel(pDmad, pwmDmaTxChannel );
/* Configure interrupt for DMA transfer */
NVIC_ClearPendingIRQ(XDMAC_IRQn);
NVIC_SetPriority( XDMAC_IRQn ,1);
NVIC_EnableIRQ(XDMAC_IRQn);
}
/**
* \brief This function initialize the appropriate DMA channel for Tx channel of UART
*
* \param pUartd Pointer to a UartDma instance.
* \param pTxCh Pointer to RxChannel configuration
* \returns 0 if the transfer has been started successfully; otherwise returns
* UARTD_ERROR_LOCK is the driver is in use, or UARTD_ERROR if the command is not
* valid.
*/
uint32_t UARTD_EnableTxChannels( UartDma *pUartd, UartChannel *pTxCh)
{
Uart *pUartHw = pUartd->pUartHw;
uint32_t Channel;
/* Init USART Tx Channel. */
pUartd->pTxChannel = pTxCh;
/* Allocate a DMA channel for UART TX. */
Channel = XDMAD_AllocateChannel( pUartd->pXdmad, XDMAD_TRANSFER_MEMORY, pUartd->uartId);
if ( pTxCh->ChNum == XDMAD_ALLOC_FAILED )
{
return USARTD_ERROR;
}
pTxCh->ChNum = Channel ;
/* Setup callbacks for UART TX */
if(pUartd->pTxChannel->callback)
{
XDMAD_SetCallback(pUartd->pXdmad, pTxCh->ChNum, (XdmadTransferCallback)pTxCh->callback, pTxCh->pArgument);
}
else
{
XDMAD_SetCallback(pUartd->pXdmad, pTxCh->ChNum, (XdmadTransferCallback)UARTD_Tx_Cb, pUartd);
}
if ( XDMAD_PrepareChannel( pUartd->pXdmad, pTxCh->ChNum ))
return USARTD_ERROR;
if (_configureUartTxDma(pUartHw, pUartd->pXdmad, pTxCh))
return USARTD_ERROR_LOCK;
/* Check if DMA IRQ is enable; if not Enable it */
if(!(NVIC_GetActive(XDMAC_IRQn)))
{
/* Enable interrupt */
NVIC_EnableIRQ(XDMAC_IRQn);
}
return 0;
}
/**
* \brief Configure the DMA Channels: 0 RX.
* Channels are disabled after configure.
* \returns 0 if the dma channel configuration successfully; otherwise returns
* DAC_ERROR_XXX.
*/
static uint8_t _DacConfigureDmaChannels(DacDma *pDacd)
{
/* Driver initialize */
XDMAD_Initialize(pDacd->pXdmad, 0);
XDMAD_FreeChannel(pDacd->pXdmad, dacDmaTxChannel);
/* Allocate a DMA channel for DAC0/1 TX. */
dacDmaTxChannel =
XDMAD_AllocateChannel(pDacd->pXdmad, XDMAD_TRANSFER_MEMORY, ID_DACC);
if (dacDmaTxChannel == XDMAD_ALLOC_FAILED)
return DAC_ERROR;
if (XDMAD_PrepareChannel(pDacd->pXdmad, dacDmaTxChannel))
return DAC_ERROR;
return DAC_OK;
}
/**
* \brief DMA driver configuration
*/
static void _ConfigureDma(void)
{
sXdmad *pDmad = &dmad;
/* Driver initialize */
XDMAD_Initialize(pDmad, 0);
/* IRQ configure */
NVIC_EnableIRQ(XDMAC_IRQn);
/* Allocate DMA channels for SSC */
sscDmaTxChannel = XDMAD_AllocateChannel(pDmad, XDMAD_TRANSFER_MEMORY, ID_SSC);
if ( sscDmaTxChannel == XDMAD_ALLOC_FAILED) {
printf("xDMA channel allocation error\n\r");
while (1);
}
/* Set TX callback */
XDMAD_SetCallback(pDmad, sscDmaTxChannel, (XdmadTransferCallback)_SscTxCallback,
0);
XDMAD_PrepareChannel(pDmad, sscDmaTxChannel);
}
/**
* \brief Configure the DMA Channels: 0 RX.
* Channels are disabled after configure.
* \param pXdmad Pointer to a AfeDma instance
* \returns 0 if the dma channel configuration successfully; otherwise returns
* AFE_ERROR_XXX.
*/
static uint8_t _AfeConfigureDmaChannels(AfeDma *pAfed)
{
/* Driver initialize */
XDMAD_FreeChannel(pAfed->pXdmad, afeDmaRxChannel);
/* Allocate a DMA channel for AFE0/1 RX. */
afeDmaRxChannel =
XDMAD_AllocateChannel(pAfed->pXdmad, pAfed->afeId, XDMAD_TRANSFER_MEMORY);
if (afeDmaRxChannel == XDMAD_ALLOC_FAILED)
return AFE_ERROR;
/* Setup callbacks for AFE0/1 RX */
XDMAD_SetCallback(pAfed->pXdmad, afeDmaRxChannel,
(XdmadTransferCallback)Afe_Rx_Cb, pAfed);
if (XDMAD_PrepareChannel(pAfed->pXdmad, afeDmaRxChannel))
return AFE_ERROR;
return AFE_OK;
}
