__STATIC_INLINE void XMC_CCU4_lGateClock(const XMC_CCU4_MODULE_t *const module) { switch ((uint32_t)module) { case (uint32_t)CCU40: XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU40); break; #if defined(CCU41) case (uint32_t)CCU41: XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU41); break; #endif #if defined(CCU42) case (uint32_t)CCU42: XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU42); break; #endif #if defined(CCU43) case (uint32_t)CCU43: XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_CCU43); break; #endif default: XMC_ASSERT("XMC_CCU4_lGateClock:Invalid Module Pointer", 0); break; } }
/* API to disable the POSIF module */ void XMC_POSIF_Disable(XMC_POSIF_t *const peripheral) { if (peripheral == POSIF0) { #if defined(PERIPHERAL_RESET_SUPPORTED) XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF0); #endif #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF0); #endif } #if defined(POSIF1) else if (peripheral == POSIF1) { #if defined(PERIPHERAL_RESET_SUPPORTED) XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF1); #endif #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF1); #endif } #endif else { XMC_ASSERT("XMC_POSIF_Disable:Invalid module pointer", 0); } }
/* API to disable the POSIF module */ void XMC_POSIF_Disable(XMC_POSIF_t *const peripheral) { switch ((uint32_t)peripheral) { case (uint32_t)POSIF0: #if defined(PERIPHERAL_RESET_SUPPORTED) XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF0); #endif #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF0); #endif break; #if defined(POSIF1) case (uint32_t)POSIF1: #if defined(PERIPHERAL_RESET_SUPPORTED) XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_POSIF1); #endif #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_POSIF1); #endif break; #endif default: XMC_ASSERT("XMC_POSIF_Disable:Invalid module pointer", 0); break; } }
/* Disables watchdog clock and resets watchdog. */ void XMC_WDT_Disable(void) { #if defined(PERIPHERAL_RESET_SUPPORTED) XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_WDT); #endif #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_WDT); #endif #if UC_FAMILY == XMC4 XMC_SCU_CLOCK_DisableClock(XMC_SCU_CLOCK_WDT); #endif }
/* Disable the clock and Reset the ERU module. */ void XMC_ERU_Disable(XMC_ERU_t *const eru) { #if defined(XMC_ERU1) if (eru == XMC_ERU1) { XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_ERU1); #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_ERU1); #endif } #else XMC_UNUSED_ARG(eru); #endif }
/* Disable GPDMA module */ void XMC_DMA_Disable(XMC_DMA_t *const dma) { dma->DMACFGREG = 0x0U; #if defined(GPDMA1) if (dma == XMC_DMA0) { #endif XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_GPDMA0); #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_GPDMA0); #endif #if defined(GPDMA1) } else { XMC_SCU_RESET_AssertPeripheralReset(XMC_SCU_PERIPHERAL_RESET_GPDMA1); #if defined(CLOCK_GATING_SUPPORTED) XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_GPDMA1); #endif } #endif }
/* * Gates a clock node for RTC */ void XMC_RTC_Disable(void) { XMC_SCU_CLOCK_GatePeripheralClock(XMC_SCU_PERIPHERAL_CLOCK_RTC); }