/****************************************************************************
*
* Disable the Data cache.
*
* @param None.
*
* @return None.
*
* @note None.
*
****************************************************************************/
void Xil_DCacheDisable(void)
{
#ifndef USE_AMP
Xil_L2CacheDisable();
#endif
Xil_L1DCacheDisable();
}
/****************************************************************************
*
* Disable the Data cache.
*
* @param None.
*
* @return None.
*
* @note None.
*
****************************************************************************/
void Xil_DCacheDisable(void)
{
Xil_L2CacheDisable();
Xil_L1DCacheDisable();
}
int main() {
Xil_L1DCacheDisable();
Xil_L2CacheDisable();
disable_caches();
int h, j, i;
vdma_handle handle;
sepimgfilter_handle filter_handle;
char img[] = {0, 0, 0, 0, 1, 1, 1, 0, 2, 2, 2, 0, 3, 3, 3, 0, 4, 4, 4, 0, 5, 5, 5, 0, 6, 6, 6, 0, 7, 7, 7, 0, 8, 8, 8, 0, 9, 9, 9, 0, 10, 10, 10, 0, 11, 11, 11, 0, 12, 12, 12, 0, 13, 13, 13, 0, 14, 14, 14, 0, 15, 15, 15, 0};
unsigned char hz_coeffs[] = {1, 4, 7, 4, 1};
unsigned char vt_coeffs[] = {1, 4, 7, 4, 1};
unsigned int norm = 289;
int size=64, width=8, height=8;
unsigned char *img_data;
unsigned char *img_info;
int frame_len = 1 * width * height;
init_platform();
xil_printf("\r\n\nHelloworld application\r\n");
xil_printf("Setting I/O buffers\r\n");
// memset input buffer 1
for(i=0; i<size; i++){
Xil_Out8(MEM2VDMA_BUFFER1_BASEADDR + i, img[i]);
}
// memset input buffer 2
for(i=0; i<BUFFER_SIZE/4; i++) Xil_Out32(MEM2VDMA_BUFFER2_BASEADDR + i*4, 0xBBBBBBBB);
// memset input buffer 3
for(i=0; i<BUFFER_SIZE/4; i++) Xil_Out32(MEM2VDMA_BUFFER3_BASEADDR + i*4, 0xCCCCCCCC);
// memset output buffer 1
for(i=0; i<BUFFER_SIZE/4; i++) Xil_Out32(VDMA2MEM_BUFFER1_BASEADDR + i*4, 0xFFFFFFFF);
// memset output buffer 2
for(i=0; i<BUFFER_SIZE/4; i++) Xil_Out32(VDMA2MEM_BUFFER2_BASEADDR + i*4, 0xFFFFFFFF);
// memset output buffer 3
for(i=0; i<BUFFER_SIZE/4; i++) Xil_Out32(VDMA2MEM_BUFFER3_BASEADDR + i*4, 0xFFFFFFFF);
xil_printf("Setting VDMA registers\r\n");
//vdma_setup(&handle, page_size, AXI_VDMA_BASEADDR, width, height, PIXEL_CHANNELS, BUFFER_SIZE, MEM2VDMA_BUFFER1_BASEADDR, MEM2VDMA_BUFFER2_BASEADDR, MEM2VDMA_BUFFER3_BASEADDR, VDMA2MEM_BUFFER1_BASEADDR, VDMA2MEM_BUFFER2_BASEADDR, VDMA2MEM_BUFFER3_BASEADDR, AXI_PULSER_ADDR);
handle.baseAddr = AXI_VDMA_BASEADDR;
handle.width = 8;
handle.height = 8;
handle.pixelChannels = 1;
handle.fbLength = handle.width * handle.height * handle.pixelChannels;
handle.fb1PhysicalAddress_mm2s = 0x1f400000;
handle.fb2PhysicalAddress_mm2s = 0x1f500000;
handle.fb3PhysicalAddress_mm2s = 0x1f600000;
handle.fb1PhysicalAddress_s2mm = 0x1f700000;
handle.fb2PhysicalAddress_s2mm = 0x1f800000;
handle.fb3PhysicalAddress_s2mm = 0x1f900000;
handle.pulserPhysicalAddress = 0x46000000;
filter_handle.baseAddr = AXI_SEPIMGFILTER;
xil_printf("Setting sepImageFilter registers\r\n");
//sepImageFilter_setup_handle(&filter_handle, &handle.vdmaHandler, page_size, AXI_SEPIMGFILTER);
sepImageFilter_setImageParams(&filter_handle, width, height);
sepImageFilter_setHzKernelCoeffs(&filter_handle, hz_coeffs[0], hz_coeffs[1], hz_coeffs[2], hz_coeffs[3], hz_coeffs[4]);
sepImageFilter_setVtKernelCoeffs(&filter_handle, vt_coeffs[0], vt_coeffs[1], vt_coeffs[2], vt_coeffs[3], vt_coeffs[4]);
sepImageFilter_setNormalizationFactor(&filter_handle, norm);
sepImageFilter_setup(&filter_handle);
xil_printf("Setting up done.\r\n");
xil_printf("Starting VDMA triple buffering..\r\n");
//xil_printf("sepImageFilter status register: %d\r\n", Xil_In32(0x47000000));
sepImageFilter_start(&filter_handle);
vdma_start_triple_buffering_mod(&handle);
//while(1);
//xil_printf("Starting sepImageFilter..\r\n");
//xil_printf("VDMA and filter started.\r\n");
// Read the image
//xil_printf("sepImageFilter status register: %d\r\n", Xil_In32(0x47000000));
// wait for filter to finish
//xil_printf("Waiting the filter to finish: %d\r\n", sepImageFilter_running(&filter_handle) == 1);
while(sepImageFilter_running(&filter_handle) != 0);
//dcache_clean();
xil_printf("Print input buffer (0x%x):\r\n", handle.fb1PhysicalAddress_mm2s);
for(i=0; i<size; i++) xil_printf("[0x%x] 0x%x\r\n", handle.fb1PhysicalAddress_mm2s + (i<<2), Xil_In32(handle.fb1PhysicalAddress_mm2s + (i<<2)));
xil_printf("\r\n\n");
xil_printf("Print output buffer (0x%x):\r\n", handle.fb2PhysicalAddress_mm2s);
for(i=0; i<size; i++) xil_printf("[0x%x] 0x%x\r\n", handle.fb2PhysicalAddress_mm2s + (i<<2), Xil_In32(handle.fb2PhysicalAddress_mm2s + (i<<2)));
xil_printf("\r\n\n");
xil_printf("Print output buffer (0x%x):\r\n", handle.fb3PhysicalAddress_mm2s);
for(i=0; i<size; i++) xil_printf("[0x%x] 0x%x\r\n", handle.fb3PhysicalAddress_mm2s + (i<<2), Xil_In32(handle.fb3PhysicalAddress_mm2s + (i<<2)));
xil_printf("\n\n\r**********************************\r\n");
xil_printf("Print output buffer (0x%x):\r\n", handle.fb1PhysicalAddress_s2mm);
for(i=0; i<size; i++) xil_printf("[0x%x] 0x%x\r\n", handle.fb1PhysicalAddress_s2mm + (i<<2), Xil_In32(handle.fb1PhysicalAddress_s2mm + (i<<2)));
xil_printf("\r\n\n");
xil_printf("Print output buffer (0x%x):\r\n", handle.fb2PhysicalAddress_s2mm);
for(i=0; i<size; i++) xil_printf("[0x%x] 0x%x\r\n", handle.fb2PhysicalAddress_s2mm + (i<<2), Xil_In32(handle.fb2PhysicalAddress_s2mm + (i<<2)));
xil_printf("\r\n\n");
xil_printf("Print output buffer (0x%x):\r\n", handle.fb3PhysicalAddress_s2mm);
for(i=0; i<size; i++) xil_printf("[0x%x] 0x%x\r\n", handle.fb3PhysicalAddress_s2mm + (i<<2), Xil_In32(handle.fb3PhysicalAddress_s2mm + (i<<2)));
xil_printf("\r\n\n");
xil_printf("Bye!\r\n");
xil_printf("sepImageFilter status register: %d\r\n", Xil_In32(0x47000000));
while(1);
cleanup_platform();
return 0;
}
