コード例 #1
0
static void i2c_pxa_abort(struct pxa_i2c *i2c)
{
	unsigned long timeout = jiffies + HZ/4;

	if (i2c_pxa_is_slavemode(i2c)) {
		dev_dbg(&i2c->adap.dev, "%s: called in slave mode\n", __func__);
		return;
	}

	while (time_before(jiffies, timeout) && (readl(_IBMR(i2c)) & 0x1) == 0) {
		unsigned long icr = readl(_ICR(i2c));

		icr &= ~ICR_START;
		icr |= ICR_ACKNAK | ICR_STOP | ICR_TB;

		writel(icr, _ICR(i2c));

		show_state(i2c);

		msleep(1);
	}

	writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP),
	       _ICR(i2c));
}
コード例 #2
0
static int i2c_pxa_wait_slave(struct pxa_i2c *i2c)
{
	unsigned long timeout = jiffies + HZ*1;

	/* wait for stop */

	show_state(i2c);

	while (time_before(jiffies, timeout)) {
		if (i2c_debug > 1)
			dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));

		if ((readl(_ISR(i2c)) & (ISR_UB|ISR_IBB)) == 0 ||
		    (readl(_ISR(i2c)) & ISR_SAD) != 0 ||
		    (readl(_ICR(i2c)) & ICR_SCLE) == 0) {
			if (i2c_debug > 1)
				dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
			return 1;
		}

		msleep(1);
	}

	if (i2c_debug > 0)
		dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
	return 0;
}
コード例 #3
0
static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);

	/*
	 * Read the byte.
	 */
	i2c->msg->buf[i2c->msg_ptr++] = readl(_IDBR(i2c));

	if (i2c->msg_ptr < i2c->msg->len) {
		/*
		 * If this is the last byte of the last
		 * message, send a STOP.
		 */
		if (i2c->msg_ptr == i2c->msg->len - 1)
			icr |= ICR_STOP | ICR_ACKNAK;

		icr |= ICR_ALDIE | ICR_TB;
	} else {
		i2c_pxa_master_complete(i2c, 0);
	}

	i2c->icrlog[i2c->irqlogidx-1] = icr;

	writel(icr, _ICR(i2c));
}
コード例 #4
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
static void i2c_pxa_repeat_start(struct i2c_algo_pxa_data *adap)
{
	_ICR(adap) |= ICR_START;
	_ICR(adap) &= ~(ICR_STOP | ICR_ALDIE);

	adap->bus_error=0;	/* clear any bus_error from previous txfers */
	adap->tx_finished=0;    /* clear rx and tx interrupts */
	adap->rx_finished=0;    /* from previous txfers */
}
コード例 #5
0
static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
{
	if (isr & ISR_BED) {
		/* what should we do here? */
	} else {
		writel(0, _IDBR(i2c));
		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
	}
}
コード例 #6
0
static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	unsigned int byte = readl(_IDBR(i2c));

	if (i2c->slave != NULL)
		i2c->slave->write(i2c->slave->data, byte);

	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
}
コード例 #7
0
/*
 * clear the hold on the bus, and take of anything else
 * that has been configured
 */
static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
{
	show_state(i2c);

	if (errcode < 0) {
		udelay(100);   /* simple delay */
	} else {
		/* we need to wait for the stop condition to end */

		/* if we where in stop, then clear... */
		if (readl(_ICR(i2c)) & ICR_STOP) {
			udelay(100);
			writel(readl(_ICR(i2c)) & ~ICR_STOP, _ICR(i2c));
		}

		if (!i2c_pxa_wait_slave(i2c)) {
			dev_err(&i2c->adap.dev, "%s: wait timedout\n",
				__func__);
			return;
		}
	}

	writel(readl(_ICR(i2c)) & ~(ICR_STOP|ICR_ACKNAK|ICR_MA), _ICR(i2c));
	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));

	if (i2c_debug) {
		dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c)));
		decode_ICR(readl(_ICR(i2c)));
	}
}
コード例 #8
0
static void i2c_pxa_reset(struct pxa_i2c *i2c)
{
	pr_debug("Resetting I2C Controller Unit\n");

	/* abort any transfer currently under way */
	i2c_pxa_abort(i2c);

	/* reset according to 9.8 */
	writel(ICR_UR, _ICR(i2c));
	writel(I2C_ISR_INIT, _ISR(i2c));
	writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));

	writel(i2c->slave_addr, _ISAR(i2c));

	/* set control register values */
	writel(I2C_ICR_INIT, _ICR(i2c));

#ifdef CONFIG_I2C_PXA_SLAVE
	dev_info(&i2c->adap.dev, "Enabling slave mode\n");
	writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c));
#endif

	i2c_pxa_set_slave(i2c, 0);

	/* enable unit */
	writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
	udelay(100);
}
コード例 #9
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
static void i2c_pxa_transfer(struct i2c_algo_pxa_data *adap,
			     int lastbyte, int receive, int midbyte)
{
	if( lastbyte)
	{
		if( receive==I2C_RECEIVE) _ICR(adap) |= ICR_ACKNAK; 
		i2c_pxa_stop(adap);
	}
	else if( midbyte)
	{
		i2c_pxa_midbyte(adap);
	}
	_ICR(adap) |= ICR_TB;
}
コード例 #10
0
static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
{
	if (isr & ISR_BED) {
		/* what should we do here? */
	} else {
		int ret = 0;

		if (i2c->slave != NULL)
			ret = i2c->slave->read(i2c->slave->data);

		writel(ret, _IDBR(i2c));
		writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));   /* allow next byte */
	}
}
コード例 #11
0
static inline void i2c_pxa_start_message(struct pxa_i2c *i2c)
{
	u32 icr;

	/*
	 * Step 1: target slave address into IDBR
	 */
	writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));

	/*
	 * Step 2: initiate the write.
	 */
	icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
	writel(icr | ICR_START | ICR_TB, _ICR(i2c));
}
コード例 #12
0
static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
{
	struct pxa_i2c *i2c = adap->algo_data;
	int ret, i;

	/* If the I2C controller is disabled we need to reset it (probably due
 	   to a suspend/resume destroying state). We do this here as we can then
 	   avoid worrying about resuming the controller before its users. */
	if (!(readl(_ICR(i2c)) & ICR_IUE))
		i2c_pxa_reset(i2c);

	for (i = adap->retries; i >= 0; i--) {
		ret = i2c_pxa_do_xfer(i2c, msgs, num);
		if (ret != I2C_RETRY)
			goto out;

		if (i2c_debug)
			dev_dbg(&adap->dev, "Retrying transmission\n");
		udelay(100);
	}
	i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
	ret = -EREMOTEIO;
 out:
	i2c_pxa_set_slave(i2c, ret);
	return ret;
}
コード例 #13
0
static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
{
	unsigned long timeout = jiffies + HZ*4;

	while (time_before(jiffies, timeout)) {
		if (i2c_debug > 1)
			dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
				__func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));

		if (readl(_ISR(i2c)) & ISR_SAD) {
			if (i2c_debug > 0)
				dev_dbg(&i2c->adap.dev, "%s: Slave detected\n", __func__);
			goto out;
		}

		/* wait for unit and bus being not busy, and we also do a
		 * quick check of the i2c lines themselves to ensure they've
		 * gone high...
		 */
		if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 && readl(_IBMR(i2c)) == 3) {
			if (i2c_debug > 0)
				dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
			return 1;
		}

		msleep(1);
	}

	if (i2c_debug > 0)
		dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
 out:
	return 0;
}
コード例 #14
0
static int i2c_pxa_set_master(struct pxa_i2c *i2c)
{
	if (i2c_debug)
		dev_dbg(&i2c->adap.dev, "setting to bus master\n");

	if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) != 0) {
		dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__);
		if (!i2c_pxa_wait_master(i2c)) {
			dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__);
			return I2C_RETRY;
		}
	}

	writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
	return 0;
}
コード例 #15
0
static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
{
	unsigned int i;
	printk("i2c: error: %s\n", why);
	printk("i2c: msg_num: %d msg_idx: %d msg_ptr: %d\n",
		i2c->msg_num, i2c->msg_idx, i2c->msg_ptr);
	printk("i2c: ICR: %08x ISR: %08x\n"
	       "i2c: log: ", readl(_ICR(i2c)), readl(_ISR(i2c)));
	for (i = 0; i < i2c->irqlogidx; i++)
		printk("[%08x:%08x] ", i2c->isrlog[i], i2c->icrlog[i]);
	printk("\n");
}
コード例 #16
0
static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
{
	int timeout;

	/*
	 * slave could interrupt in the middle of us generating a
	 * start condition... if this happens, we'd better back off
	 * and stop holding the poor thing up
	 */
	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));

	timeout = 0x10000;

	while (1) {
		if ((readl(_IBMR(i2c)) & 2) == 2)
			break;

		timeout--;

		if (timeout <= 0) {
			dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
			break;
		}
	}

	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
}
コード例 #17
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
void ezx_i2c_pm_resume(void)
{
        /* enable clocks */
        CKEN |= CKEN14_I2C;
        set_GPIO_mode(117 | GPIO_ALT_FN_1_IN);
        set_GPIO_mode(118 | GPIO_ALT_FN_1_IN);
        /* enable irqs */
        enable_irq(i2c_pxa_data.irq);
        /* disable unit */
        _ICR(adap) &= ~ICR_IUE;
        /* reset the unit */
        _ICR(adap) |= ICR_UR;
        udelay(100);
        _ICR(adap) |= ICR_FM;
        /* disable unit */
        _ICR(adap) &= ~ICR_IUE;
        /* XXX: I2C_PXA_SLAVE_ADDR == I2C_PXA_PWR_SLAVE_ADDR ??? */
        /* set our slave address */
        _ISAR(adap) = I2C_PXA_SLAVE_ADDR;
        /* set control register values */
        _ICR(adap) = I2C_ICR_INIT;
        /* set clear interrupt bits */
        _ISR(adap) = I2C_ISR_INIT;
        /* enable unit */
        _ICR(adap) |= ICR_IUE;
        udelay(100);					
}
コード例 #18
0
static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
{
	struct pxa_i2c *i2c = dev_id;
	u32 isr = readl(_ISR(i2c));

	if (i2c_debug > 2 && 0) {
		dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
			__func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
		decode_ISR(isr);
	}

	if (i2c->irqlogidx < ARRAY_SIZE(i2c->isrlog))
		i2c->isrlog[i2c->irqlogidx++] = isr;

	show_state(i2c);

	/*
	 * Always clear all pending IRQs.
	 */
	writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c));

	if (isr & ISR_SAD)
		i2c_pxa_slave_start(i2c, isr);
	if (isr & ISR_SSD)
		i2c_pxa_slave_stop(i2c);

	if (i2c_pxa_is_slavemode(i2c)) {
		if (isr & ISR_ITE)
			i2c_pxa_slave_txempty(i2c, isr);
		if (isr & ISR_IRF)
			i2c_pxa_slave_rxfull(i2c, isr);
	} else if (i2c->msg) {
		if (isr & ISR_ITE)
			i2c_pxa_irq_txempty(i2c, isr);
		if (isr & ISR_IRF)
			i2c_pxa_irq_rxfull(i2c, isr);
	} else {
		i2c_pxa_scream_blue_murder(i2c, "spurious irq");
	}

	return IRQ_HANDLED;
}
コード例 #19
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
static void i2c_pxa_reset(struct i2c_algo_pxa_data *adap)
{
        /* set the global I2C clocks on */
        CKEN |= CKEN14_I2C;

	set_GPIO_mode(117 | GPIO_ALT_FN_1_IN);
	set_GPIO_mode(118 | GPIO_ALT_FN_1_IN);

#ifdef CONFIG_POWER_I2C
        /* set the global PWR_I2C clock on */
        CKEN |= CKEN15_PWRI2C;

	/* Enable PI2C controller PWR_SCL and PWR_SDA */
	PCFR |= PCFR_PI2CEN;

	/* Setup GPIO3 and GPIO4 to ALT_FN1_IN (PWR_SCL and PWR_SDA) */
	set_GPIO_mode(3 | GPIO_ALT_FN_1_IN);
	set_GPIO_mode(4 | GPIO_ALT_FN_1_IN);

#endif

        /* disable unit */
	_ICR(adap) &= ~ICR_IUE;

        /* reset the unit */
	_ICR(adap) |= ICR_UR;
        udelay(100);
	_ICR(adap) |= ICR_FM;
	
        /* disable unit */
	_ICR(adap) &= ~ICR_IUE;

	/* XXX: I2C_PXA_SLAVE_ADDR == I2C_PXA_PWR_SLAVE_ADDR ??? */
        /* set our slave address */
	_ISAR(adap) = I2C_PXA_SLAVE_ADDR;

        /* set control register values */
	_ICR(adap) = I2C_ICR_INIT;

        /* set clear interrupt bits */
	_ISR(adap) = I2C_ISR_INIT;

        /* enable unit */
	_ICR(adap) |= ICR_IUE;
        udelay(100);

}
コード例 #20
0
static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
{
	int timeout;

	if (i2c_debug > 0)
		dev_dbg(&i2c->adap.dev, "SAD, mode is slave-%cx\n",
		       (isr & ISR_RWM) ? 'r' : 't');

	if (i2c->slave != NULL)
		i2c->slave->event(i2c->slave->data,
				 (isr & ISR_RWM) ? I2C_SLAVE_EVENT_START_READ : I2C_SLAVE_EVENT_START_WRITE);

	/*
	 * slave could interrupt in the middle of us generating a
	 * start condition... if this happens, we'd better back off
	 * and stop holding the poor thing up
	 */
	writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
	writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));

	timeout = 0x10000;

	while (1) {
		if ((readl(_IBMR(i2c)) & 2) == 2)
			break;

		timeout--;

		if (timeout <= 0) {
			dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
			break;
		}
	}

	writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
}
コード例 #21
0
static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
{
	writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
}
コード例 #22
0
static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
{
	return !(readl(_ICR(i2c)) & ICR_SCLE);
}
コード例 #23
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
static void i2c_pxa_abort(struct i2c_algo_pxa_data *adap)
{
	_ICR(adap) |= ICR_MA;
}
コード例 #24
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
static void i2c_pxa_midbyte(struct i2c_algo_pxa_data *adap)
{
	_ICR(adap) &= ~(ICR_START | ICR_STOP);
}
コード例 #25
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
static void i2c_pxa_stop(struct i2c_algo_pxa_data *adap)
{
	_ICR(adap) |= ICR_STOP;
	_ICR(adap) &= ~(ICR_START);
}
コード例 #26
0
static void i2c_pxa_irq_txempty(struct pxa_i2c *i2c, u32 isr)
{
	u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);

 again:
	/*
	 * If ISR_ALD is set, we lost arbitration.
	 */
	if (isr & ISR_ALD) {
		/*
		 * Do we need to do anything here?  The PXA docs
		 * are vague about what happens.
		 */
		i2c_pxa_scream_blue_murder(i2c, "ALD set");

		/*
		 * We ignore this error.  We seem to see spurious ALDs
		 * for seemingly no reason.  If we handle them as I think
		 * they should, we end up causing an I2C error, which
		 * is painful for some systems.
		 */
		return; /* ignore */
	}

	if (isr & ISR_BED) {
		int ret = BUS_ERROR;

		/*
		 * I2C bus error - either the device NAK'd us, or
		 * something more serious happened.  If we were NAK'd
		 * on the initial address phase, we can retry.
		 */
		if (isr & ISR_ACKNAK) {
			if (i2c->msg_ptr == 0 && i2c->msg_idx == 0)
				ret = I2C_RETRY;
			else
				ret = XFER_NAKED;
		}
		i2c_pxa_master_complete(i2c, ret);
	} else if (isr & ISR_RWM) {
		/*
		 * Read mode.  We have just sent the address byte, and
		 * now we must initiate the transfer.
		 */
		if (i2c->msg_ptr == i2c->msg->len - 1 &&
		    i2c->msg_idx == i2c->msg_num - 1)
			icr |= ICR_STOP | ICR_ACKNAK;

		icr |= ICR_ALDIE | ICR_TB;
	} else if (i2c->msg_ptr < i2c->msg->len) {
		/*
		 * Write mode.  Write the next data byte.
		 */
		writel(i2c->msg->buf[i2c->msg_ptr++], _IDBR(i2c));

		icr |= ICR_ALDIE | ICR_TB;

		/*
		 * If this is the last byte of the last message, send
		 * a STOP.
		 */
		if (i2c->msg_ptr == i2c->msg->len &&
		    i2c->msg_idx == i2c->msg_num - 1)
			icr |= ICR_STOP;
	} else if (i2c->msg_idx < i2c->msg_num - 1) {
		/*
		 * Next segment of the message.
		 */
		i2c->msg_ptr = 0;
		i2c->msg_idx ++;
		i2c->msg++;

		/*
		 * If we aren't doing a repeated start and address,
		 * go back and try to send the next byte.  Note that
		 * we do not support switching the R/W direction here.
		 */
		if (i2c->msg->flags & I2C_M_NOSTART)
			goto again;

		/*
		 * Write the next address.
		 */
		writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));

		/*
		 * And trigger a repeated start, and send the byte.
		 */
		icr &= ~ICR_ALDIE;
		icr |= ICR_START | ICR_TB;
	} else {
		if (i2c->msg->len == 0) {
			/*
			 * Device probes have a message length of zero
			 * and need the bus to be reset before it can
			 * be used again.
			 */
			i2c_pxa_reset(i2c);
		}
		i2c_pxa_master_complete(i2c, 0);
	}

	i2c->icrlog[i2c->irqlogidx-1] = icr;

	writel(icr, _ICR(i2c));
	show_state(i2c);
}
コード例 #27
0
ファイル: i2c-adap-pxa.c プロジェクト: muromec/linux-ezxdev
static int ezx_i2c_pm_callback(struct pm_dev *pm_dev, pm_request_t req, void *data)
{
	switch(req)
	{
	case PM_SUSPEND:
		/* disable IRQs */
		if (i2c_pxa_data.irq) 
		          disable_irq(i2c_pxa_data.irq);
		/* disable PI2C Controller */
		PCFR &= ~PCFR_PI2CEN;
		
		/* disable clocks */
		CKEN &= ~CKEN14_I2C;

#ifdef CONFIG_POWER_I2C
		if (i2c_pxa_pwr_data.irq)
		          disable_irq(i2c_pxa_pwr_data.irq);
		/* disable PI2C Controller */
		PCFR &= ~PCFR_PI2CEN;
		CKEN &= ~CKEN15_PWRI2C;
#endif		
		break;
	case PM_RESUME:
        /* enable clocks */
        CKEN |= CKEN14_I2C;

        set_GPIO_mode(117 | GPIO_ALT_FN_1_IN);
        set_GPIO_mode(118 | GPIO_ALT_FN_1_IN);
        /* enable irqs */
        enable_irq(i2c_pxa_data.irq);
#ifdef CONFIG_POWER_I2C
      	/* set the global PWR_I2C clock on */
        CKEN |= CKEN15_PWRI2C;

		/* Enable PI2C controller PWR_SCL and PWR_SDA */
		PCFR |= PCFR_PI2CEN;
        set_GPIO_mode(3 | GPIO_ALT_FN_1_IN);
        set_GPIO_mode(4 | GPIO_ALT_FN_1_IN);
		enable_irq(i2c_pxa_pwr_data.irq);
#endif	
	
 	    /* disable unit */
		_ICR(adap) &= ~ICR_IUE;

	    /* reset the unit */
		_ICR(adap) |= ICR_UR;
	    udelay(100);
		_ICR(adap) |= ICR_FM;
        /* disable unit */
		_ICR(adap) &= ~ICR_IUE;

		/* XXX: I2C_PXA_SLAVE_ADDR == I2C_PXA_PWR_SLAVE_ADDR ??? */
	    /* set our slave address */
		_ISAR(adap) = I2C_PXA_SLAVE_ADDR;

	    /* set control register values */
		_ICR(adap) = I2C_ICR_INIT;

    	/* set clear interrupt bits */
		_ISR(adap) = I2C_ISR_INIT;

        /* enable unit */
		_ICR(adap) |= ICR_IUE;
        udelay(100);	
		break;
	}
	return 0;
}
コード例 #28
0
static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
{
	dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno,
		readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
}