void
cpu_getmcontext(struct lwp *l, mcontext_t *mcp, unsigned int *flags)
{
const struct trapframe *tf = l->l_md.md_utf;
__greg_t *gr = mcp->__gregs;
__greg_t ras_pc;
/* Save register context. Dont copy R0 - it is always 0 */
memcpy(&gr[_REG_AT], &tf->tf_regs[_R_AST], sizeof(mips_reg_t) * 31);
gr[_REG_MDLO] = tf->tf_regs[_R_MULLO];
gr[_REG_MDHI] = tf->tf_regs[_R_MULHI];
gr[_REG_CAUSE] = tf->tf_regs[_R_CAUSE];
gr[_REG_EPC] = tf->tf_regs[_R_PC];
gr[_REG_SR] = tf->tf_regs[_R_SR];
mcp->_mc_tlsbase = (intptr_t)l->l_private;
if ((ras_pc = (intptr_t)ras_lookup(l->l_proc,
(void *) (intptr_t)gr[_REG_EPC])) != -1)
gr[_REG_EPC] = ras_pc;
*flags |= _UC_CPU | _UC_TLSBASE;
/* Save floating point register context, if any. */
KASSERT(l == curlwp);
if (fpu_used_p()) {
size_t fplen;
/*
* If this process is the current FP owner, dump its
* context to the PCB first.
*/
fpu_save();
/*
* The PCB FP regs struct includes the FP CSR, so use the
* size of __fpregs.__fp_r when copying.
*/
#if !defined(__mips_o32)
if (_MIPS_SIM_NEWABI_P(l->l_proc->p_md.md_abi)) {
#endif
fplen = sizeof(struct fpreg);
#if !defined(__mips_o32)
} else {
fplen = sizeof(struct fpreg_oabi);
}
#endif
struct pcb * const pcb = lwp_getpcb(l);
memcpy(&mcp->__fpregs, &pcb->pcb_fpregs, fplen);
*flags |= _UC_FPU;
}
}
int
cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags)
{
struct trapframe *tf = l->l_md.md_utf;
struct proc *p = l->l_proc;
const __greg_t *gr = mcp->__gregs;
int error;
/* Restore register context, if any. */
if (flags & _UC_CPU) {
error = cpu_mcontext_validate(l, mcp);
if (error)
return error;
/* Save register context. */
#ifdef __mips_n32
CTASSERT(_R_AST == _REG_AT);
if (__predict_false(p->p_md.md_abi == _MIPS_BSD_API_O32)) {
const mcontext_o32_t *mcp32 = (const mcontext_o32_t *)mcp;
const __greg32_t *gr32 = mcp32->__gregs;
for (size_t i = _R_AST; i < 32; i++) {
tf->tf_regs[i] = gr32[i];
}
} else
#endif
memcpy(&tf->tf_regs[_R_AST], &gr[_REG_AT],
sizeof(mips_reg_t) * 31);
tf->tf_regs[_R_MULLO] = gr[_REG_MDLO];
tf->tf_regs[_R_MULHI] = gr[_REG_MDHI];
tf->tf_regs[_R_CAUSE] = gr[_REG_CAUSE];
tf->tf_regs[_R_PC] = gr[_REG_EPC];
/* Do not restore SR. */
}
/* Restore the private thread context */
if (flags & _UC_TLSBASE) {
lwp_setprivate(l, (void *)(intptr_t)mcp->_mc_tlsbase);
}
/* Restore floating point register context, if any. */
if (flags & _UC_FPU) {
size_t fplen;
/* Disable the FPU contents. */
fpu_discard();
#if !defined(__mips_o32)
if (_MIPS_SIM_NEWABI_P(l->l_proc->p_md.md_abi)) {
#endif
fplen = sizeof(struct fpreg);
#if !defined(__mips_o32)
} else {
fplen = sizeof(struct fpreg_oabi);
}
#endif
/*
* The PCB FP regs struct includes the FP CSR, so use the
* proper size of fpreg when copying.
*/
struct pcb * const pcb = lwp_getpcb(l);
memcpy(&pcb->pcb_fpregs, &mcp->__fpregs, fplen);
}
mutex_enter(p->p_lock);
if (flags & _UC_SETSTACK)
l->l_sigstk.ss_flags |= SS_ONSTACK;
if (flags & _UC_CLRSTACK)
l->l_sigstk.ss_flags &= ~SS_ONSTACK;
mutex_exit(p->p_lock);
return (0);
}
void
EMULNAME(syscall)(struct lwp *l, u_int status, u_int cause, vaddr_t pc)
{
struct proc *p = l->l_proc;
struct trapframe *tf = l->l_md.md_utf;
struct reg *reg = &tf->tf_registers;
mips_reg_t *fargs = ®->r_regs[_R_A0];
register_t *args = NULL;
register_t copyargs[2+SYS_MAXSYSARGS];
vaddr_t usp;
size_t nargs;
const struct sysent *callp;
int code, error;
#if defined(__mips_o32)
const int abi = _MIPS_BSD_API_O32;
KASSERTMSG(p->p_md.md_abi == abi,
"pid %d(%p): md_abi(%d) != abi(%d)",
p->p_pid, p, p->p_md.md_abi, abi);
size_t nregs = 4;
#else
const int abi = p->p_md.md_abi;
size_t nregs = _MIPS_SIM_NEWABI_P(abi) ? 8 : 4;
size_t i;
#endif
LWP_CACHE_CREDS(l, p);
curcpu()->ci_data.cpu_nsyscall++;
if (cause & MIPS_CR_BR_DELAY)
reg->r_regs[_R_PC] = mips_emul_branch(tf, pc, 0, false);
else
reg->r_regs[_R_PC] = pc + sizeof(uint32_t);
callp = p->p_emul->e_sysent;
const mips_reg_t saved_v0 = reg->r_regs[_R_V0];
code = saved_v0 - SYSCALL_SHIFT;
if (code == SYS_syscall
|| (code == SYS___syscall && abi != _MIPS_BSD_API_O32)) {
/*
* Code is first argument, followed by actual args.
*/
code = *fargs++ - SYSCALL_SHIFT;
nregs--;
} else if (code == SYS___syscall) {
/*
* Like syscall, but code is a quad, so as to maintain
* quad alignment for the rest of the arguments.
*/
code = fargs[_QUAD_LOWWORD] - SYSCALL_SHIFT;
fargs += 2;
nregs -= 2;
}
if (code >= p->p_emul->e_nsysent)
callp += p->p_emul->e_nosys;
else
callp += code;
nargs = callp->sy_narg;
#if !defined(__mips_o32)
if (abi != _MIPS_BSD_API_O32) {
#endif
CTASSERT(sizeof(copyargs[0]) == sizeof(fargs[0]));
if (nargs <= nregs) {
/*
* Just use the trapframe for the source of arguments
*/
args = fargs;
} else {
const size_t nsaved = _MIPS_SIM_NEWABI_P(abi) ? 0 : 4;
KASSERT(nargs <= __arraycount(copyargs));
args = copyargs;
/*
* Copy the arguments passed via register from the * trapframe to our argument array
*/
memcpy(copyargs, fargs, nregs * sizeof(register_t));
/*
* Start copying args skipping the register slots
* slots on the stack.
*/
usp = reg->r_regs[_R_SP] + nsaved*sizeof(register_t);
error = copyin((register_t *)usp, ©args[nregs],
(nargs - nregs) * sizeof(copyargs[0]));
if (error)
goto bad;
}
#if !defined(__mips_o32)
} else do {
/*
* The only difference between O32 and N32 is the calling
* sequence. If you make O32
*/
int32_t copy32args[SYS_MAXSYSARGS];
int32_t *cargs = copy32args;
unsigned int arg64mask = SYCALL_ARG_64_MASK(callp);
bool doing_arg64;
size_t narg64 = SYCALL_NARGS64(callp);
/*
* All arguments are 32bits wide and 64bit arguments use
* two 32bit registers or stack slots. We need to remarshall
* them into 64bit slots
*/
args = copyargs;
CTASSERT(sizeof(copy32args[0]) != sizeof(fargs[0]));
/*
* If there are no 64bit arguments and all arguments were in
* registers, just use the trapframe for the source of arguments
*/
if (nargs <= nregs && narg64 == 0) {
args = fargs;
break;
}
if (nregs <= nargs + narg64) {
/*
* Grab the non-register arguments from the stack
* after skipping the slots for the 4 register passed
* arguments.
*/
usp = reg->r_regs[_R_SP] + 4*sizeof(int32_t);
error = copyin((int32_t *)usp, copy32args,
(nargs + narg64 - nregs) * sizeof(copy32args[0]));
if (error)
goto bad;
}
/*
* Copy all the arguments to copyargs, starting with the ones
* in registers. Using the hints in the 64bit argmask,
* we marshall the passed 32bit values into 64bit slots. If we
* encounter a 64 bit argument, we grab two adjacent 32bit
* values and synthesize the 64bit argument.
*/
for (i = 0, doing_arg64 = false; i < nargs + narg64;) {
register_t arg;
if (nregs > 0) {
arg = (int32_t) *fargs++;
nregs--;
} else {
arg = *cargs++;
}
if (__predict_true((arg64mask & 1) == 0)) {
/*
* Just copy it with sign extension on
*/
copyargs[i++] = (int32_t) arg;
arg64mask >>= 1;
continue;
}
/*
* 64bit arg. grab the low 32 bits, discard the high.
*/
arg = (uint32_t)arg;
if (!doing_arg64) {
/*
* Pick up the 1st word of a 64bit arg.
* If lowword == 1 then highword == 0,
* so this is the highword and thus
* shifted left by 32, otherwise
* lowword == 0 and highword == 1 so
* it isn't shifted at all. Remember
* we still need another word.
*/
doing_arg64 = true;
copyargs[i] = arg << (_QUAD_LOWWORD*32);
narg64--; /* one less 64bit arg */
} else {
/*
* Pick up the 2nd word of a 64bit arg.
* if highword == 1, it's shifted left
* by 32, otherwise lowword == 1 and
* highword == 0 so it isn't shifted at
* all. And now head to the next argument.
*/
doing_arg64 = false;
copyargs[i++] |= arg << (_QUAD_HIGHWORD*32);
arg64mask >>= 1;
}
}
} while (/*CONSTCOND*/ 0); /* avoid a goto */
#endif
#ifdef MIPS_SYSCALL_DEBUG
if (p->p_emul->e_syscallnames)
printf("syscall %s:", p->p_emul->e_syscallnames[code]);
else
printf("syscall %u:", code);
if (nargs == 0)
printf(" <no args>");
else for (size_t j = 0; j < nargs; j++) {
if (j == nregs) printf(" *");
printf(" [%s%zu]=%#"PRIxREGISTER,
SYCALL_ARG_64_P(callp, j) ? "+" : "",
j, args[j]);
}
printf("\n");
#endif
error = sy_invoke(callp, l, args, ®->r_regs[_R_V0], code);
switch (error) {
case 0:
#if !defined(__mips_o32)
if (abi == _MIPS_BSD_API_O32 && SYCALL_RET_64_P(callp)) {
/*
* If this is from O32 and it's a 64bit quantity,
* split it into 2 32bit values in adjacent registers.
*/
mips_reg_t tmp = reg->r_regs[_R_V0];
reg->r_regs[_R_V0 + _QUAD_LOWWORD] = (int32_t) tmp;
reg->r_regs[_R_V0 + _QUAD_HIGHWORD] = tmp >> 32;
}
#endif
#ifdef MIPS_SYSCALL_DEBUG
if (p->p_emul->e_syscallnames)
printf("syscall %s:", p->p_emul->e_syscallnames[code]);
else
printf("syscall %u:", code);
printf(" return v0=%#"PRIxREGISTER" v1=%#"PRIxREGISTER"\n",
reg->r_regs[_R_V0], reg->r_regs[_R_V1]);
#endif
reg->r_regs[_R_A3] = 0;
break;
case ERESTART:
reg->r_regs[_R_V0] = saved_v0; /* restore syscall code */
reg->r_regs[_R_PC] = pc;
break;
case EJUSTRETURN:
break; /* nothing to do */
default:
bad:
if (p->p_emul->e_errno)
error = p->p_emul->e_errno[error];
reg->r_regs[_R_V0] = error;
reg->r_regs[_R_A3] = 1;
#ifdef MIPS_SYSCALL_DEBUG
if (p->p_emul->e_syscallnames)
printf("syscall %s:", p->p_emul->e_syscallnames[code]);
else
printf("syscall %u:", code);
printf(" return error=%d\n", error);
#endif
break;
}
