void _CPU_ISR_Set_level( uint32_t new_level ) { uint32_t status = _Nios2_Get_ctlreg_status(); status = _Nios2_ISR_Set_level( new_level, status ); _Nios2_Set_ctlreg_status( status ); }
bool _ISR_Is_in_progress( void ) { if ( _Nios2_Has_internal_interrupt_controller() ) { return _ISR_Nest_level != 0; } else { uint32_t status = _Nios2_Get_ctlreg_status(); return (status & NIOS2_STATUS_IH) != 0; } }
uint32_t _CPU_ISR_Get_level( void ) { uint32_t status = _Nios2_Get_ctlreg_status(); uint32_t level = 0; switch ( _Nios2_ISR_Get_status_mask() ) { case NIOS2_ISR_STATUS_MASK_IIC: level = (status & NIOS2_STATUS_PIE) == 0; break; case NIOS2_ISR_STATUS_MASK_EIC_IL: level = (status & NIOS2_STATUS_IL_MASK) >> NIOS2_STATUS_IL_OFFSET; break; case NIOS2_ISR_STATUS_MASK_EIC_RSIE: level = (status & NIOS2_STATUS_RSIE) == 0; break; default: /* FIXME */ _Terminate( INTERNAL_ERROR_CORE, false, 0xdeadbeef ); break; } return level; }