void _Thread_Start_multitasking( void )
{
Per_CPU_Control *cpu_self = _Per_CPU_Get();
Thread_Control *heir;
#if defined(RTEMS_SMP)
_Per_CPU_State_change( cpu_self, PER_CPU_STATE_UP );
/*
* Threads begin execution in the _Thread_Handler() function. This
* function will set the thread dispatch disable level to zero.
*/
cpu_self->thread_dispatch_disable_level = 1;
#endif
heir = _Thread_Get_heir_and_make_it_executing( cpu_self );
/*
* Get the init task(s) running.
*
* Note: Thread_Dispatch() is normally used to dispatch threads. As
* part of its work, Thread_Dispatch() restores floating point
* state for the heir task.
*
* This code avoids Thread_Dispatch(), and so we have to restore
* (actually initialize) the floating point state "by hand".
*
* Ignore the CPU_USE_DEFERRED_FP_SWITCH because we must always
* switch in the first thread if it is FP.
*/
#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
/*
* don't need to worry about saving BSP's floating point state
*/
if ( heir->fp_context != NULL )
_Context_Restore_fp( &heir->fp_context );
#endif
_Profiling_Thread_dispatch_disable( cpu_self, 0 );
#if defined(RTEMS_SMP)
/*
* The _CPU_Context_Restart_self() implementations usually assume that self
* context is executing.
*
* FIXME: We have a race condition here in case another thread already
* performed scheduler operations and moved our heir thread to another
* processor. The time frame for this is likely too small to be practically
* relevant.
*/
_CPU_Context_Set_is_executing( &heir->Registers, true );
#endif
#if defined(_CPU_Start_multitasking)
_CPU_Start_multitasking( &heir->Registers );
#else
_CPU_Context_Restart_self( &heir->Registers );
#endif
}
void _Thread_Dispatch( void )
{
ISR_Level level;
Per_CPU_Control *cpu_self;
_ISR_Disable_without_giant( level );
cpu_self = _Per_CPU_Get();
if ( cpu_self->dispatch_necessary ) {
_Profiling_Thread_dispatch_disable( cpu_self, 0 );
cpu_self->thread_dispatch_disable_level = 1;
_Thread_Do_dispatch( cpu_self, level );
} else {
_ISR_Enable_without_giant( level );
}
}
void _Thread_Dispatch( void )
{
Per_CPU_Control *cpu_self;
Thread_Control *executing;
ISR_Level level;
#if defined( RTEMS_SMP )
/*
* On SMP the complete context switch must be atomic with respect to one
* processor. See also _Thread_Handler() since _Context_switch() may branch
* to this function.
*/
_ISR_Disable_without_giant( level );
#endif
cpu_self = _Per_CPU_Get();
_Assert( cpu_self->thread_dispatch_disable_level == 0 );
_Profiling_Thread_dispatch_disable( cpu_self, 0 );
cpu_self->thread_dispatch_disable_level = 1;
/*
* Now determine if we need to perform a dispatch on the current CPU.
*/
executing = cpu_self->executing;
#if !defined( RTEMS_SMP )
_ISR_Disable( level );
#endif
#if defined( RTEMS_SMP )
if ( cpu_self->dispatch_necessary ) {
#else
while ( cpu_self->dispatch_necessary ) {
#endif
Thread_Control *heir = _Thread_Get_heir_and_make_it_executing( cpu_self );
/*
* When the heir and executing are the same, then we are being
* requested to do the post switch dispatching. This is normally
* done to dispatch signals.
*/
if ( heir == executing )
goto post_switch;
/*
* Since heir and executing are not the same, we need to do a real
* context switch.
*/
#if __RTEMS_ADA__
executing->rtems_ada_self = rtems_ada_self;
rtems_ada_self = heir->rtems_ada_self;
#endif
if ( heir->budget_algorithm == THREAD_CPU_BUDGET_ALGORITHM_RESET_TIMESLICE )
heir->cpu_time_budget = rtems_configuration_get_ticks_per_timeslice();
#if !defined( RTEMS_SMP )
_ISR_Enable( level );
#endif
#ifndef __RTEMS_USE_TICKS_FOR_STATISTICS__
_Thread_Update_cpu_time_used(
executing,
&cpu_self->time_of_last_context_switch
);
#else
{
_TOD_Get_uptime( &cpu_self->time_of_last_context_switch );
heir->cpu_time_used++;
}
#endif
#if !defined(__DYNAMIC_REENT__)
/*
* Switch libc's task specific data.
*/
if ( _Thread_libc_reent ) {
executing->libc_reent = *_Thread_libc_reent;
*_Thread_libc_reent = heir->libc_reent;
}
#endif
_User_extensions_Thread_switch( executing, heir );
/*
* If the CPU has hardware floating point, then we must address saving
* and restoring it as part of the context switch.
*
* The second conditional compilation section selects the algorithm used
* to context switch between floating point tasks. The deferred algorithm
* can be significantly better in a system with few floating point tasks
* because it reduces the total number of save and restore FP context
* operations. However, this algorithm can not be used on all CPUs due
* to unpredictable use of FP registers by some compilers for integer
* operations.
*/
#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
#if ( CPU_USE_DEFERRED_FP_SWITCH != TRUE )
if ( executing->fp_context != NULL )
_Context_Save_fp( &executing->fp_context );
#endif
#endif
_Context_Switch( &executing->Registers, &heir->Registers );
#if ( CPU_HARDWARE_FP == TRUE ) || ( CPU_SOFTWARE_FP == TRUE )
#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
if ( (executing->fp_context != NULL) &&
!_Thread_Is_allocated_fp( executing ) ) {
if ( _Thread_Allocated_fp != NULL )
_Context_Save_fp( &_Thread_Allocated_fp->fp_context );
_Context_Restore_fp( &executing->fp_context );
_Thread_Allocated_fp = executing;
}
#else
if ( executing->fp_context != NULL )
_Context_Restore_fp( &executing->fp_context );
#endif
#endif
/*
* We have to obtain this value again after the context switch since the
* heir thread may have migrated from another processor. Values from the
* stack or non-volatile registers reflect the old execution environment.
*/
cpu_self = _Per_CPU_Get();
_Thread_Debug_set_real_processor( executing, cpu_self );
#if !defined( RTEMS_SMP )
_ISR_Disable( level );
#endif
}
post_switch:
_Assert( cpu_self->thread_dispatch_disable_level == 1 );
cpu_self->thread_dispatch_disable_level = 0;
_Profiling_Thread_dispatch_enable( cpu_self, 0 );
_ISR_Enable_without_giant( level );
_Thread_Run_post_switch_actions( executing );
}
