/********************************************************************//**
* @brief UART transmit function (ring buffer used)
* @param[in] None
* @return None
*********************************************************************/
void UART1_IntTransmit(void)
{
// Disable THRE interrupt
UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, DISABLE);
/* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
* of data or break whenever ring buffers are empty */
/* Wait until THR empty */
while (UART_CheckBusy((LPC_UART_TypeDef *)LPC_UART1) == SET);
while (!__BUF_IS_EMPTY(rb.tx_head,rb.tx_tail))
{
/* Move a piece of data into the transmit FIFO */
if (UART_Send((LPC_UART_TypeDef *)LPC_UART1, (uint8_t *)&rb.tx[rb.tx_tail], \
1, NONE_BLOCKING)){
/* Update transmit ring FIFO tail pointer */
__BUF_INCR(rb.tx_tail);
} else {
break;
}
}
/* If there is no more data to send, disable the transmit
interrupt - else enable it or keep it enabled */
if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, DISABLE);
// Reset Tx Interrupt state
TxIntStat = RESET;
}
else{
// Set Tx Interrupt state
TxIntStat = SET;
UART_IntConfig((LPC_UART_TypeDef *)LPC_UART1, UART_INTCFG_THRE, ENABLE);
}
}
uint32_t USARTReceive(USART_TypeDef *USARTPort, uint8_t *rxbuf, uint8_t buflen)
{
uint8_t *data = (uint8_t *) rxbuf;
uint32_t bytes = 0;
/* Temporarily lock out USART receive interrupts during this
read so the USART receive interrupt won't cause problems
with the index values */
USART_ITConfig(USARTPort, USART_IT_RXNE, DISABLE);
/* Loop until receive buffer ring is empty or
until max_bytes expires */
while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
{
/* Read data from ring buffer into user buffer */
*data = rb.rx[rb.rx_tail];
data++;
/* Update tail pointer */
__BUF_INCR(rb.rx_tail);
/* Increment data count and decrement buffer size count */
bytes++;
buflen--;
}
/* Re-enable USART interrupts */
USART_ITConfig(USARTPort, USART_IT_RXNE, ENABLE);
return bytes;
}
void USART_IntTransmit(USART_TypeDef *USARTPort)
{
// Disable TXE interrupt
USART_ITConfig(USARTPort, USART_IT_TXE, DISABLE);
/* Wait for FIFO buffer empty, transfer data or break whenever ring buffers are empty */
/* Wait until TXE is set */
//while (USART_GetFlagStatus(USARTPort, USART_FLAG_TXE) != SET);
while (!__BUF_IS_EMPTY(rb.tx_head,rb.tx_tail))
{
/* Move a piece of data into the transmit FIFO */
if (USART_SendBlock(USARTPort, rb.tx[rb.tx_tail], 1))
{
/* Update transmit ring FIFO tail pointer */
__BUF_INCR(rb.tx_tail);
}
else
{
break;
}
}
/* If there is no more data to send, disable the transmit
interrupt - else enable it or keep it enabled */
if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail))
{
USART_ITConfig(USARTPort, USART_IT_TXE, DISABLE);
// Reset Tx Interrupt state
TxIntStat = RESET;
}
else
{
// Set Tx Interrupt state
TxIntStat = SET;
USART_ITConfig(USARTPort, USART_IT_TXE, ENABLE);
}
}
/*********************************************************************//**
* @brief UART read function for interrupt mode (using ring buffers)
* @param[in] UARTPort Selected UART peripheral used to send data,
* should be UART1.
* @param[out] rxbuf Pointer to Received buffer
* @param[in] buflen Length of Received buffer
* @return Number of bytes actually read from the ring buffer
**********************************************************************/
uint32_t UARTReceive(LPC_UART_TypeDef *UARTPort, uint8_t *rxbuf, uint8_t buflen)
{
uint8_t *data = (uint8_t *) rxbuf;
uint32_t bytes = 0;
/* Temporarily lock out UART receive interrupts during this
read so the UART receive interrupt won't cause problems
with the index values */
UART_IntConfig(UARTPort, UART_INTCFG_RBR, DISABLE);
/* Loop until receive buffer ring is empty or
until max_bytes expires */
while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail))))
{
/* Read data from ring buffer into user buffer */
*data = rb.rx[rb.rx_tail];
data++;
/* Update tail pointer */
__BUF_INCR(rb.rx_tail);
/* Increment data count and decrement buffer size count */
bytes++;
buflen--;
#if (AUTO_RTS_CTS_USE == 0)
/* In case of driving RTS manually, this pin should be
* release into ACTIVE state if buffer is free
*/
if (RTS_State == INACTIVE)
{
if (!__BUF_WILL_FULL(rb.rx_head, rb.rx_tail))
{
// Disable request to send through RTS line
UART_FullModemForcePinState(LPC_UART1, UART1_MODEM_PIN_RTS, \
ACTIVE);
RTS_State = ACTIVE;
}
}
#endif
}
/* Re-enable UART interrupts */
UART_IntConfig(UARTPort, UART_INTCFG_RBR, ENABLE);
return bytes;
}
int comm_test(void)
{
return ( __BUF_IS_EMPTY(rb.rx_head, rb.rx_tail) ) ? 0 : 1;
}
/* UART transmit function for interrupt mode (using ring buffers) */
uint32_t Chip_UART_Interrupt_Transmit(LPC_USART_Type *UARTx, uint8_t *txbuf, uint8_t buflen)
{
uint8_t *data = (uint8_t *) txbuf;
uint32_t bytes = 0;
/* Temporarily lock out UART transmit interrupts during this
read so the UART transmit interrupt won't cause problems
with the index values */
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Loop until transmit run buffer is full or until n_bytes
expires */
while ((buflen > 0) && (!__BUF_IS_FULL(rb.tx_head, rb.tx_tail))) {
/* Write data from buffer into ring buffer */
rb.tx[rb.tx_head] = *data;
data++;
/* Increment head pointer */
__BUF_INCR(rb.tx_head);
/* Increment data count and decrement buffer size count */
bytes++;
buflen--;
}
/*
* Check if current Tx interrupt enable is reset,
* that means the Tx interrupt must be re-enabled
* due to call UART_IntTransmit() function to trigger
* this interrupt type
*/
if (TxIntStat == RESET) {
// Disable THRE interrupt
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
* of data or break whenever ring buffers are empty */
/* Wait until THR empty */
while (Chip_UART_CheckBusy(UARTx) == SET) ;
while (!__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
/* Move a piece of data into the transmit FIFO */
if (Chip_UART_Send(UARTx, (uint8_t *) &rb.tx[rb.tx_tail], 1, NONE_BLOCKING)) {
/* Update transmit ring FIFO tail pointer */
__BUF_INCR(rb.tx_tail);
}
else {
break;
}
}
/* If there is no more data to send, disable the transmit
interrupt - else enable it or keep it enabled */
if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Reset Tx Interrupt state */
TxIntStat = RESET;
}
else {
/* Set Tx Interrupt state */
TxIntStat = SET;
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, ENABLE);
}
}
/*
* Otherwise, re-enables Tx Interrupt
*/
else {
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, ENABLE);
}
return bytes;
}
/* UART interrupt service routine */
void Chip_UART_Interrupt_Handler(LPC_USART_Type *UARTx)
{
uint8_t tmpc;
uint32_t rLen;
UART_INT_STATUS_Type Sts = Chip_UART_GetIntStatus(UARTx);
if (Sts == UART_INTSTS_ERROR) {
return; /* error */
}
if (Sts & UART_INTSTS_RTR) { /* ready for Read Data */
while (1) {
/* Call UART read function in UART driver */
rLen = Chip_UART_Receive(UARTx, &tmpc, 1, NONE_BLOCKING);
/* If data received */
if (rLen) {
/* Check if buffer is more space
* If no more space, remaining character will be trimmed out
*/
if (!__BUF_IS_FULL(rb.rx_head, rb.rx_tail)) {
rb.rx[rb.rx_head] = tmpc;
__BUF_INCR(rb.rx_head);
}
}
/* no more data */
else {
break;
}
}
}
if (Sts & UART_INTSTS_RTS) { /* ready for Write Data */
/* Disable THRE interrupt */
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
* of data or break whenever ring buffers are empty */
/* Wait until THR empty */
while (Chip_UART_CheckBusy(UARTx) == SET) ;
while (!__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
/* Move a piece of data into the transmit FIFO */
if (Chip_UART_Send(UARTx, (uint8_t *) &rb.tx[rb.tx_tail], 1, NONE_BLOCKING)) {
/* Update transmit ring FIFO tail pointer */
__BUF_INCR(rb.tx_tail);
}
else {
break;
}
}
/* If there is no more data to send, disable the transmit
interrupt - else enable it or keep it enabled */
if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
// Reset Tx Interrupt state
TxIntStat = RESET;
}
else {
/* Set Tx Interrupt state */
TxIntStat = SET;
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, ENABLE);
}
}
if(Sts & UART_INTSTS_ABEO)
Chip_UART_ABClearIntPending(UARTx, UART_INTSTS_ABEO);
if (Sts & UART_INTSTS_ABTO)
Chip_UART_ABClearIntPending(UARTx, UART_INTSTS_ABTO);
if (ABsyncSts == RESET)
{
/* Interrupt caused by End of auto-baud */
if (Sts & UART_INTSTS_ABEO){
// Disable AB interrupt
Chip_UART_IntConfig(UARTx, UART_INTCFG_ABEO, DISABLE);
// Set Sync flag
ABsyncSts = SET;
}
/* Auto-Baudrate Time-Out interrupt (not implemented) */
if (Sts & UART_INTSTS_ABTO) {
/* Disable this interrupt - Add your code here */
Chip_UART_IntConfig(UARTx, UART_INTCFG_ABTO, DISABLE);
}
}
}
