C++ (Cpp) __HAL_PVD_EXTI_ENABLE_ITの例

コード例 #1

ファイル: stm32f3xx_hal_pwr_ex.c プロジェクト: 23chrischen/mbed

/**
  * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
  * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
  *        information for the PVD.
  * @note Refer to the electrical characteristics of your device datasheet for
  *         more details about the voltage threshold corresponding to each
  *         detection level.
  * @retval None
  */
void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD)
{
  /* Check the parameters */
  assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
  assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));

  /* Set PLS[7:5] bits according to PVDLevel value */
  MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);

  /* Configure the EXTI 16 interrupt */
  if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_RISING))
  {
    __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD);
  }
  /* Configure the rising edge */
  if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_RISING))
  {
    EXTI->RTSR |= PWR_EXTI_LINE_PVD;
  }
  /* Configure the falling edge */
  if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_FALLING))
  {
    EXTI->FTSR |= PWR_EXTI_LINE_PVD;
  }
}

コード例 #2

ファイル: stm32l0xx_hal_pwr.c プロジェクト: hammerfet/HotBit

/**
  * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
  * @param sConfigPVD: pointer to an PWR_PVDTypeDef structure that contains the configuration
  *        information for the PVD.
  * @note Refer to the electrical characteristics of your device datasheet for
  *         more details about the voltage threshold corresponding to each
  *         detection level.
  * @retval None
  */
void HAL_PWR_PVDConfig(PWR_PVDTypeDef *sConfigPVD)
{
 uint32_t tmpreg = 0;

  /* Check the parameters */
  assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));

  tmpreg = PWR->CR;

  /* Clear PLS[7:5] bits */
  tmpreg &= ~ (uint32_t)PWR_CR_PLS;

  /* Set PLS[7:5] bits according to PVDLevel value */
  tmpreg |= sConfigPVD->PVDLevel;

  /* Store the new value */
  PWR->CR = tmpreg;

  /* Configure the EXTI 16 interrupt */
  if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_RISING)) 
  {
    __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD);
  }
  
  /* Clear the edge trigger  for the EXTI Line 16 (PVD) */
  EXTI->RTSR &= ~EXTI_RTSR_TR16;
  EXTI->FTSR &= ~EXTI_FTSR_TR16;

  /* Configure the rising edge */
  if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_RISING))
  {
    EXTI->RTSR |= PWR_EXTI_LINE_PVD;
  }
  /* Configure the falling edge */
  if((sConfigPVD->Mode == PWR_MODE_IT_RISING_FALLING) ||\
     (sConfigPVD->Mode == PWR_MODE_IT_FALLING))
  {
    EXTI->FTSR |= PWR_EXTI_LINE_PVD;
  }
}