void USCI_A0_ISR(void) { switch(UCA0IV) { case 0: break; // Vector 0 - no interrupt case 2: // Vector 2 - RXIFG handle_uart_rx_byte(); #if SC_USE_SLEEP == 1 // Exit active __bic_status_register_on_exit(LPM3_bits); #endif break; case 4: // Vector 4 - TXIFG if (UartTxBufferLength == 0) { // Spurious interrupt (or a workaround for a bug)? return; } if (++UartTxBuffer_i == UartTxBufferLength) { // All data sent? UartTxBuffer_i = 0; // Clear the Uart TX buffers UartTxBufferLength = 0; uart_state = UART_STATE_IDLE; return; } // More data to be sent to Uart //while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready? (should be always in here??) UCA0TXBUF = UartTxBuffer[UartTxBuffer_i]; // Send a byte break; default: break; } }
__interrupt void ta0_isr (void) { (void)TA0IV; ta0r = TA0R; __bic_status_register_on_exit(BSP430_CORE_LPM_EXIT_MASK); }
void TIMER1_A0_ISR(void) { if (timer_repeats > 0) { --timer_repeats; return; } timer_clear(); #if SC_USE_SLEEP == 1 // Exit from lower power mode // Clearing all LPM4 bits should be fine even if we are only in LPM0 __bic_status_register_on_exit(LPM4_bits); #endif timer_occurred = 1; }
void __attribute__((interrupt(ADC10_VECTOR))) ADC10_ISR(void) { if ((ADC10CTL1 & (INCH0 | INCH1 | INCH2 | INCH3)) == INCH_4) { adcPot = ADC10MEM; // Pot done, read temperature ADC10CTL0 &= ~ENC; ADC10CTL0 = ADC10SHT_3 + ADC10ON + ADC10IE + SREF_1 + REFON; ADC10CTL1 = ADC10DIV_3 + INCH_10; ADC10CTL0 |= ENC + ADC10SC; } else { adcTemp = ADC10MEM; ADC10CTL0 &= ~ENC; // All done, wake up main. __bic_status_register_on_exit(CPUOFF); } }
/* The TimerA ISRs need to be written in assembler because gcc is too brain damaged to do the obvious thing when presented with something like A += B (and it also insists on pushing a ton of registers on the stack for no reason whatsoever). */ __attribute__ ((__naked__,__interrupt__(TIMERA0_VECTOR))) static void timerA0_isr(void) { __bic_status_register_on_exit(CPUOFF); asm("reti"); }