void __iar_program_start(void)
{
/* the calls below are normally made in IAR cstartup */
__iar_init_core();
__iar_init_vfp();
/* the calls below are normally made in IAR cmain
*
* The function "__low_level_init" is a user overrideable hook
* that does nothing by default. Returning zero means that
* ram initialization should be skipped. Skipping ram initialization
* is not allowed by mbed.
*
* The function "__iar_data_init3" is an IAR function which
* initializes ram.
*
*/
__low_level_init();
__iar_data_init3();
/* mbed specific code */
mbed_heap_start = (unsigned char *)__section_begin("HEAP");
mbed_heap_size = (uint32_t)__section_size("HEAP");
mbed_stack_isr_start = (unsigned char *)__section_begin("CSTACK");
mbed_stack_isr_size = (uint32_t)__section_size("CSTACK");
mbed_init();
mbed_rtos_start();
}
WEAK_FUNC (void ResetISR (void)) {
/* reset the main SP to clean up any leftovers from the boot rom. */
__set_MSP( (uint32_t) __vector_table[0].__ptr );
/* Unlock the PWRMOD register by writing the two keys to the PWRKEY register */
pADI_PWR->PWRKEY = PWRKEY_VALUE_KEY1;
pADI_PWR->PWRKEY = PWRKEY_VALUE_KEY2;
/* set the RAM0_RET bit so the entire 16k of SRAM Bank0 is hibernate-preserved */
pADI_PWR->PWRMOD |= (1 << BITP_PWR_PWRMOD_RAM0_RET);
#ifdef RELOCATE_IVT
int i;
uint8_t *pSrc, *pDst;
/* copy the IVT (avoid use of memcpy here so it does not become locked into flash) */
for (i=0, pSrc=(uint8_t*)__vector_table, pDst=(uint8_t*)__relocated_vector_table; i<SIZEOF_IVT; i++)
*pDst++ = *pSrc++;
#endif
#ifdef __GNUC__
unsigned long *pulSrc, *pulDest;
// Copy initialised data from flash into RAM
pulSrc = &_etext;
for(pulDest = &_data; pulDest < &_edata; )
{
*pulDest++ = *pulSrc++;
}
// Clear the bss segment
for(pulDest = &_bss; pulDest < &_ebss; )
{
*pulDest++ = 0;
}
// Call application main directly.
main();
#elif __ICCARM__
// Call IAR system startup
__iar_init_core();
__iar_init_vfp();
__cmain();
#else
// Call application main directly.
main();
#endif
// Stick here if main returns
while(1);
}
WEAK_FUNC (void ResetISR (void)) {
/* Reset the main SP to clean up any leftovers from the boot rom. */
__set_MSP( (uint32_t) __vector_table[0].__ptr );
/* Unlock the PWRMOD register by writing the two keys to the PWRKEY register. */
pADI_PMG0->PWRKEY = PWRKEY_VALUE_KEY;
pADI_PMG0->SRAMRET &= ~(BITM_PMG_SRAMRET_BNK2EN | BITM_PMG_SRAMRET_BNK1EN);
/* Set the RAM0_RET bit so the entire 8K of SRAM Bank0 is hibernate-preserved. */
adi_system_EnableRetention(ADI_SRAM_BANK_1, true);
/* With current version, RAM size for 6LN exceeded 16K, hence to support for
sleepy device enabling BANK2 to retain during hibernate.*/
adi_system_EnableRetention(ADI_SRAM_BANK_2, true);
/* To disable the instruction SRAM and entire 64K of SRAM is used as DSRAM. */
#ifdef ADI_DISABLE_INSTRUCTION_SRAM
adi_system_EnableISRAM(false);
#endif
/* To enable the instruction cache. */
#ifdef ENABLE_CACHE
adi_system_EnableCache(true);
#endif
#ifdef RELOCATE_IVT
/* Copy the IVT (avoid use of memcpy here so it does not become locked into flash). */
size_t i;
for (i = 0u; i < LENGTHOF_IVT; i++)
{
__relocated_vector_table[i] = __vector_table[i];
}
#endif
#ifdef __GNUC__
unsigned long *pulSrc, *pulDest;
/* Copy initialised data from flash into RAM. */
pulSrc = &_etext;
for (pulDest = &_data; pulDest < &_edata; )
{
*pulDest++ = *pulSrc++;
}
/* Clear the bss segment. */
for (pulDest = &_bss; pulDest < &_ebss; )
{
*pulDest++ = 0;
}
/* Call application main directly. */
main();
#elif __ICCARM__
/* Call IAR system startup. */
__iar_init_core();
__iar_init_vfp();
__cmain();
#else
/* Call application main directly. */
main();
#endif
/* Stick here if main returns. */
while(1) {}
}
