void enable_irq(unsigned int irq) { register unsigned int t; if ((irq >= IRQ_GPIO_0) && (irq <= IRQ_GPIO_0 + NUM_GPIO)) { __gpio_unmask_irq(irq - IRQ_GPIO_0); t = (irq - IRQ_GPIO_0) >> 5; gpio_irq_mask[t] |= (1 << ((irq - IRQ_GPIO_0) & 0x1f)); __intc_unmask_irq(IRQ_GPIO0 - t); } else if ((irq >= IRQ_DMA_0) && (irq < IRQ_DMA_0 + NUM_DMA)) {
/* Really do USB detection */ static int do_usb_detect(struct uh_data *uh) { int rv; D("Called.\n"); __intc_mask_irq(IRQ_OTG); /* Now enable PHY to start detect */ __cpm_enable_otg_phy(); /* Clear IRQs */ REG16(USB_REG_INTRINE) = 0; REG16(USB_REG_INTROUTE) = 0; REG8(USB_REG_INTRUSBE) = 0; /* disable UDC IRQs first */ REG16(USB_REG_INTRINE) = 0; REG16(USB_REG_INTROUTE) = 0; REG8(USB_REG_INTRUSBE) = 0; /* Disable DMA */ REG32(USB_REG_CNTL1) = 0; REG32(USB_REG_CNTL2) = 0; /* Enable HS Mode */ REG8(USB_REG_POWER) |= USB_POWER_HSENAB; /* Enable soft connect */ REG8(USB_REG_POWER) |= USB_POWER_SOFTCONN; rv = usb_is_active(); /* Detect finish ,clean every thing */ /* Disconnect from usb */ REG8(USB_REG_POWER) &= ~USB_POWER_SOFTCONN; /* Disable the USB PHY */ __cpm_suspend_otg_phy(); /* Clear IRQs */ REG16(USB_REG_INTRINE) = 0; REG16(USB_REG_INTROUTE) = 0; REG8(USB_REG_INTRUSBE) = 0; __intc_ack_irq(IRQ_OTG); __intc_unmask_irq(IRQ_OTG); return rv; }
static void enable_dma_irq(unsigned int irq) { unsigned int intc_irq; if ( irq < (IRQ_DMA_0 + HALF_DMA_NUM) ) /* DMAC Group 0 irq */ intc_irq = IRQ_DMAC0; else if ( irq < (IRQ_DMA_0 + MAX_DMA_NUM) ) /* DMAC Group 1 irq */ intc_irq = IRQ_DMAC1; else { printk("%s, unexpected dma irq #%d\n", __FILE__, irq); return; } __intc_unmask_irq(intc_irq); __dmac_channel_enable_irq(irq - IRQ_DMA_0); }
void board_do_sleep(void) { int no_change; int data = ~0; /* set SLEEP mode */ CMSREG32(CPM_LCR, 0x1, 0x3); board_powerdown_device(); board_save_gpio(gpio_save); /* GPIO - A */ no_change = 1 << 16 | 1 << 17 | 1 << 26 | 1 << 27; REG_GPIO_PXFUNC(0) = data & ~no_change; REG_GPIO_PXSELC(0) = data & ~no_change; REG_GPIO_PXDIRC(0) = data & ~no_change; REG_GPIO_PXPES(0) = data & ~no_change; /* disable pull */ /* GPIO - B */ no_change = 1 << 5 | 1 << 20 | 1 << 23 | 1 << 25 | 1 << 30; REG_GPIO_PXFUNC(1) = data & ~no_change; REG_GPIO_PXSELC(1) = data & ~no_change; REG_GPIO_PXDIRC(1) = data & ~no_change; REG_GPIO_PXPES(1) = data & ~no_change; /* disable pull */ /* GPIO - C */ no_change = 0x0; REG_GPIO_PXFUNC(2) = data & ~no_change; REG_GPIO_PXSELC(2) = data & ~no_change; REG_GPIO_PXDIRC(2) = data & ~no_change; REG_GPIO_PXPES(2) = data & ~no_change; /* disable pull */ /* GPIO - D */ no_change = 1 << 17 | 1 << 18 | 1 << 19 | 1 << 27; REG_GPIO_PXFUNC(3) = data & ~no_change; REG_GPIO_PXSELC(3) = data & ~no_change; REG_GPIO_PXDIRC(3) = data & ~no_change; REG_GPIO_PXPES(3) = data & ~no_change; /* disable pull */ /* GPIO - E */ no_change = 1 << 0 | 1 << 4 | 1 << 10 | 1 << 11 | 1 << 26 | 1 << 8 | 1 << 3; REG_GPIO_PXFUNC(4) = data & ~no_change; REG_GPIO_PXSELC(4) = data & ~no_change; REG_GPIO_PXDIRC(4) = data & ~no_change; REG_GPIO_PXPES(4) = data & ~no_change; /* disable pull */ __gpio_clear_pin(32 * 4 + 0);/* close lcd and bl*/ __gpio_set_pin(32 * 4 + 3); __gpio_as_output(32 * 4 + 0); __gpio_as_output(32 * 4 + 3); /* GPIO - F */ no_change = 1 << 10 | 1 << 11 | 1 << 5 | 1 << 7; REG_GPIO_PXFUNC(5) = data & ~no_change; REG_GPIO_PXSELC(5) = data & ~no_change; REG_GPIO_PXDIRC(5) = data & ~no_change; REG_GPIO_PXPES(5) = data & ~no_change; /* disable pull */ __gpio_as_irq_fall_edge(PWR_WAKE); __gpio_unmask_irq(PWR_WAKE); __intc_unmask_irq(17); /* unmask IRQ_GPIOn depends on GPIO_WAKEUP */ __gpio_as_irq_rise_edge(32*1+5); __gpio_unmask_irq(32*1+5); __intc_unmask_irq(16); /* unmask IRQ_GPIOn depends on GPIO_WAKEUP */ #if 0 /*here we do not need other pin to wake up.*/ __gpio_as_irq_fall_edge(VOL_ADD); __gpio_as_irq_rise_edge(VOL_SUB); __gpio_unmask_irq(VOL_ADD); __gpio_unmask_irq(VOL_SUB); __intc_unmask_irq(14); /* unmask IRQ_GPIOn depends on VOL_ADD */ __intc_unmask_irq(12); /* unmask IRQ_GPIOn depends on VOL_SUB */ #endif /* disable externel clock Oscillator in sleep mode */ CLRREG32(CPM_OPCR, 1 << 4); /* select 32K crystal as RTC clock in sleep mode */ SETREG32(CPM_OPCR, 1 << 2); /* Clear previous reset status */ CLRREG32(CPM_RSR, 0x7); mdelay(50); __asm__(".set\tmips3\n\t" "sync\n\t" "wait\n\t" "nop\n\t" "nop\n\t" "nop\n\t" "nop\n\t" ".set\tmips0"); }
static void enable_intc_irq(unsigned int irq) { __intc_unmask_irq(irq); }
static void enable_dma_irq(unsigned int irq) { __intc_unmask_irq(IRQ_DMAC); __dmac_channel_enable_irq(irq - IRQ_DMA_0); }
static int jz_pm_do_sleep(void) { unsigned long delta; unsigned long nfcsr = REG_EMC_NFCSR; unsigned long opcr = REG_CPM_OPCR; unsigned long imr = REG_INTC_IMR; unsigned long sadc = REG_SADC_ENA; unsigned long sleep_gpio_save[7*(GPIO_PORT_NUM-1)]; printk("Put CPU into sleep mode.\n"); /* Preserve current time */ delta = xtime.tv_sec - REG_RTC_RSR; /* Disable nand flash */ REG_EMC_NFCSR = ~0xff; /* stop sadc */ REG_SADC_ENA &= ~0x7; while((REG_SADC_ENA & 0x7) != 0); udelay(100); /*stop udc and usb*/ __cpm_suspend_uhcphy(); __cpm_suspend_udcphy(); /* Sleep on-board modules */ jz_board_do_sleep(sleep_gpio_save); /* Mask all interrupts */ REG_INTC_IMSR = 0xffffffff; /* Just allow following interrupts to wakeup the system. * Note: modify this according to your system. */ /* enable RTC alarm */ __intc_unmask_irq(IRQ_RTC); #if 0 /* make system wake up after n seconds by RTC alarm */ unsigned int v, n; n = 10; while (!__rtc_write_ready()); __rtc_enable_alarm(); while (!__rtc_write_ready()); __rtc_enable_alarm_irq(); while (!__rtc_write_ready()); v = __rtc_get_second(); while (!__rtc_write_ready()); __rtc_set_alarm_second(v+n); #endif /* WAKEUP key */ __gpio_as_irq_rise_edge(GPIO_WAKEUP); __gpio_unmask_irq(GPIO_WAKEUP); __intc_unmask_irq(IRQ_GPIO0 - (GPIO_WAKEUP/32)); /* unmask IRQ_GPIOn depends on GPIO_WAKEUP */ /* disable externel clock Oscillator in sleep mode */ __cpm_disable_osc_in_sleep(); /* select 32K crystal as RTC clock in sleep mode */ __cpm_select_rtcclk_rtc(); /* Enter SLEEP mode */ REG_CPM_LCR &= ~CPM_LCR_LPM_MASK; REG_CPM_LCR |= CPM_LCR_LPM_SLEEP; __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0"); /* Restore to IDLE mode */ REG_CPM_LCR &= ~CPM_LCR_LPM_MASK; REG_CPM_LCR |= CPM_LCR_LPM_IDLE; /* Restore nand flash control register */ REG_EMC_NFCSR = nfcsr; /* Restore interrupts */ REG_INTC_IMSR = imr; REG_INTC_IMCR = ~imr; /* Restore sadc */ REG_SADC_ENA = sadc; /* Resume on-board modules */ jz_board_do_resume(sleep_gpio_save); /* Restore Oscillator and Power Control Register */ REG_CPM_OPCR = opcr; /* Restore current time */ xtime.tv_sec = REG_RTC_RSR + delta; return 0; }