int msm_gpiomux_write(unsigned gpio,
gpiomux_config_t active,
gpiomux_config_t suspended)
{
struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio;
unsigned long irq_flags;
gpiomux_config_t setting;
if (gpio >= GPIOMUX_NGPIOS)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (active & GPIOMUX_VALID)
cfg->active = active;
if (suspended & GPIOMUX_VALID)
cfg->suspended = suspended;
setting = cfg->ref ? active : suspended;
if (setting & GPIOMUX_VALID)
__msm_gpiomux_write(gpio, setting);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return 0;
}
int msm_gpiomux_write(unsigned gpio, enum msm_gpiomux_setting which,
struct gpiomux_setting *setting, struct gpiomux_setting *old_setting)
{
struct msm_gpiomux_rec *rec = msm_gpiomux_recs + gpio;
unsigned set_slot = gpio * GPIOMUX_NSETTINGS + which;
unsigned long irq_flags;
struct gpiomux_setting *new_set;
int status = 0;
/*add QC pathc for MTBF test I2C time */
if (!msm_gpiomux_recs)
{
pr_err("%s: msm_gpiomux_recs\n", __func__);
return -EFAULT;
}
if (gpio >= msm_gpiomux_ngpio)
{
pr_err("%s: msm_gpiomux_ngpio: %d\n", __func__, msm_gpiomux_ngpio);
return -EINVAL;
}
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (old_setting) {
if (rec->sets[which] == NULL)
status = 1;
else
*old_setting = *(rec->sets[which]);
}
if (setting) {
msm_gpiomux_sets[set_slot] = *setting;
rec->sets[which] = &msm_gpiomux_sets[set_slot];
} else {
rec->sets[which] = NULL;
}
new_set = rec->ref ? rec->sets[GPIOMUX_ACTIVE] :
rec->sets[GPIOMUX_SUSPENDED];
/*ad QC pathc for MTBF test I2C time */
if (new_set)
{
__msm_gpiomux_write(gpio, *new_set);
pr_err("%s: __msm_gpiomux_write line64 gpio=%d, rec->ref=%d, func=%d, drv=%d, pull=%d, dir=%d\n", __func__, gpio, rec->ref, new_set->func, new_set->drv, new_set->pull, new_set->dir);
}
else
{
pr_err("%s: new_set= NULL \n", __func__);
}
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return status;
}
static int __init gpiomux_init(void)
{
unsigned n;
for (n = 0; n < GPIOMUX_NGPIOS; ++n) {
msm_gpiomux_configs[n].ref = 0;
if (!(msm_gpiomux_configs[n].suspended & GPIOMUX_VALID))
continue;
__msm_gpiomux_write(n, msm_gpiomux_configs[n].suspended);
}
return 0;
}
int msm_gpiomux_get(unsigned gpio)
{
struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio;
unsigned long irq_flags;
if (gpio >= GPIOMUX_NGPIOS)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (cfg->ref++ == 0 && cfg->active & GPIOMUX_VALID)
__msm_gpiomux_write(gpio, cfg->active);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return 0;
}
int msm_gpiomux_put(unsigned gpio)
{
struct msm_gpiomux_config *cfg = msm_gpiomux_configs + gpio;
unsigned long irq_flags;
if (gpio >= GPIOMUX_NGPIOS)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
BUG_ON(cfg->ref == 0);
if (--cfg->ref == 0 && cfg->suspended & GPIOMUX_VALID)
__msm_gpiomux_write(gpio, cfg->suspended);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return 0;
}
int msm_gpiomux_get(unsigned gpio)
{
struct msm_gpiomux_rec *rec = msm_gpiomux_recs + gpio;
unsigned long irq_flags;
if (!msm_gpiomux_recs)
return -EFAULT;
if (gpio >= msm_gpiomux_ngpio)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (rec->ref++ == 0 && rec->sets[GPIOMUX_ACTIVE])
__msm_gpiomux_write(gpio, *rec->sets[GPIOMUX_ACTIVE]);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return 0;
}
int msm_gpiomux_put(unsigned gpio)
{
struct msm_gpiomux_rec *rec = msm_gpiomux_recs + gpio;
unsigned long irq_flags;
if (!msm_gpiomux_recs)
return -EFAULT;
if (gpio >= msm_gpiomux_ngpio)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
BUG_ON(rec->ref == 0);
if (--rec->ref == 0 && rec->sets[GPIOMUX_SUSPENDED])
__msm_gpiomux_write(gpio, *rec->sets[GPIOMUX_SUSPENDED]);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return 0;
}
int msm_gpiomux_get(unsigned gpio)
{
struct msm_gpiomux_rec *rec = msm_gpiomux_recs + gpio;
unsigned long irq_flags;
if (!msm_gpiomux_recs)
{
pr_err("%s: line=%d\n", __func__,__LINE__);
return -EFAULT;
}
if (gpio >= msm_gpiomux_ngpio)
{
pr_err("%s: line=%d\n", __func__,__LINE__);
return -EINVAL;
}
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (rec->ref++ == 0 && rec->sets[GPIOMUX_ACTIVE])
__msm_gpiomux_write(gpio, *rec->sets[GPIOMUX_ACTIVE]);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return 0;
}
//++ Ledger
int msm_gpiomux_write_pm(unsigned gpio,struct gpiomux_setting *setting)
{
unsigned long irq_flags;
int status = 0;
if (!msm_gpiomux_recs)
return -EFAULT;
if (gpio >= msm_gpiomux_ngpio)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (setting) {
__msm_gpiomux_write(gpio, *setting);
// if (msm_gpiomux_debug_mask & MSM_GPIOMUX_DEBUG_GET)
// printk("msm_gpiomux_write_pm gpio%d func:%x drv:%x pull:%x dir:%x\n",gpio,setting->func,setting->drv,setting->pull,setting->dir);
}
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return status;
}
//++ Ledger
int msm_gpiomux_write_pm(unsigned gpio,struct gpiomux_setting *setting)
{
unsigned long irq_flags;
int status = 0;
if (!msm_gpiomux_recs)
return -EFAULT;
if (gpio >= msm_gpiomux_ngpio)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (setting) {
__msm_gpiomux_write(gpio, *setting);
printk(DBGMSK_GIO_G2"msm_gpiomux_write_pm gpio%d func:%x drv:%x pull:%x dir:%x\n",gpio,setting->func,setting->drv,setting->pull,setting->dir);
}
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return status;
}
int msm_gpiomux_write(unsigned gpio, enum msm_gpiomux_setting which,
struct gpiomux_setting *setting, struct gpiomux_setting *old_setting)
{
struct msm_gpiomux_rec *rec = msm_gpiomux_recs + gpio;
unsigned set_slot = gpio * GPIOMUX_NSETTINGS + which;
unsigned long irq_flags;
struct gpiomux_setting *new_set;
int status = 0;
if (!msm_gpiomux_recs)
return -EFAULT;
if (gpio >= msm_gpiomux_ngpio)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (old_setting) {
if (rec->sets[which] == NULL)
status = 1;
else
*old_setting = *(rec->sets[which]);
}
if (setting) {
msm_gpiomux_sets[set_slot] = *setting;
rec->sets[which] = &msm_gpiomux_sets[set_slot];
} else {
rec->sets[which] = NULL;
}
new_set = rec->ref ? rec->sets[GPIOMUX_ACTIVE] :
rec->sets[GPIOMUX_SUSPENDED];
if (new_set)
__msm_gpiomux_write(gpio, *new_set);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return status;
}
int msm_gpiomux_get(unsigned gpio)
{
struct msm_gpiomux_rec *rec = msm_gpiomux_recs + gpio;
unsigned long irq_flags;
if (!msm_gpiomux_recs)
return -EFAULT;
if (gpio >= msm_gpiomux_ngpio)
return -EINVAL;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
if (rec->ref++ == 0 && rec->sets[GPIOMUX_ACTIVE]) {
//++ASUS_BSP ,Ledger
if (msm_gpiomux_debug_mask & MSM_GPIOMUX_DEBUG_GET)
printk("gpiomux get-gpio%d func:%x drv:%x pull:%x dir:%x\n", gpio,rec->sets[GPIOMUX_ACTIVE]->func,rec->sets[GPIOMUX_ACTIVE]->drv, rec->sets[GPIOMUX_ACTIVE]->pull,rec->sets[GPIOMUX_ACTIVE]->dir);
//--ASUS_BSP ,Ledger
__msm_gpiomux_write(gpio, *rec->sets[GPIOMUX_ACTIVE]);
}
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return 0;
}
int msm_gpiomux_write(unsigned gpio, enum msm_gpiomux_setting which,
struct gpiomux_setting *setting, struct gpiomux_setting *old_setting)
{
int ret;
unsigned long irq_flags;
struct gpiomux_setting *new_set;
struct msm_gpiomux_rec *rec = msm_gpiomux_recs + gpio;
ret = msm_gpiomux_store(gpio, which, setting, old_setting);
if (ret < 0)
return ret;
spin_lock_irqsave(&gpiomux_lock, irq_flags);
new_set = rec->ref ? rec->sets[GPIOMUX_ACTIVE] :
rec->sets[GPIOMUX_SUSPENDED];
if (new_set)
__msm_gpiomux_write(gpio, *new_set);
spin_unlock_irqrestore(&gpiomux_lock, irq_flags);
return ret;
}