int loapic_resume(struct device *port, int pm_policy)
{
int loapic_irq;
ARG_UNUSED(port);
if (pm_policy != SYS_PM_DEEP_SLEEP) {
return 0;
}
/* Assuming all loapic device registers lose their state, the call to
* _loapic_init(), should bring all the registers to a sane state.
*/
_loapic_init(NULL);
for (loapic_irq = 0; loapic_irq < LOAPIC_IRQ_COUNT; loapic_irq++) {
if (_irq_to_interrupt_vector[LOAPIC_IRQ_BASE + loapic_irq]) {
/* Configure vector and enable the required ones*/
_loapic_int_vec_set(loapic_irq,
_irq_to_interrupt_vector[LOAPIC_IRQ_BASE + loapic_irq]);
if (sys_bitfield_test_bit((mem_addr_t) loapic_suspend_buf,
loapic_irq)) {
_loapic_irq_enable(loapic_irq);
}
}
}
return 0;
}
/**
*
* @brief Enable an individual interrupt (IRQ)
*
* The public interface for enabling/disabling a specific IRQ for the IA-32
* architecture is defined as follows in include/arch/x86/arch.h
*
* extern void irq_enable (unsigned int irq);
* extern void irq_disable (unsigned int irq);
*
* The irq_enable() routine is provided by the interrupt controller driver due
* to the IRQ virtualization that is performed by this platform. See the
* comments in _SysIntVecAlloc() for more information regarding IRQ
* virtualization.
*
* @return N/A
*/
void _arch_irq_enable(unsigned int irq)
{
if (IS_IOAPIC_IRQ(irq)) {
_ioapic_irq_enable(irq);
} else {
_loapic_irq_enable(irq - LOAPIC_IRQ_BASE);
}
}
