uint_32 _qintc_install
(
/* [IN] interrupt controller base address */
VQINTC_REG_STRUCT_PTR base,
/* [IN] external vector/exception number */
int vector
)
{
#if PSP_HAS_DEVICE_PROTECTION
if (!_bsp_qintc_enable_access()) {
return MQX_INVALID_DEVICE;
}
#endif
_qintc_init(base, 0);
/* Install the decrementer interrupt handler */
if (_int_install_isr(vector, _qintc_external_isr, (pointer)base) == NULL)
{
return _task_get_error();
}
return MQX_OK;
}
uint_32 _e200_decrementer_timer_install
(
/* [IN] the tick rate wanted */
uint_32 tickfreq,
/* [IN] Input clock frequency */
uint_32 clk
)
{
uint_32 period;
/* Set up tick timer */
period = _e200_decrementer_timer_init(tickfreq, clk);
if (period == 0) {
return MQX_TIMER_ISR_INSTALL_FAIL;
}
/* Install the decrementer interrupt handler */
if (_int_install_isr(PSP_EXCPT_DECREMENTER, _e200_decrementer_kernel_isr, NULL) == NULL)
{
return _task_get_error();
}
/* Initialize the timer interrupt */
_time_set_timer_vector(PSP_EXCPT_DECREMENTER);
_time_set_hwtick_function(_e200_decrementer_get_hwticks, (pointer)period);
_time_set_hwticks_per_tick(period);
_time_set_ticks_per_sec(tickfreq);
return MQX_OK;
}
/*FUNCTION****************************************************************
*
* Function Name : FLEXCAN_Install_isr_wake_int
* Returned Value : uint32_t
* Comments :
* This function installs interrupt handler for a flexcan wake-up
*
*END*********************************************************************/
uint32_t FLEXCAN_Install_isr_wake_int
(
/* [IN] FlexCAN device number */
uint8_t dev_num,
/* [IN] Interrupt service routine */
INT_ISR_FPTR isr
)
{
uint32_t return_code = FLEXCAN_OK;
INT_ISR_FPTR result;
volatile FLEXCAN_REG_STRUCT_PTR can_reg_ptr;
volatile PSP_INTERRUPT_TABLE_INDEX index;
can_reg_ptr = _bsp_get_flexcan_base_address (dev_num);
if (NULL == can_reg_ptr)
{
return (FLEXCAN_INVALID_ADDRESS);
}
index = _bsp_get_flexcan_vector (dev_num, FLEXCAN_INT_WAKEUP, 0);
if (0 == index)
{
return (FLEXCAN_INT_INSTALL_FAILED);
}
result = _int_install_isr (index, isr, (void *)can_reg_ptr);
if(result == (INT_ISR_FPTR)NULL)
{
return_code = _task_get_error();
}
return return_code;
}
uint_32 _e200_decrementer_null_install(void)
{
/* Install the decrementer interrupt handler */
if (_int_install_isr(PSP_EXCPT_DECREMENTER,_e200_decrementer_null_isr, NULL) == NULL)
{
return _task_get_error();
}
return MQX_OK;
}
/*FUNCTION*-----------------------------------------------------
*
* Task Name : size_compare
* Comments :
* function compare i and read_write_size
*
*END*-----------------------------------------------------*/
void size_compare( MQX_FILE_PTR flash_hdl, _mqx_int i, _mqx_int read_write_size )
{
if (i != read_write_size ) {
printf("\nFailed to write flash, size returned:%d expected %d", i,
read_write_size);
printf("\nTEC:0x%X FERROR:0x%X", _task_get_error(), ferror(flash_hdl));
_task_block();
}
else {
printf("Done");
}/* Endif */
}
/*FUNCTION****************************************************************
*
* Function Name : _rtc_int_install
* Returned Value : MQX error code
* Comments :
* This function installs given ISR for RTC module.
*
*END*********************************************************************/
uint_32 _rtc_int_install
(
/* [IN] pointer to user ISR code */
pointer isr
)
{ /* Body */
void (_CODE_PTR_ result)(pointer);
VMCF53XX_RTC_STRUCT_PTR rtc;
if (NULL == isr) return MQX_INVALID_POINTER;
rtc = _bsp_get_rtc_base_address ();
result = _int_install_isr (_bsp_get_rtc_vector (), (void (_CODE_PTR_))isr, (pointer)rtc);
if (NULL == result) return _task_get_error ();
return MQX_OK;
} /* Endbody */
/*FUNCTION****************************************************************
*
* Function Name : FLEXCAN_Install_isr_ex
* Returned Value : uint32_t
* Comments :
* This function installs interrupt handler for requested mailbox
*
*END*********************************************************************/
uint32_t FLEXCAN_Install_isr_ex
(
/* [IN] FlexCAN device number */
uint8_t dev_num,
/* [IN] mailbox number */
uint32_t mailbox_number,
/* [IN] Interrupt service routine */
INT_ISR_FPTR isr,
/* [IN] Interrupt service routine */
void *isr_data
)
{
volatile FLEXCAN_REG_STRUCT_PTR can_reg_ptr;
uint32_t return_code = FLEXCAN_OK;
INT_ISR_FPTR result;
volatile PSP_INTERRUPT_TABLE_INDEX index;
can_reg_ptr = _bsp_get_flexcan_base_address (dev_num);
if (NULL == can_reg_ptr)
{
return (FLEXCAN_INVALID_ADDRESS);
}
if ( mailbox_number > (FLEXCAN_CANMCR_MAXMB (0xFFFFFFFF)) )
{
return (FLEXCAN_INVALID_MAILBOX);
}
index = _bsp_get_flexcan_vector (dev_num, FLEXCAN_INT_BUF, mailbox_number);
if (0 == index)
{
return (FLEXCAN_INT_INSTALL_FAILED);
}
/* Install ISR */
result = _int_install_isr (index, isr, (void *)isr_data);
if(result == (INT_ISR_FPTR)NULL)
{
return_code = _task_get_error();
}
return return_code;
}
pointer RTCS_io_open
(
char_ptr filename,
char_ptr filemode,
uint_32 _PTR_ error_ptr
)
{ /* Body */
MQX_FILE_PTR file;
uint_32 i;
/* Scan for device name delimiter */
for (i = 0; filename[i] && filename[i] != ':'; i++) {};
/*
** If the next char is not nul then a file
** on the resident file system is probably
** being opened.
*/
if (filename[i] == ':' && filename[i+1] != '\0') {
/* Assume we are opening a file */
file = fopen(filename, filemode);
} else {
file = fopen(filename, 0);
} /* Endif */
if (error_ptr) {
if (file) {
*error_ptr = RTCS_OK;
} else {
*error_ptr = _task_get_error();
if (!*error_ptr) {
*error_ptr = RTCS_ENOENT;
} /* Endif */
} /* Endif */
} /* Endif */
return file;
} /* Endbody */
void RTCS_seterror
(
RTCS_ERROR_STRUCT_PTR errptr,
/* [IN/OUT] where to record the error */
uint_32 errcode,
/* [IN] the error that occurred */
uint_32 errparm
/* [IN] additional information */
)
{ /* Body */
/* Only record the first error that occurs */
if (errptr->ERROR == RTCS_OK) {
errptr->ERROR = errcode;
errptr->PARM = errparm;
#ifdef __MQX__
errptr->TASK_ID = _task_get_id();
errptr->TASKCODE = _task_get_error();
errptr->MEMPTR = _mem_get_highwater();
errptr->STACK = _task_check_stack();
#endif
} /* Endif */
} /* Endbody */
/*FUNCTION****************************************************************
*
* Function Name : _rtc_init
* Returned Value : MQX error code
* Comments :
* This function (re)initializes/clears/enables RTC module.
* If cleared, alarm happens after RTC overflow, stopwatch happens next minute.
* Reset disables and clears all interrupts and stopwatch (even if cleared).
*
*END*********************************************************************/
uint_32 _rtc_init
(
/* [IN] flags identifying init operations */
uint_32 flags
)
{
uint_32 result = MQX_OK;
VMCF51XX_RTC_STRUCT_PTR rtc = _bsp_get_rtc_base_address ();
rtc->RTCSC = MCF51XX_RTC_RTCSC_RTCLKS(0) | MCF51XX_RTC_RTCSC_RTCPS(0x0F); // clear the interrupt flag, 1kHz internal clock,1s interval
rtc->RTCMOD = 0; // 1s interrupt
// clear time, alarm and stopwatch, if requested
if (flags & RTC_INIT_FLAG_CLEAR) {
real_time.seconds = 0;
real_time.minutes = 0;
real_time.hours = 0;
real_time.days = 0;
alarm_time.seconds = 0;
alarm_time.minutes = 0;
alarm_time.hours = 0;
alarm_time.days = 0;
stopwatch = 0;
}
// reset current user interrupt state and callback, if requested
if (flags & RTC_INIT_FLAG_RESET) {
user_requests = 0;
user_enables = 0;
user_isr = NULL;
stopwatch = (uint_32)-1;
}
// install HW interrupt and run the RTC, if requested
if (flags & RTC_INIT_FLAG_ENABLE) {
if (NULL == _int_install_isr (_bsp_get_rtc_vector (), (void (_CODE_PTR_))_rtc_isr, (pointer)rtc)) result = _task_get_error ();
if (MQX_OK == result) {
rtc->RTCSC |= MCF51XX_RTC_RTCSC_RTIE;
}
}
return result;
}
_mqx_int _io_pcb_mqxa_ioctl
(
/* [IN] the file handle for the device */
FILE_DEVICE_STRUCT_PTR fd_ptr,
/* [IN] the ioctl command */
_mqx_uint cmd,
/* [IN] the ioctl parameters */
pointer param_ptr
)
{ /* Body */
TASK_TEMPLATE_STRUCT input_tt =
{ 0, _io_pcb_mqxa_read_task, IO_PCB_MQXA_STACK_SIZE, 0,
"io_pcb_mqxa_read_task", 0, 0, 0};
TASK_TEMPLATE_STRUCT output_tt =
{ 0, _io_pcb_mqxa_write_task, IO_PCB_MQXA_STACK_SIZE, 0,
"io_pcb_mqxa_write_task", 0, 0, 0};
IO_PCB_MQXA_INFO_STRUCT_PTR info_ptr;
IO_PCB_STRUCT_PTR pcb_ptr;
_mqx_uint result = MQX_OK;
_psp_code_addr old_value;
_psp_code_addr_ptr pc_ptr = (_psp_code_addr_ptr)param_ptr;
_psp_data_addr_ptr pd_ptr = (_psp_data_addr_ptr)param_ptr;
boolean _PTR_ bool_param_ptr;
info_ptr = (IO_PCB_MQXA_INFO_STRUCT_PTR)fd_ptr->DEV_DATA_PTR;
switch (cmd) {
case IO_PCB_IOCTL_ENQUEUE_READQ:
pcb_ptr = (IO_PCB_STRUCT_PTR)*pd_ptr;
_queue_enqueue((QUEUE_STRUCT_PTR)&info_ptr->READ_QUEUE,
(QUEUE_ELEMENT_STRUCT_PTR)&pcb_ptr->QUEUE);
_lwsem_post(&info_ptr->READ_LWSEM);
break;
case IO_PCB_IOCTL_READ_CALLBACK_SET:
old_value = (_psp_code_addr)info_ptr->READ_CALLBACK_FUNCTION;
/* Start CR 398 */
info_ptr->CALLBACK_FD = fd_ptr;
/* End CR */
info_ptr->READ_CALLBACK_FUNCTION = (void (_CODE_PTR_)(
FILE_DEVICE_STRUCT_PTR, IO_PCB_STRUCT_PTR))*pc_ptr;
*pc_ptr = old_value;
break;
case IO_PCB_IOCTL_SET_INPUT_POOL:
old_value = (_psp_code_addr)info_ptr->READ_PCB_POOL;
info_ptr->READ_PCB_POOL = (_io_pcb_pool_id)*pc_ptr;
*pc_ptr = old_value;
break;
case IO_PCB_IOCTL_START:
if (info_ptr->INPUT_TASK == MQX_NULL_TASK_ID) {
input_tt.TASK_PRIORITY = info_ptr->INIT.INPUT_TASK_PRIORITY;
input_tt.CREATION_PARAMETER = (uint_32)info_ptr;
output_tt.TASK_PRIORITY = info_ptr->INIT.OUTPUT_TASK_PRIORITY;
output_tt.CREATION_PARAMETER = (uint_32)info_ptr;
info_ptr->INPUT_TASK = _task_create(0, 0, (uint_32)&input_tt);
if (info_ptr->INPUT_TASK == MQX_NULL_TASK_ID){
return(_task_get_error());
} /* Endif */
info_ptr->OUTPUT_TASK = _task_create(0, 0, (uint_32)&output_tt);
if (info_ptr->OUTPUT_TASK == MQX_NULL_TASK_ID){
return(_task_get_error());
} /* Endif */
}/* Endif */
break;
case IO_PCB_IOCTL_UNPACKED_ONLY:
bool_param_ptr = (boolean _PTR_)param_ptr;
*bool_param_ptr = TRUE;
break;
default:
result = _io_ioctl(info_ptr->FD, cmd, param_ptr);
break;
} /* Endswitch */
return result;
} /* Endbody */
_mqx_uint _timer_create_component
(
/* [IN] the task priority of the timer task */
_mqx_uint timer_task_priority,
/* [IN] the stack size for the timer task */
_mqx_uint timer_task_stack_size
)
{ /* Body */
KERNEL_DATA_STRUCT_PTR kernel_data;
TIMER_COMPONENT_STRUCT_PTR timer_component_ptr;
TASK_TEMPLATE_STRUCT timer_tt;
_GET_KERNEL_DATA(kernel_data);
_KLOGE2(KLOG_timer_create_component, timer_task_priority);
#if MQX_CHECK_ERRORS
if (kernel_data->IN_ISR) {
_KLOGX2(KLOG_timer_create_component, MQX_CANNOT_CALL_FUNCTION_FROM_ISR);
return(MQX_CANNOT_CALL_FUNCTION_FROM_ISR);
} /* Endif */
#endif
_lwsem_wait((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
if (kernel_data->KERNEL_COMPONENTS[KERNEL_TIMER] != NULL) {
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_KLOGX2(KLOG_timer_create_component, MQX_OK);
return(MQX_OK);
} /* Endif */
/* Get the timer component data structure */
timer_component_ptr = _mem_alloc_system_zero(
(_mem_size)sizeof(TIMER_COMPONENT_STRUCT));
#if MQX_CHECK_MEMORY_ALLOCATION_ERRORS
if (timer_component_ptr == NULL) {
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_KLOGX2(KLOG_timer_create_component, MQX_OUT_OF_MEMORY);
return(MQX_OUT_OF_MEMORY);
} /* Endif */
#endif
_mem_set_type(timer_component_ptr, MEM_TYPE_TIMER_COMPONENT);
_QUEUE_INIT(&timer_component_ptr->ELAPSED_TIMER_ENTRIES, 0);
_QUEUE_INIT(&timer_component_ptr->KERNEL_TIMER_ENTRIES, 0);
timer_tt.TASK_TEMPLATE_INDEX = 0;
timer_tt.TASK_ADDRESS = _timer_task;
if (timer_task_stack_size == 0) {
timer_tt.TASK_STACKSIZE = TIMER_DEFAULT_STACK_SIZE;
} else {
timer_tt.TASK_STACKSIZE = timer_task_stack_size;
} /* Endif */
if (timer_task_priority == 0) {
timer_tt.TASK_PRIORITY = TIMER_DEFAULT_TASK_PRIORITY;
} else {
timer_tt.TASK_PRIORITY = timer_task_priority;
} /* Endif */
timer_tt.TASK_NAME = "Timer Task";
timer_tt.TASK_ATTRIBUTES = 0;
timer_tt.DEFAULT_TIME_SLICE = 0;
kernel_data->KERNEL_COMPONENTS[KERNEL_TIMER] = timer_component_ptr;
timer_component_ptr->TIMER_TID = _task_create(0, 0, (uint_32)&timer_tt);
#if MQX_CHECK_ERRORS
if (timer_component_ptr->TIMER_TID == MQX_NULL_TASK_ID) {
_mqx_uint result;
kernel_data->KERNEL_COMPONENTS[KERNEL_TIMER] = NULL;
timer_component_ptr->VALID = 0;
result = _task_get_error();
if (result == MQX_OK) {
result = MQX_OUT_OF_MEMORY;
} /* Endif */
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_mem_free(timer_component_ptr);
_KLOGX2(KLOG_timer_create_component, result);
return(result);
}/* Endif */
#endif
#if MQX_COMPONENT_DESTRUCTION
kernel_data->COMPONENT_CLEANUP[KERNEL_EVENTS] = _timer_cleanup;
#endif
_lwsem_post((LWSEM_STRUCT_PTR)&kernel_data->COMPONENT_CREATE_LWSEM);
_KLOGX2(KLOG_timer_create_component, MQX_OK);
return(MQX_OK);
} /* Endbody */
bool_t pmap_init
(
void
)
{ /* Body */
int_32 sock;
sockaddr_in laddr;
SVCXPRT_PTR xprt;
PMAPLIST_PTR pml;
/* create and bind a UDP socket */
sock = socket(PF_INET, SOCK_DGRAM, 0);
if (sock == (int_32)RTCS_SOCKET_ERROR) {
fprintf(stderr, "portmap: error creating UDP socket\n");
return FALSE;
} /* Endif */
_mem_zero(&laddr, sizeof(laddr));
laddr.sin_family = AF_INET;
laddr.sin_port = PMAPPORT;
laddr.sin_addr.s_addr = 0;
if (bind(sock, &laddr, sizeof(laddr)) != RTCS_OK) {
fprintf(stderr, "portmap: error binding UDP socket, rec=%08X\n",
RTCS_geterror(sock));
return FALSE;
} /* Endif */
/* create a UDP transport*/
xprt = svcudp_create(sock);
if (xprt == NULL) {
fprintf(stderr, "portmap: error creating UDP transport, rec=%08X\n",
RTCS_geterror(sock));
return FALSE;
} /* Endif */
/* create an entry for the UDP transport */
pml = (PMAPLIST_PTR)RTCS_mem_alloc_zero(sizeof(PMAPLIST));
if (pml == NULL) {
fprintf(stderr, "portmap: error creating UDP entry, can't alloc memory\n");
return FALSE;
} /* Endif */
pml->pml_map.pm_prog = PMAPPROG;
pml->pml_map.pm_vers = PMAPVERS;
pml->pml_map.pm_prot = IPPROTO_UDP;
pml->pml_map.pm_port = PMAPPORT;
pml->pml_next = pml_head;
pml_head = pml;
/* create, bind and connect a TCP socket */
sock = socket(PF_INET, SOCK_STREAM, 0);
if (sock == (int_32)RTCS_SOCKET_ERROR) {
fprintf(stderr, "portmap: error creating TCP socket\n");
return FALSE;
} /* Endif */
_mem_zero(&laddr, sizeof(laddr));
laddr.sin_family = AF_INET;
laddr.sin_port = PMAPPORT;
laddr.sin_addr.s_addr = 0;
if (bind(sock, &laddr, sizeof(laddr)) != RTCS_OK) {
fprintf(stderr, "portmap: error binding TCP socket, rec=%08X\n",
RTCS_geterror(sock));
return FALSE;
} /* Endif */
if (listen(sock, 0) != RTCS_OK) {
fprintf(stderr, "portmap: error on socket listen, rec=%08X\n",
RTCS_geterror(sock));
return FALSE;
} /* Endif */
/* create a TCP transport*/
xprt = svctcp_create(sock, RPCSMALLMSGSIZE, RPCSMALLMSGSIZE);
if (xprt == NULL) {
fprintf(stderr, "portmap: error creating TCP transport, rec=%08X\n",
RTCS_geterror(sock));
return FALSE;
} /* Endif */
/* create an entry for the TCP transport */
pml = (PMAPLIST_PTR)RTCS_mem_alloc_zero(sizeof(PMAPLIST));
if (pml == NULL) {
fprintf(stderr, "portmap: error creating TCP entry, task error=%08X\n",
_task_get_error());
return FALSE;
} /* Endif */
pml->pml_map.pm_prog = PMAPPROG;
pml->pml_map.pm_vers = PMAPVERS;
pml->pml_map.pm_prot = IPPROTO_TCP;
pml->pml_map.pm_port = PMAPPORT;
pml->pml_next = pml_head;
pml_head = pml;
/* register program */
if (!svc_register(NULL, PMAPPROG, PMAPVERS, pmap_service, 0)) {
fprintf(stderr, "portmap: error registering service\n");
return FALSE;
} /* Endif */
return TRUE;
} /* Endbody */
/*FUNCTION****************************************************************
*
* Function Name : _rtc_init
* Returned Value : MQX error code
* Comments :
* This function (re)initializes/clears/enables RTC module.
* If cleared, alarm happens after RTC overflow, stopwatch happens next minute.
* Reset disables and clears all interrupts and stopwatch (even if cleared).
*
*END*********************************************************************/
uint_32 _rtc_init
(
/* [IN] flags identifying init operations */
uint_32 flags
)
{
uint_32 result = MQX_OK;
RTC_MemMapPtr rtc = RTC_BASE_PTR;
/* Clear time, alarm and stopwatch, if requested */
if (flags & RTC_INIT_FLAG_CLEAR)
{
_int_disable();
/* Resets all RTC registers except for SWR bit. */
rtc->CR |= RTC_CR_SWR_MASK;
alarm_time.seconds = 0;
sw_time.seconds = 0;
user_enables = 0;
user_requests = 0;
rtc->CR &= ~RTC_CR_SWR_MASK;
rtc->TAR = 0xFFFFFFFF; /* e2574: RTC: Writing RTC_TAR[TAR] = 0 does not disable RTC alarm */
rtc->TSR = 1;
_int_enable();
}
/* reset current user interrupt state and callback, if requested */
if (flags & RTC_INIT_FLAG_RESET)
{
_int_disable();
/* Resets all RTC registers except for SWR bit. */
rtc->CR |= RTC_CR_SWR_MASK;
rtc->CR &= ~RTC_CR_SWR_MASK;
rtc->TSR = 1;
user_enables = 0;
user_requests = 0;
_int_enable();
}
/* install HW interrupt and run the RTC, if requested */
if (flags & RTC_INIT_FLAG_ENABLE)
{
/* disable reset RTC */
if( rtc->CR & RTC_CR_SWR_MASK )
{
rtc->CR &= ~RTC_CR_SWR_MASK;
}
/* wk@130510 --> */
/* default */
// if (NULL == _int_install_isr (INT_RTC, _rtc_isr, (pointer)rtc))
// {
// result = _task_get_error ();
// }
/* wk */
if (NULL == _int_install_isr (INT_RTC, _rtc_isr_app, (pointer)rtc))
{
result = _task_get_error ();
}
/* end */
if (MQX_OK == result)
{
if( !(rtc->SR & RTC_SR_TCE_MASK) || !(rtc->CR & RTC_CR_OSCE_MASK) )
{
rtc->CR |= RTC_CR_OSCE_MASK;
/* recommended 125 ms delay for oscillator start */
_rtc_wait_ms(125);
rtc->TAR=rtc->TSR; // wk@130405 -->
rtc->SR |= RTC_SR_TCE_MASK;
}
_bsp_int_init(INT_RTC, BSP_RTC_INT_LEVEL, 0, TRUE);
}
}
#if PSP_MQX_CPU_IS_KINETIS_K70
/* Enable monotonic counter */
RTC_MER = RTC_MER_MCE_MASK;
#if 0
/* Enable Tamper */
RTC_TER = (RTC_TER_TME_MASK | \
RTC_TER_VTE_MASK | \
RTC_TER_CTE_MASK | \
RTC_TER_TTE_MASK | \
RTC_TER_FSE_MASK | \
RTC_TER_TME_MASK);
#else
/* Disable all tampers */
RTC_TER = 0;
#endif
#endif
return result;
}
uint_32 _bsp_enable_card
(
void
)
{
KERNEL_DATA_STRUCT_PTR kernel_data;
uint_32 result;
_GET_KERNEL_DATA(kernel_data);
_mqx_set_cpu_type(PSP_CPU_MPXN20);
/* Set the bsp exit handler, called by _mqx_exit */
_mqx_set_exit_handler(_bsp_exit_handler);
/* Initialize the MPXNxx MMU support functions */
_mpxnxx_initialize_support();
/* === Debugging is not allowed from here === */
/* Initialize the interrupt handling */
result = _psp_int_init(BSP_FIRST_INTERRUPT_VECTOR_USED, BSP_LAST_INTERRUPT_VECTOR_USED);
/* === Debugging may now resume === */
if (result != MQX_OK) {
return result;
}
result = _qintc_install(_bsp_get_qintc_base_address(), PSP_EXCPT_EXTERNAL);
if (result != MQX_OK) {
return result;
}
/* enable processor recognition of External/Decrementer/Fit interrupts */
_PSP_SET_SR (_PSP_GET_SR() | PSP_MSR_EE);
#if 0
/* Install program exception handler */
if (_int_install_isr(PSP_EXCPT_PROGRAM, _psp_program_isr, NULL) == NULL)
{
return _task_get_error();
}
#endif
#if BSPCFG_ENABLE_PIT_TIMER
_qpit_timer_install_kernel(BSPCFG_TIMER_PIT_DEVICE, BSPCFG_TIMER_PIT_CHANNEL, BSP_ALARM_FREQUENCY, BSP_SYSTEM_CLOCK, BSPCFG_TIMER_INT_LEVEL);
#else
_e200_decrementer_timer_install(BSP_ALARM_FREQUENCY, BSP_TIMEBASE_CLOCK);
#endif
/*------------------------------------------------------------------------*/
/*
** Setup MMU page tables
*/
if (_mqx_monitor_type == MQX_MONITOR_TYPE_NONE) {
_mmu_init(NULL);
/* First, mark the three TLBs that the boot code used as 'not-free' */
_mmu_reserve_tlb(BSP_FLASH_TLB);
_mmu_reserve_tlb(BSP_INT_SRAM_TLB);
/* Periph B Modules */
_mmu_reserve_tlb(BSP_PERIPHERAL_TLB);
_mmu_reserve_tlb(BSP_EXT_RAM_TLB);
_mmu_reserve_tlb(BSP_PERIPHERAL_A_TLB);
/* Next, add regions for RAM.
** Physical Address Virtual Address Size Attributes
*/
//_mmu_add_virtual_region((BSP_PRIVATE_RAM_START), BSP_PRIVATE_RAM_START, BSP_PRIVATE_RAM_SIZE, BSP_PRIVATE_RAM_ATTR, BSP_PID_MQX);
//_mmu_add_virtual_region((BSP_UNCACHED_DATA_START),BSP_UNCACHED_DATA_START, BSP_UNCACHED_DATA_SIZE, BSP_UNCACHED_DATA_ATTR, BSP_PID_MQX);
/* switch PID from 1 (boot) to 2 (MQX) */
/*_psp_set_pid(BSP_PID_MQX);*/
/*Reclaim the BOOT RAM TLB*/
/*_mmu_release_tlb(BSP_RAM_TLB);*/
#ifndef BSP_CACHE_INHIBIT
_icache_enable(0);
_dcache_enable(0);
#endif
}
#if BSPCFG_ENABLE_CPP
/* initialize C++ constructors */
#if defined(__DCC__) || defined(__HIGHC__)
__init();
#elif defined(__CODEWARRIOR__)
__cpp_init();
#endif
#endif //BSPCFG_ENABLE_CPP
#if BSPCFG_ENABLE_IO_SUBSYSTEM
/*------------------------------------------------------------------------*/
/*
** Initialize the I/O Sub-system
*/
result = _io_init();
if (result != MQX_OK) {
return result;
} /* Endif */
/* Install device drivers */
#if BSPCFG_ENABLE_TTYA
_lin_serial_polled_install("ttya:", &_bsp_lin0_init);
#endif
#if BSPCFG_ENABLE_ITTYA
_lin_serial_int_install("ittya:", &_bsp_lin0_init);
#endif
#if BSPCFG_ENABLE_TTYB
_lin_serial_polled_install("ttyb:", &_bsp_lin1_init);
#endif
#if BSPCFG_ENABLE_ITTYB
_lin_serial_int_install("ittyb:", &_bsp_lin1_init);
#endif
#if BSPCFG_ENABLE_TTYC
_lin_serial_polled_install("ttyc:", &_bsp_lin2_init);
#endif
#if BSPCFG_ENABLE_ITTYC
_lin_serial_int_install("ittyc:", &_bsp_lin2_init);
#endif
#if BSPCFG_ENABLE_TTYD
_lin_serial_polled_install("ttyd:", &_bsp_lin3_init);
#endif
#if BSPCFG_ENABLE_ITTYD
_lin_serial_int_install("ittyd:", &_bsp_lin3_init);
#endif
#if BSPCFG_ENABLE_TTYE
_lin_serial_polled_install("ttye:", &_bsp_lin4_init);
#endif
#if BSPCFG_ENABLE_ITTYE
_lin_serial_int_install("ittye:", &_bsp_lin4_init);
#endif
#if BSPCFG_ENABLE_TTYF
_lin_serial_polled_install("ttyf:", &_bsp_lin5_init);
#endif
#if BSPCFG_ENABLE_ITTYF
_lin_serial_int_install("ittyf:", &_bsp_lin5_init);
#endif
#if BSPCFG_ENABLE_SPI0
_io_spi_install("spi0:", &_bsp_spi0_init);
#endif
#if BSPCFG_ENABLE_SPI1
_io_spi_install("spi1:", &_bsp_spi1_init);
#endif
#if BSPCFG_ENABLE_SPI2
_io_spi_install("spi2:", &_bsp_spi2_init);
#endif
#if BSPCFG_ENABLE_SPI3
_io_spi_install("spi3:", &_bsp_spi3_init);
#endif
#if BSPCFG_ENABLE_FLASHX
_io_flashx_install("flashx:", &_bsp_flashx_init);
#endif
#if BSPCFG_ENABLE_I2C0
_qi2c_polled_install("i2c0:", &_bsp_i2c0_init);
#endif
#if BSPCFG_ENABLE_II2C0
_qi2c_int_install("ii2c0:", &_bsp_i2c0_init);
#endif
#if BSPCFG_ENABLE_I2C1
_qi2c_polled_install("i2c1:", &_bsp_i2c1_init);
#endif
#if BSPCFG_ENABLE_II2C1
_qi2c_int_install("ii2c1:", &_bsp_i2c1_init);
#endif
#if BSPCFG_ENABLE_I2C2
_qi2c_polled_install("i2c2:", &_bsp_i2c2_init);
#endif
#if BSPCFG_ENABLE_II2C2
_qi2c_int_install("ii2c2:", &_bsp_i2c2_init);
#endif
#if BSPCFG_ENABLE_I2C3
_qi2c_polled_install("i2c3:", &_bsp_i2c3_init);
#endif
#if BSPCFG_ENABLE_II2C3
_qi2c_int_install("ii2c3:", &_bsp_i2c3_init);
#endif
#if BSPCFG_ENABLE_RTCDEV
_rtc_init (RTC_INIT_FLAG_CLEAR | RTC_INIT_FLAG_RESET | RTC_INIT_FLAG_ENABLE);
#endif
#if BSPCFG_ENABLE_LWADC
#if BSPCFG_ENABLE_LWADC0
_lwadc_init(&lwadc0_init);
#endif
#endif
/* Initialize the default serial I/O */
_io_serial_default_init();
#endif // BSPCFG_ENABLE_IO_SUBSYSTEM
return MQX_OK;
}
/*FUNCTION****************************************************************
*
* Function Name : _rtc_init
* Returned Value : MQX error code
* Comments :
* This function (re)initializes/clears/enables RTC module.
* If cleared, alarm happens after RTC overflow, stopwatch happens next minute.
* Reset disables and clears all interrupts and stopwatch (even if cleared).
*
*END*********************************************************************/
uint_32 _rtc_init
(
/* [IN] flags identifying init operations */
uint_32 flags
)
{
uint_32 result = MQX_OK;
RTC_MemMapPtr rtc = RTC_BASE_PTR;
/* Clear time, alarm and stopwatch, if requested */
if (flags & RTC_INIT_FLAG_CLEAR)
{
_int_disable();
/* Resets all RTC registers except for SWR bit. */
rtc->CR |= RTC_CR_SWR_MASK;
alarm_time.seconds = 0;
sw_time.seconds = 0;
user_enables = 0;
user_requests = 0;
rtc->CR &= ~RTC_CR_SWR_MASK;
rtc->TAR = 0xFFFFFFFF; /* e2574: RTC: Writing RTC_TAR[TAR] = 0 does not disable RTC alarm */
rtc->TSR = 1;
_int_enable();
}
/* reset current user interrupt state and callback, if requested */
if (flags & RTC_INIT_FLAG_RESET)
{
_int_disable();
/* Resets all RTC registers except for SWR bit. */
rtc->CR |= RTC_CR_SWR_MASK;
rtc->CR &= ~RTC_CR_SWR_MASK;
rtc->TSR = 1;
user_enables = 0;
user_requests = 0;
_int_enable();
}
/* install HW interrupt and run the RTC, if requested */
if (flags & RTC_INIT_FLAG_ENABLE)
{
/* disable reset RTC */
if( rtc->CR & RTC_CR_SWR_MASK )
{
rtc->CR &= ~RTC_CR_SWR_MASK;
}
if (NULL == _int_install_isr (INT_RTC, _rtc_isr, (pointer)rtc))
{
result = _task_get_error ();
}
if (MQX_OK == result)
{
if( !(rtc->SR & RTC_SR_TCE_MASK) || !(rtc->CR & RTC_CR_OSCE_MASK) )
{
rtc->CR |= RTC_CR_OSCE_MASK;
/* recommended 125 ms delay for oscillator start */
_rtc_wait_ms(125);
rtc->SR |= RTC_SR_TCE_MASK;
}
_bsp_int_init(INT_RTC, BSP_RTC_INT_LEVEL, 0, TRUE);
}
}
return result;
}
