void sound_init()
{
// Initialise the hardware. We make use of the SSC module.
sound_interrupt_disable();
sound_disable();
*AT91C_PMC_PCER = (1 << AT91C_ID_SSC);
*AT91C_PIOA_ODR = AT91C_PA17_TD;
*AT91C_PIOA_OWDR = AT91C_PA17_TD;
*AT91C_PIOA_MDDR = AT91C_PA17_TD;
*AT91C_PIOA_PPUDR = AT91C_PA17_TD;
*AT91C_PIOA_IFDR = AT91C_PA17_TD;
*AT91C_PIOA_CODR = AT91C_PA17_TD;
*AT91C_PIOA_IDR = AT91C_PA17_TD;
*AT91C_SSC_CR = AT91C_SSC_SWRST;
*AT91C_SSC_TCMR = AT91C_SSC_CKS_DIV + AT91C_SSC_CKO_CONTINOUS + AT91C_SSC_START_CONTINOUS;
*AT91C_SSC_TFMR = 31 + (7 << 8) + AT91C_SSC_MSBF; // 8 32-bit words
*AT91C_SSC_CR = AT91C_SSC_TXEN;
aic_mask_on(AT91C_ID_SSC);
aic_clear(AT91C_ID_SSC);
aic_set_vector(AT91C_ID_SSC, AT91C_AIC_PRIOR_LOWEST | AT91C_AIC_SRCTYPE_INT_EDGE_TRIGGERED,
(U32)sound_isr_entry); /*PG*/
sample.buf_id = 0;
sample.cur_vol = -1;
sample.sample_buf = NULL;
}
// Initialise the module
void
i2c_init(void)
{
int i;
int istate;
U32 dummy;
for (i = 0; i < I2C_N_PORTS; i++) {
i2c_ports[i] = NULL;
}
istate = interrupts_get_and_disable();
/* Set up Timer Counter 0 */
*AT91C_PMC_PCER = (1 << AT91C_ID_TC0); /* Power enable */
*AT91C_TC0_CCR = AT91C_TC_CLKDIS; /* Disable */
*AT91C_TC0_IDR = ~0;
dummy = *AT91C_TC0_SR;
*AT91C_TC0_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK|AT91C_TC_CPCTRG; /* MCLK/2, RC compare trigger */
*AT91C_TC0_RC = (CLOCK_FREQUENCY/2)/(2 * I2C_CLOCK);
*AT91C_TC0_IER = AT91C_TC_CPCS;
aic_mask_off(AT91C_ID_TC0);
aic_set_vector(AT91C_ID_TC0, AIC_INT_LEVEL_NORMAL, (int)i2c_timer_isr_entry);
aic_mask_on(AT91C_ID_TC0);
if(istate)
interrupts_enable();
}
void
systick_init(void)
{
int i_state = interrupts_get_and_disable();
aic_mask_off(LOW_PRIORITY_IRQ);
aic_set_vector(LOW_PRIORITY_IRQ, (1 << 5) /* positive internal edge */ |
AIC_INT_LEVEL_LOW, (U32) systick_low_priority_entry);
aic_mask_on(LOW_PRIORITY_IRQ);
aic_mask_off(AT91C_ID_SYS);
aic_set_vector(AT91C_ID_SYS, (1 << 5) /* positive internal edge */ |
AIC_INT_LEVEL_NORMAL, (U32) systick_isr_entry);
aic_mask_on(AT91C_ID_SYS);
*AT91C_PITC_PIMR = ((CLOCK_FREQUENCY / 16 / PIT_FREQ) - 1) | 0x03000000; /* Enable, enable interrupts */
if (i_state)
interrupts_enable();
}
int uart_us0_init_irq(void)
{
int i_state;
U32 isr;
isr = (U32) uart_isr_entry_0;
i_state = interrupts_get_and_disable();
*AT91C_US0_IDR = 0xFFFFFFFF;
// Set up UART(0) interrupt
aic_mask_off(AT91C_PERIPHERAL_ID_US0);
aic_set_vector(AT91C_PERIPHERAL_ID_US0, AIC_INT_LEVEL_NORMAL, isr);
aic_mask_on(AT91C_PERIPHERAL_ID_US0);
//*AT91C_US0_IER = 1; // Enable rx and tx interrupts. This should cause a bogus tx int
//if (i_state)
// interrupts_enable();
return i_state;
}
void systick_resume()
{
aic_mask_on(LOW_PRIORITY_IRQ);
}
int
uart_init(U32 u, U32 baudRate, U32 dataBits, U32 stopBits, char parity)
{
struct soft_uart *p = &uart[u];
volatile struct _AT91S_USART *up;
int i_state;
U32 peripheral_id;
U32 mode;
U8 dummy;
U32 isr;
U32 pinmask = 0;
int error = 0;
if (u >= N_UARTS)
return 0;
p = &uart[u];
/* Initialise the uart structure */
switch (u) {
case 0:
p->uart = AT91C_BASE_US0;
peripheral_id = AT91C_PERIPHERAL_ID_US0;
pinmask = (1 << 5) | (1 << 6);
isr = (U32) uart_isr_entry_0;
break;
case 1:
p->uart = AT91C_BASE_US1;
peripheral_id = AT91C_PERIPHERAL_ID_US1;
pinmask = (1 << 21) | (1 << 22); // todo
isr = (U32) uart_isr_entry_1;
break;
default:
return 0;
}
byte_fifo_init(&p->tx, &tx_buffer[u][0], TX_FIFO_SIZE);
byte_fifo_init(&p->rx, &rx_buffer[u][0], RX_FIFO_SIZE);
p->transmitting = 0;
up = p->uart;
mode = 0;
switch (dataBits) {
case 7:
mode |= 0x80;
break;
case 8:
mode |= 0xc0;
break;
default:
error = 1;
}
switch (stopBits) {
case 1:
mode |= 0x00000000;
break;
case 15:
mode |= 0x00001000;
break;
case 2:
mode |= 0x00002000;
break;
default:
error = 1;
}
switch (parity) {
case 'N':
mode |= 0x00000800;
break;
case 'O':
mode |= 0x00000200;
break;
case 'E':
mode |= 0x00000000;
break;
case 'M':
mode |= 0x00000600;
break;
case 'S':
mode |= 0x00000400;
break;
default:
error = 1;
}
if (error)
return 0;
i_state = interrupts_get_and_disable();
/* Grab the clock we need */
*AT91C_PMC_PCER = (1 << AT91C_PERIPHERAL_ID_PIOA); /* Need PIO too */
*AT91C_PMC_PCER = (1 << peripheral_id);
/* Grab the pins we need */
*AT91C_PIOA_PDR = pinmask;
*AT91C_PIOA_ASR = pinmask;
up->US_CR = 0x5AC; // Disable
up->US_MR = mode;
up->US_IDR = 0xFFFFFFFF;
up->US_BRGR = uart_calc_divisor(baudRate); // rw Baud rate generator
up->US_RTOR = 0; // rw Receiver timeout
up->US_TTGR = 0; // rw Transmitter time guard
up->US_RPR = 0; // rw Receiver pointer
up->US_RCR = 0; // rw Receiver counter
up->US_TPR = 0; // rw Transmitter pointer
up->US_TCR = 0; // rw Transmitter counter
// Set up UART interrupt
aic_mask_off(peripheral_id);
aic_set_vector(peripheral_id, AIC_INT_LEVEL_NORMAL, isr);
aic_mask_on(peripheral_id);
// Finally enable the UART
up->US_CR = 0x50; // enable tx and rx
dummy = up->US_RHR; // dummy read.
up->US_IER = 1; //Enable rx and tx interrupts. This should cause a bogus tx int
if (i_state)
interrupts_enable();
return 1;
}
