int mtx1_pci_idsel(unsigned int devsel, int assert) { #define MTX_IDSEL_ONLY_0_AND_3 0 #if MTX_IDSEL_ONLY_0_AND_3 if (devsel != 0 && devsel != 3) { printk(KERN_ERR "*** not 0 or 3\n"); return 0; } #endif if (assert && devsel != 0) /* Suppress signal to Cardbus */ alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */ else alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */ udelay(1); return 1; }
static void gpr_reset(char *c) { /* switch System-LED to orange (red# and green# on) */ alchemy_gpio_direction_output(4, 0); alchemy_gpio_direction_output(5, 0); /* trigger watchdog to reset board in 200ms */ printk(KERN_EMERG "Triggering watchdog soft reset...\n"); raw_local_irq_disable(); alchemy_gpio_direction_output(1, 0); udelay(1); alchemy_gpio_set_value(1, 1); while (1) cpu_wait(); }