C++ (Cpp) allocate_64_register2_wの例

コード例 #1

ファイル: gspecial.c プロジェクト: derselbst/lazyusf2

void gendsrav(usf_state_t * state)
{
#ifdef INTERPRET_DSRAV
   gencallinterp(state, (unsigned int)state->current_instruction_table.DSRAV, 0);
#else
   int rt1, rt2, rd1, rd2;
   allocate_register_manually(state, ECX, (unsigned int *)state->dst->f.r.rs);
   
   rt1 = allocate_64_register1(state, (unsigned int *)state->dst->f.r.rt);
   rt2 = allocate_64_register2(state, (unsigned int *)state->dst->f.r.rt);
   rd1 = allocate_64_register1_w(state, (unsigned int *)state->dst->f.r.rd);
   rd2 = allocate_64_register2_w(state, (unsigned int *)state->dst->f.r.rd);
   
   if (rd1 != ECX && rd2 != ECX)
     {
    mov_reg32_reg32(state, rd1, rt1);
    mov_reg32_reg32(state, rd2, rt2);
    shrd_reg32_reg32_cl(state, rd1,rd2);
    sar_reg32_cl(state, rd2);
    test_reg32_imm32(state, ECX, 0x20);
    je_rj(state, 5);
    mov_reg32_reg32(state, rd1, rd2); // 2
    sar_reg32_imm8(state, rd2, 31); // 3
     }
   else
     {
    int temp1, temp2;
    force_32(state, ECX);
    temp1 = lru_register(state);
    temp2 = lru_register_exc1(state, temp1);
    free_register(state, temp1);
    free_register(state, temp2);
    
    mov_reg32_reg32(state, temp1, rt1);
    mov_reg32_reg32(state, temp2, rt2);
    shrd_reg32_reg32_cl(state, temp1, temp2);
    sar_reg32_cl(state, temp2);
    test_reg32_imm32(state, ECX, 0x20);
    je_rj(state, 5);
    mov_reg32_reg32(state, temp1, temp2); // 2
    sar_reg32_imm8(state, temp2, 31); // 3
    
    mov_reg32_reg32(state, rd1, temp1);
    mov_reg32_reg32(state, rd2, temp2);
     }
#endif
}

コード例 #2

ファイル: gspecial.c プロジェクト: hoadn/mupen64plus-ae

void gendsrlv(void)
{
#ifdef INTERPRET_DSRLV
    gencallinterp((unsigned int)cached_interpreter_table.DSRLV, 0);
#else
    int rt1, rt2, rd1, rd2;
    allocate_register_manually(ECX, (unsigned int *)dst->f.r.rs);

    rt1 = allocate_64_register1((unsigned int *)dst->f.r.rt);
    rt2 = allocate_64_register2((unsigned int *)dst->f.r.rt);
    rd1 = allocate_64_register1_w((unsigned int *)dst->f.r.rd);
    rd2 = allocate_64_register2_w((unsigned int *)dst->f.r.rd);

    if (rd1 != ECX && rd2 != ECX)
    {
        mov_reg32_reg32(rd1, rt1);
        mov_reg32_reg32(rd2, rt2);
        shrd_reg32_reg32_cl(rd1,rd2);
        shr_reg32_cl(rd2);
        test_reg32_imm32(ECX, 0x20);
        je_rj(4);
        mov_reg32_reg32(rd1, rd2); // 2
        xor_reg32_reg32(rd2, rd2); // 2
    }
    else
    {
        int temp1, temp2;
        force_32(ECX);
        temp1 = lru_register();
        temp2 = lru_register_exc1(temp1);
        free_register(temp1);
        free_register(temp2);

        mov_reg32_reg32(temp1, rt1);
        mov_reg32_reg32(temp2, rt2);
        shrd_reg32_reg32_cl(temp1, temp2);
        shr_reg32_cl(temp2);
        test_reg32_imm32(ECX, 0x20);
        je_rj(4);
        mov_reg32_reg32(temp1, temp2); // 2
        xor_reg32_reg32(temp2, temp2); // 2

        mov_reg32_reg32(rd1, temp1);
        mov_reg32_reg32(rd2, temp2);
    }
#endif
}

コード例 #3

ファイル: gspecial.c プロジェクト: GPDP2/mupen64

void gendsra()
{
#ifdef INTERPRET_DSRA
   gencallinterp((unsigned long)DSRA, 0);
#else
   int rt1 = allocate_64_register1((unsigned long *)dst->f.r.rt);
   int rt2 = allocate_64_register2((unsigned long *)dst->f.r.rt);
   int rd1 = allocate_64_register1_w((unsigned long *)dst->f.r.rd);
   int rd2 = allocate_64_register2_w((unsigned long *)dst->f.r.rd);
   
   mov_reg32_reg32(rd1, rt1);
   mov_reg32_reg32(rd2, rt2);
   shrd_reg32_reg32_imm8(rd1, rd2, dst->f.r.sa);
   sar_reg32_imm8(rd2, dst->f.r.sa);
   if (dst->f.r.sa & 0x20)
     {
	mov_reg32_reg32(rd1, rd2);
	sar_reg32_imm8(rd2, 31);
     }
#endif
}

コード例 #4

ファイル: gspecial.c プロジェクト: hoadn/mupen64plus-ae

void gendsrl(void)
{
#ifdef INTERPRET_DSRL
    gencallinterp((unsigned int)cached_interpreter_table.DSRL, 0);
#else
    int rt1 = allocate_64_register1((unsigned int *)dst->f.r.rt);
    int rt2 = allocate_64_register2((unsigned int *)dst->f.r.rt);
    int rd1 = allocate_64_register1_w((unsigned int *)dst->f.r.rd);
    int rd2 = allocate_64_register2_w((unsigned int *)dst->f.r.rd);

    mov_reg32_reg32(rd1, rt1);
    mov_reg32_reg32(rd2, rt2);
    shrd_reg32_reg32_imm8(rd1, rd2, dst->f.r.sa);
    shr_reg32_imm8(rd2, dst->f.r.sa);
    if (dst->f.r.sa & 0x20)
    {
        mov_reg32_reg32(rd1, rd2);
        xor_reg32_reg32(rd2, rd2);
    }
#endif
}

コード例 #5

ファイル: gspecial.c プロジェクト: derselbst/lazyusf2

void gendsra(usf_state_t * state)
{
#ifdef INTERPRET_DSRA
   gencallinterp(state, (unsigned int)state->current_instruction_table.DSRA, 0);
#else
   int rt1 = allocate_64_register1(state, (unsigned int *)state->dst->f.r.rt);
   int rt2 = allocate_64_register2(state, (unsigned int *)state->dst->f.r.rt);
   int rd1 = allocate_64_register1_w(state, (unsigned int *)state->dst->f.r.rd);
   int rd2 = allocate_64_register2_w(state, (unsigned int *)state->dst->f.r.rd);
   
   mov_reg32_reg32(state, rd1, rt1);
   mov_reg32_reg32(state, rd2, rt2);
   shrd_reg32_reg32_imm8(state, rd1, rd2, state->dst->f.r.sa);
   sar_reg32_imm8(state, rd2, state->dst->f.r.sa);
   if (state->dst->f.r.sa & 0x20)
     {
    mov_reg32_reg32(state, rd1, rd2);
    sar_reg32_imm8(state, rd2, 31);
     }
#endif
}

コード例 #6

ファイル: gspecial.c プロジェクト: krnlyng/mupen64plus-core

void gendsra(void)
{
#ifdef INTERPRET_DSRA
   gencallinterp((unsigned int)cached_interpreter_table.DSRA, 0);
#else
   int rt1 = allocate_64_register1((unsigned int *)g_dev.r4300.recomp.dst->f.r.rt);
   int rt2 = allocate_64_register2((unsigned int *)g_dev.r4300.recomp.dst->f.r.rt);
   int rd1 = allocate_64_register1_w((unsigned int *)g_dev.r4300.recomp.dst->f.r.rd);
   int rd2 = allocate_64_register2_w((unsigned int *)g_dev.r4300.recomp.dst->f.r.rd);
   
   mov_reg32_reg32(rd1, rt1);
   mov_reg32_reg32(rd2, rt2);
   shrd_reg32_reg32_imm8(rd1, rd2, g_dev.r4300.recomp.dst->f.r.sa);
   sar_reg32_imm8(rd2, g_dev.r4300.recomp.dst->f.r.sa);
   if (g_dev.r4300.recomp.dst->f.r.sa & 0x20)
     {
    mov_reg32_reg32(rd1, rd2);
    sar_reg32_imm8(rd2, 31);
     }
#endif
}

コード例 #7

ファイル: gspecial.c プロジェクト: GPDP2/mupen64

void gennor()
{
#ifdef INTERPRET_NOR
   gencallinterp((unsigned long)NOR, 0);
#else
   int rs1 = allocate_64_register1((unsigned long *)dst->f.r.rs);
   int rs2 = allocate_64_register2((unsigned long *)dst->f.r.rs);
   int rt1 = allocate_64_register1((unsigned long *)dst->f.r.rt);
   int rt2 = allocate_64_register2((unsigned long *)dst->f.r.rt);
   int rd1 = allocate_64_register1_w((unsigned long *)dst->f.r.rd);
   int rd2 = allocate_64_register2_w((unsigned long *)dst->f.r.rd);
   
   if (rt1 != rd1 && rs1 != rd1)
     {
	mov_reg32_reg32(rd1, rs1);
	mov_reg32_reg32(rd2, rs2);
	or_reg32_reg32(rd1, rt1);
	or_reg32_reg32(rd2, rt2);
	not_reg32(rd1);
	not_reg32(rd2);
     }
   else
     {
	int temp = lru_register();
	free_register(temp);
	mov_reg32_reg32(temp, rs1);
	or_reg32_reg32(temp, rt1);
	mov_reg32_reg32(rd1, temp);
	mov_reg32_reg32(temp, rs2);
	or_reg32_reg32(temp, rt2);
	mov_reg32_reg32(rd2, temp);
	not_reg32(rd1);
	not_reg32(rd2);
     }
#endif
}

コード例 #8

ファイル: gspecial.c プロジェクト: derselbst/lazyusf2

void gennor(usf_state_t * state)
{
#ifdef INTERPRET_NOR
   gencallinterp(state, (unsigned int)state->current_instruction_table.NOR, 0);
#else
   int rs1 = allocate_64_register1(state, (unsigned int *)state->dst->f.r.rs);
   int rs2 = allocate_64_register2(state, (unsigned int *)state->dst->f.r.rs);
   int rt1 = allocate_64_register1(state, (unsigned int *)state->dst->f.r.rt);
   int rt2 = allocate_64_register2(state, (unsigned int *)state->dst->f.r.rt);
   int rd1 = allocate_64_register1_w(state, (unsigned int *)state->dst->f.r.rd);
   int rd2 = allocate_64_register2_w(state, (unsigned int *)state->dst->f.r.rd);
   
   if (rt1 != rd1 && rs1 != rd1)
     {
    mov_reg32_reg32(state, rd1, rs1);
    mov_reg32_reg32(state, rd2, rs2);
    or_reg32_reg32(state, rd1, rt1);
    or_reg32_reg32(state, rd2, rt2);
    not_reg32(state, rd1);
    not_reg32(state, rd2);
     }
   else
     {
    int temp = lru_register(state);
    free_register(state, temp);
    mov_reg32_reg32(state, temp, rs1);
    or_reg32_reg32(state, temp, rt1);
    mov_reg32_reg32(state, rd1, temp);
    mov_reg32_reg32(state, temp, rs2);
    or_reg32_reg32(state, temp, rt2);
    mov_reg32_reg32(state, rd2, temp);
    not_reg32(state, rd1);
    not_reg32(state, rd2);
     }
#endif
}

コード例 #9

ファイル: gspecial.c プロジェクト: krnlyng/mupen64plus-core

void gennor(void)
{
#ifdef INTERPRET_NOR
   gencallinterp((unsigned int)cached_interpreter_table.NOR, 0);
#else
   int rs1 = allocate_64_register1((unsigned int *)g_dev.r4300.recomp.dst->f.r.rs);
   int rs2 = allocate_64_register2((unsigned int *)g_dev.r4300.recomp.dst->f.r.rs);
   int rt1 = allocate_64_register1((unsigned int *)g_dev.r4300.recomp.dst->f.r.rt);
   int rt2 = allocate_64_register2((unsigned int *)g_dev.r4300.recomp.dst->f.r.rt);
   int rd1 = allocate_64_register1_w((unsigned int *)g_dev.r4300.recomp.dst->f.r.rd);
   int rd2 = allocate_64_register2_w((unsigned int *)g_dev.r4300.recomp.dst->f.r.rd);
   
   if (rt1 != rd1 && rs1 != rd1)
     {
    mov_reg32_reg32(rd1, rs1);
    mov_reg32_reg32(rd2, rs2);
    or_reg32_reg32(rd1, rt1);
    or_reg32_reg32(rd2, rt2);
    not_reg32(rd1);
    not_reg32(rd2);
     }
   else
     {
    int temp = lru_register();
    free_register(temp);
    mov_reg32_reg32(temp, rs1);
    or_reg32_reg32(temp, rt1);
    mov_reg32_reg32(rd1, temp);
    mov_reg32_reg32(temp, rs2);
    or_reg32_reg32(temp, rt2);
    mov_reg32_reg32(rd2, temp);
    not_reg32(rd1);
    not_reg32(rd2);
     }
#endif
}