//*****************************************************************************
//
//! @brief Get the wdt counter value.
//!
//! This function reads the current value of watch dog timer counter register.
//!
//! WARNING caller is responsible for masking interrutps before calling this
//! function.
//!
//! @return None
//
//*****************************************************************************
uint32_t
am_hal_wdt_counter_get(void)
{
uint32_t ui32Values[3] = {0};
uint32_t ui32Value;
//
// First, go read the value from the counter register 3 times
// back to back in assembly language.
//
back2back_read_asm(ui32Values, (uint32_t *)AM_REG_WDTn(0));
//
// Now, we'll figure out which of the three values is the correct time.
//
if (ui32Values[0] == ui32Values[1])
{
//
// If the first two values match, then neither one was a bad read.
// We'll take this as the current time.
//
ui32Value = ui32Values[1];
}
else
{
//
// If the first two values didn't match, then one of them might be bad.
// If one of the first two values is bad, then the third one should
// always be correct. We'll take the third value as the correct count.
//
ui32Value = ui32Values[2];
//
// If all of the statements about the architecture are true, the third
// value should be correct, and it should always be within one count of
// either the first or the second value.
//
// Just in case, we'll check against the previous two values to make
// sure that our final answer was reasonable. If it isn't, we will
// flag it as a "bad read", and fail this assert statement.
//
// This shouldn't ever happen, and it hasn't ever happened in any of
// our tests so far.
//
am_hal_debug_assert_msg((adjacent(ui32Values[1], ui32Values[2]) ||
adjacent(ui32Values[0], ui32Values[2])),
"Bad CDT read");
}
return ui32Value;
}
//*****************************************************************************
//
//! @brief Select the clock divisor for the main system clock.
//!
//! @param ui32ClockSetting - The divisor value for the system clock.
//!
//! This function can be used to select the frequency of the main system clock.
//! The \e ui32ClockSetting parameter should be set to one of the following
//! values:
//!
//! AM_HAL_CLKGEN_SYSCLK_MAX
//! AM_HAL_CLKGEN_SYSCLK_48MHZ
//!
//! @return None.
//
//*****************************************************************************
void
am_hal_clkgen_sysclk_select(uint32_t ui32ClockSetting)
{
am_hal_debug_assert_msg(ui32ClockSetting == AM_HAL_CLKGEN_SYSCLK_48MHZ,
"am_hal_clkgen_sysclk_select(): invalid clock setting.");
//
// Unlock the clock control register.
//
AM_REG(CLKGEN, CLKKEY) = AM_REG_CLKGEN_CLKKEY_KEYVAL;
//
// Set the HFRC divisor to the user-selected value.
//
AM_REG(CLKGEN, CCTRL) = ui32ClockSetting;
//
// Lock the clock configuration registers.
//
AM_REG(CLKGEN, CLKKEY) = 0;
}
