コード例 #1
0
ファイル: timer.c プロジェクト: bgtwoigu/kernel-inwatch
void __cpuinit jz_clocksource_init(void)
{
	struct clk *ext_clk = clk_get(NULL, "ext1");
	tmr_src.cs.mult =
		clocksource_hz2mult(clk_get_rate(ext_clk) / CLKSOURCE_DIV,
				tmr_src.cs.shift);
	clk_put(ext_clk);
	clocksource_register(&tmr_src.cs);
	tmr_src.clk_gate = clk_get(NULL, "tcu");
	if (IS_ERR(tmr_src.clk_gate)) {
		tmr_src.clk_gate = NULL;
		printk("warning: tcu clk get fail!\n");
	}
	if (tmr_src.clk_gate)
		clk_enable(tmr_src.clk_gate);

	tmr_src.channel = CLKSOURCE_CH;
	tcu_writel(TCU_TSCR, 1 << CLKSOURCE_CH);
	apbost_writel(OST_CNTL, 0);
	apbost_writel(OST_CNTH, 0);
	apbost_writel(OST_DR, 0);
	tcu_writel(TCU_TFCR, TFR_OSTF);
	tcu_writel(TCU_TMSR, TMR_OSTM);
	apbost_writel(OST_CSR, OSTCSR_CNT_MD |
			CSRDIV(CLKSOURCE_DIV) | CSR_EXT_EN); // 16 prescale ext clk
}
コード例 #2
0
void __cpuinit jzcpu_timer_setup(void)
{
	int cpu = smp_processor_id();
	struct jz_timerevent *evt = &per_cpu(jzclockevent, cpu);
	evt->cpu = cpu;
	evt->state = INIT;
	switch(cpu) {
	case 0:
		evt->state = FINI;
		evt->ch = 5;
		evt->irq = IRQ_TCU1;
		evt->count_addr = TCU_IOBASE + CH_TCNT(evt->ch);
		evt->latch_addr = TCU_IOBASE + CH_TDFR(evt->ch);
		evt->ctrl_addr = TCU_IOBASE;
		evt->config_addr = TCU_IOBASE + CH_TCSR(evt->ch);
		tcu_writel(CH_TDHR(evt->ch), 0xffff);
		tcu_writel(TCU_TMSR, ((1 << evt->ch) | (1 << (evt->ch + 16))));

		break;
	case 1:
		evt->ch = 15;
		evt->irq = IRQ_TCU0;
		evt->count_addr = APB_OST_IOBASE + OSTCNTL;
		evt->latch_addr = APB_OST_IOBASE + OSTDR;
		evt->ctrl_addr = TCU_IOBASE;
		evt->config_addr = APB_OST_IOBASE + OSTCSR;
		apbost_writel(OSTCNTH, 0);
		break;
	}
#ifdef CONFIG_HOTPLUG_CPU
	jz_set_cpu_affinity(evt->irq,0);
#endif
	jz_clockevent_init(evt,cpu);
}
コード例 #3
0
ファイル: timer.c プロジェクト: piet-delaney/KERNEL-NPM801
void __cpuinit jz_clocksource_init(void)
{
    struct clk *ext_clk = clk_get(NULL,"ext1");

    tcu_writel(TCU_TSCR, TSR_OSTS);

    apbost_writel(OST_CNTL, 0);
    apbost_writel(OST_CNTH, 0);
    apbost_writel(OST_DR, 0);

    tcu_writel(TCU_TFCR, TFR_OSTF);
    tcu_writel(TCU_TMSR, TMR_OSTM);

    apbost_writel(OST_CSR, OSTCSR_CNT_MD | CSRDIV(CLKSOURCE_DIV) | CSR_EXT_EN); // 16 prescale ext clk
    tcu_writel(TCU_TESR, (1 << CLKSOURCE_CH));		// tcu enable ost channel(15)

    clocksource_jz.mult =
        clocksource_hz2mult(clk_get_rate(ext_clk) / CLKSOURCE_DIV, clocksource_jz.shift);
    clk_put(ext_clk);
    clocksource_register(&clocksource_jz);
}