int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) { int ret = 0; switch (ar71xx_soc) { case AR71XX_SOC_AR7130: case AR71XX_SOC_AR7141: case AR71XX_SOC_AR7161: board_be_handler = ar71xx_be_handler; ret = ar71xx_pcibios_init(); break; case AR71XX_SOC_AR7240: case AR71XX_SOC_AR7241: case AR71XX_SOC_AR7242: case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: ret = ar724x_pcibios_init(); break; default: return 0; } ar71xx_pci_nr_irqs = nr_irqs; ar71xx_pci_irq_map = map; return ret; }
int __init ath79_register_pci(void) { if (soc_is_ar71xx()) return ar71xx_pcibios_init(); if (soc_is_ar724x()) return ar724x_pcibios_init(ATH79_CPU_IRQ_IP2); if (soc_is_ar9342() || soc_is_ar9344()) { u32 bootstrap; bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); if (bootstrap & AR934X_BOOTSTRAP_PCIE_RC) return ar724x_pcibios_init(ATH79_IP2_IRQ(0)); } return -ENODEV; }