void r3d_debug_gpu() {
uint32_t dbge, fdbgo, fdbgr, fdbgs, bfc, errstat, pcs, status0, status1, rfc;
arm_dmb();
arm_dsb();
dbge = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_DBGE));
fdbgo = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_FDBGO));
fdbgr = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_FDBGR));
fdbgs = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_FDBGS));
bfc = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_BFC));
rfc = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_RFC));
errstat = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_ERRSTAT));
pcs = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_PCS));
status0 = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_CT0CS));
status1 = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_CT1CS));
//printf("-- BFC: 0x%x RFC: 0x%x PCS: 0x%x ERRST: 0x%x DBGE: 0x%x DBGO: 0x%x DBGR: 0x%x DBGS: 0x%x ST0: 0x%x ST1: 0x%x\r\n",bfc,rfc,pcs,errstat,dbge,fdbgo,fdbgr,fdbgs,status0,status1);
}
void armv7a::decode_misc_mhints(armv7a_ir& inst)
{
uint32_t op1 = inst(26, 20);
uint32_t rn = inst(19, 16);
uint32_t op2 = inst(7, 4);
bool op1_0010_000 = (op1 & B(1111 111)) == B(0010 000);
bool op1_01xx_xxx = (op1 & B(1100 000)) == B(0100 000);
bool op1_100x_xx0 = (op1 & B(1110 001)) == B(1000 000);
bool op1_100x_001 = (op1 & B(1110 111)) == B(1000 001);
bool op1_100x_101 = (op1 & B(1110 111)) == B(1000 101);
bool op1_101x_001 = (op1 & B(1110 111)) == B(1010 001);
bool op1_101x_101 = (op1 & B(1110 111)) == B(1010 101);
bool op1_1010_111 = (op1 & B(1111 111)) == B(1010 111);
bool op1_10xx_x11 = (op1 & B(1100 011)) == B(1000 011);
bool op1_110x_001 = (op1 & B(1110 111)) == B(1100 001);
bool op1_110x_101 = (op1 & B(1110 111)) == B(1100 101);
bool op1_111x_001 = (op1 & B(1110 111)) == B(1110 001);
bool op1_111x_101 = (op1 & B(1110 111)) == B(1110 101);
bool op1_11xx_x01 = (op1 & B(1100 011)) == B(1100 001);
bool op1_11xx_x11 = (op1 & B(1100 011)) == B(1100 011);
bool op2_xx0x = (op2 & B(0010)) == B(0000);
bool op2_0000 = (op2 & B(1111)) == B(0000);
bool op2_0001 = (op2 & B(1111)) == B(0001);
bool op2_0100 = (op2 & B(1111)) == B(0100);
bool op2_0101 = (op2 & B(1111)) == B(0101);
bool op2_0110 = (op2 & B(1111)) == B(0110);
bool op2_xxx0 = (op2 & B(0001)) == B(0000);
bool rn_xxx0 = (rn & B(0001)) == B(0000);
bool rn_xxx1 = (rn & B(0001)) == B(0001);
bool rn_1111 = (rn & B(1111)) == B(1111);
if(op1_0010_000 && op2_xx0x && rn_xxx0)
{
arm_cps(inst);
}
else if(op1_0010_000 && op2_0000 && rn_xxx1)
{
arm_setend(inst);
}
else if(op1_01xx_xxx)
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: simd data processing");
}
else if(op1_100x_xx0)
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: simd element or structure load/store");
}
else if(op1_100x_001)
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: mp extension, unallocated memory hint, 1");
}
else if(op1_100x_101)
{
arm_pli_immltrl(inst);
}
else if(op1_101x_001 && !rn_1111)
{
arm_pld_imm(inst);
}
else if(op1_101x_001 && rn_1111)
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: unpredictable, pld");
}
else if(op1_101x_101 && !rn_1111)
{
arm_pld_imm(inst);
}
else if(op1_101x_101 && rn_1111)
{
arm_pld_ltrl(inst);
}
else if(op1_1010_111 && op2_0001)
{
arm_clrex(inst);
}
else if(op1_1010_111 && op2_0100)
{
arm_dsb(inst);
}
else if(op1_1010_111 && op2_0101)
{
arm_dmb(inst);
}
else if(op1_1010_111 && op2_0110)
{
arm_isb(inst);
}
else if(op1_10xx_x11)
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: unpredictable 1");
}
else if(op1_110x_001 && op2_xxx0)
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: mp extension, unallocated memory hint, 2");
}
else if(op1_110x_101 && op2_xxx0)
{
arm_pli_reg(inst);
}
else if(op1_111x_001 && op2_xxx0)
{
arm_pld_reg(inst);
}
else if(op1_111x_101 && op2_xxx0)
{
arm_pld_reg(inst);
}
else if(op1_11xx_x11)
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: unpredictable 2");
}
else
{
printb(core_id, d_armv7a_decode_misc_mhints, "decode error: 0x%X", inst.val);
}
}
void r3d_render_frame(uint32_t clear_color) {
arm_dmb();
arm_dsb();
arm_isb();
r3d_write_binning_list(r3d_bin_ctl_lists+cl_idx*CTL_BLOCK_SIZE);
arm_invalidate_data_caches();
arm_dmb();
//khrn_hw_full_memory_barrier();
// reset binning and frame flush counters
*((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_BFC)) = 1;
*((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_RFC)) = 1;
// submit binning list
*((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_CT0CA)) = (uint32_t)control_list_bin;
*((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_CT0EA)) = (uint32_t)control_list_bin_end;
//khrn_hw_full_memory_barrier();
arm_dmb();
//printf("~~ submitted binning list %p-%p\r\n",control_list_bin,control_list_bin_end);
//cl = r3d_render_ctl_lists+cl_idx*CTL_BLOCK_SIZE;
// submit render
*((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_CT1CA)) = (uint32_t)control_list_render;
*((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_CT1EA)) = (uint32_t)control_list_render_end;
arm_dmb();
//printf("~~ submitted rendering list %p-%p\r\n",control_list_render,control_list_render_end);
uint32_t bfc = 0;
/*do {
//printf("bfc loop\r\n");
arm_dmb();
r3d_debug_gpu();
bfc = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_BFC));
} while (bfc==0);
*/
uint32_t rfc = 0;
/*do {
//printf("rfc loop\r\n");
arm_dmb();
r3d_debug_gpu();
rfc = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_RFC));
} while (rfc==0);*/
uint32_t ct1cs = 0x20;
int timeout = 0;
do {
timeout++;
if (timeout>1000*1000) break;
ct1cs = *((volatile uint32_t*)(PERIPHERAL_BASE + V3D_BASE + V3D_CT1CS));
} while (ct1cs & 0x20);
//printf("~~ r3d timeout: %d\r\n",timeout);
}
