int test_link_assist_rx() {
asic_t *asic = asic_init(TI83pSE, NULL);
z80iodevice_t link_assist_rx_read = asic->cpu->devices[0x0A];
z80iodevice_t link_assist_status = asic->cpu->devices[0x09];
link_state_t *state = link_assist_rx_read.device;
if (!link_recv_byte(asic, 0xBE)) {
asic_free(asic);
return 1;
}
if (link_recv_byte(asic, 0xEF)) {
asic_free(asic);
return 2;
}
uint8_t status = link_assist_status.read_in(state);
if (status != state->assist.status.u8 ||
!state->assist.status.rx_ready ||
!state->assist.status.int_rx_ready) {
return 3;
}
uint8_t val = link_assist_rx_read.read_in(state);
if (val != 0xBE) {
return 4;
}
status = link_assist_status.read_in(state);
if (status != state->assist.status.u8 ||
state->assist.status.rx_ready ||
state->assist.status.int_rx_ready) {
return 5;
}
return 0;
}
int test_LDDR() {
asic_t *device = asic_init(TI83p);
uint8_t test[] = { 0xED, 0xB8 }; // LDDR
device->cpu->registers.HL = 0xC004;
device->cpu->registers.DE = 0xD004;
device->cpu->registers.BC = 5;
cpu_write_byte(device->cpu, 0xC000, 0x11);
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
cpu_write_byte(device->cpu, 0xC003, 0x44);
cpu_write_byte(device->cpu, 0xC004, 0x55);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 100);
if (cpu_read_byte(device->cpu, 0xD000) != 0x11 ||
cpu_read_byte(device->cpu, 0xD001) != 0x22 ||
cpu_read_byte(device->cpu, 0xD002) != 0x33 ||
cpu_read_byte(device->cpu, 0xD003) != 0x44 ||
cpu_read_byte(device->cpu, 0xD004) != 0x55 ||
device->cpu->registers.HL != 0xBFFF ||
device->cpu->registers.DE != 0xCFFF ||
device->cpu->registers.BC != 0 ||
cycles != 0) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
int test_CPD() {
asic_t *device = asic_init(TI83p);
uint8_t test[] = { 0xED, 0xA9 }; // CPD
device->cpu->registers.HL = 0xC002;
device->cpu->registers.BC = 5;
device->cpu->registers.A = 0x11;
cpu_write_byte(device->cpu, 0xC000, 0x11);
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 16);
if (device->cpu->registers.flags.Z != 0 ||
device->cpu->registers.HL != 0xC001 ||
device->cpu->registers.BC != 4 ||
cycles != 0) {
asic_free(device);
return 1;
}
device->cpu->registers.PC = 0;
cpu_execute(device->cpu, 16);
device->cpu->registers.PC = 0;
cpu_execute(device->cpu, 16);
if (device->cpu->registers.flags.Z != 1 ||
device->cpu->registers.HL != 0xBFFF ||
device->cpu->registers.BC != 2) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
int test_status() {
asic_t *asic = asic_init(TI83p, NULL);
z80iodevice_t status = init_status(asic);
// Test battery status
asic->battery = BATTERIES_GOOD;
asic->battery_remove_check = 0;
uint8_t value = status.read_in(status.device);
if (!(value & 1)) {
asic_free(asic);
return 1;
}
// Test flash
asic->mmu->flash_unlocked = 1;
value = status.read_in(status.device);
if (!(value & 4)) {
asic_free(asic);
return 1;
}
asic->mmu->flash_unlocked = 0;
value = status.read_in(status.device);
if (value & 4) {
asic_free(asic);
return 1;
}
asic_free(asic);
return 0;
}
int test_memorymapping_others() {
asic_t *asic = asic_init(TI84p, NULL);
memory_mapping_state_t *state = asic->cpu->devices[0x04].device;
state->ram_bank_page = 1;
state->bank_a_page = 0;
state->bank_a_flash = 0;
reload_mapping(state);
ti_write_byte(asic->mmu, 0x4000, 0x12);
if (asic->mmu->ram[0] != 0x12) {
asic_free(asic);
return 1;
}
asic->mmu->ram[0x4000] = 0x34;
if (ti_read_byte(asic->mmu, 0xC000) != 0x34) {
asic_free(asic);
return 2;
}
state->map_mode = 1;
state->bank_a_page = 0;
state->bank_a_flash = 0;
state->bank_b_page = 0;
state->bank_b_flash = 0;
reload_mapping(state);
if (ti_read_byte(asic->mmu, 0x4000) != 0x12) {
asic_free(asic);
return 3;
}
if (ti_read_byte(asic->mmu, 0x8000) != 0x34) {
asic_free(asic);
return 4;
}
if (ti_read_byte(asic->mmu, 0xC000) != 0x12) {
asic_free(asic);
return 5;
}
return 0;
}
int test_link_port() {
asic_t *asic = asic_init(TI83p, NULL);
z80iodevice_t link = asic->cpu->devices[0x00];
link_state_t *state = link.device;
uint8_t value = link.read_in(state);
if (value != 0) {
asic_free(asic);
return 1;
}
link.write_out(state, 0x01);
value = link.read_in(state);
if (value != 0x11) {
asic_free(asic);
return 2;
}
return 0;
}
int test_CPDR() {
asic_t *device = asic_init(TI83p);
uint8_t test[] = { 0xED, 0xB9 }; // CPDR
device->cpu->registers.HL = 0xC004;
device->cpu->registers.BC = 5;
device->cpu->registers.A = 0x33;
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
cpu_write_byte(device->cpu, 0xC003, 0x44);
cpu_write_byte(device->cpu, 0xC004, 0x55);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 58);
if (device->cpu->registers.HL != 0xC001 ||
device->cpu->registers.BC != 2 ||
cycles != 0) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
int test_LDI() {
asic_t *device = asic_init(TI83p, NULL);
uint8_t test[] = { 0xED, 0xA0 }; // LDI
device->cpu->registers.HL = 0xC000;
device->cpu->registers.DE = 0xD000;
device->cpu->registers.BC = 5;
cpu_write_byte(device->cpu, 0xC000, 0x11);
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
cpu_write_byte(device->cpu, 0xC003, 0x44);
cpu_write_byte(device->cpu, 0xC004, 0x55);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 16);
if (cpu_read_byte(device->cpu, 0xD000) != 0x11 ||
device->cpu->registers.HL != 0xC001 ||
device->cpu->registers.DE != 0xD001 ||
device->cpu->registers.BC != 4 ||
cycles != 0) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
int test_link_assist_tx() {
asic_t *asic = asic_init(TI83pSE, NULL);
z80iodevice_t link_assist_tx_read = asic->cpu->devices[0x0D];
z80iodevice_t link_assist_status = asic->cpu->devices[0x09];
link_state_t *state = link_assist_tx_read.device;
if (link_read_tx_buffer(asic) != EOF) {
asic_free(asic);
return 1;
}
uint8_t status = link_assist_status.read_in(state);
if (status != state->assist.status.u8 ||
!state->assist.status.tx_ready ||
!state->assist.status.int_tx_ready) {
return 2;
}
link_assist_tx_read.write_out(state, 0xDE);
status = link_assist_status.read_in(state);
if (status != state->assist.status.u8 ||
state->assist.status.tx_ready ||
state->assist.status.int_tx_ready) {
return 3;
}
if (link_read_tx_buffer(asic) != 0xDE) {
return 4;
}
status = link_assist_status.read_in(state);
if (status != state->assist.status.u8 ||
!state->assist.status.tx_ready ||
!state->assist.status.int_tx_ready) {
return 5;
}
return 0;
}
void emu_cleanup(void) {
asic_free();
}
