/** * intel_csr_load_program() - write the firmware from memory to register. * @dev_priv: i915 drm device. * * CSR firmware is read from a .bin file and kept in internal memory one time. * Everytime display comes back from low power state this function is called to * copy the firmware from internal memory to registers. */ void intel_csr_load_program(struct drm_i915_private *dev_priv) { u32 *payload = dev_priv->csr.dmc_payload; u32 i, fw_size; if (!HAS_CSR(dev_priv)) { DRM_ERROR("No CSR support available for this platform\n"); return; } if (!dev_priv->csr.dmc_payload) { DRM_ERROR("Tried to program CSR with empty payload\n"); return; } fw_size = dev_priv->csr.dmc_fw_size; assert_rpm_wakelock_held(dev_priv); preempt_disable(); for (i = 0; i < fw_size; i++) I915_WRITE_FW(CSR_PROGRAM(i), payload[i]); preempt_enable(); for (i = 0; i < dev_priv->csr.mmio_count; i++) { I915_WRITE(dev_priv->csr.mmioaddr[i], dev_priv->csr.mmiodata[i]); } dev_priv->csr.dc_state = 0; gen9_set_dc_state_debugmask(dev_priv); }
void __iomem *i915_vma_pin_iomap(struct i915_vma *vma) { void __iomem *ptr; /* Access through the GTT requires the device to be awake. */ assert_rpm_wakelock_held(to_i915(vma->vm->dev)); lockdep_assert_held(&vma->vm->dev->struct_mutex); if (WARN_ON(!i915_vma_is_map_and_fenceable(vma))) return IO_ERR_PTR(-ENODEV); GEM_BUG_ON(!i915_vma_is_ggtt(vma)); GEM_BUG_ON((vma->flags & I915_VMA_GLOBAL_BIND) == 0); ptr = vma->iomap; if (ptr == NULL) { ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->mappable, vma->node.start, vma->node.size); if (ptr == NULL) return IO_ERR_PTR(-ENOMEM); vma->iomap = ptr; } __i915_vma_pin(vma); return ptr; }