void at86rf231_switch_to_rx(void)
{
at86rf231_disable_interrupts();
// Send a FORCE TRX OFF command
at86rf231_reg_write(AT86RF231_REG__TRX_STATE, AT86RF231_TRX_STATE__FORCE_TRX_OFF);
// Reset IRQ to TRX END only
at86rf231_reg_write(AT86RF231_REG__IRQ_MASK, AT86RF231_IRQ_STATUS_MASK__TRX_END);
// Read IRQ to clear it
at86rf231_reg_read(AT86RF231_REG__IRQ_STATUS);
// Enable IRQ interrupt
at86rf231_enable_interrupts();
// Start RX
at86rf231_reg_write(AT86RF231_REG__TRX_STATE, AT86RF231_TRX_STATE__RX_ON);
// wait until it is on RX_ON state
uint8_t status;
uint8_t max_wait = 100; // TODO : move elsewhere, this is in 10us
do {
status = at86rf231_get_status();
vtimer_usleep(10);
if (!--max_wait) {
printf("at86rf231 : ERROR : could not enter RX_ON mode");
break;
}
}
while ((status & AT86RF231_TRX_STATUS_MASK__TRX_STATUS) != AT86RF231_TRX_STATUS__RX_ON);
}
void at86rf231_reset(void)
{
/* force reset */
at86rf231_rst_set();
/* put pins to default values */
at86rf231_spi_unselect();
at86rf231_slp_clear();
/* additional waiting to comply to min rst pulse width */
uint8_t delay = 50;
while (delay--){}
at86rf231_rst_clear();
/* Send a FORCE TRX OFF command */
at86rf231_reg_write(AT86RF231_REG__TRX_STATE, AT86RF231_TRX_STATE__FORCE_TRX_OFF);
/* busy wait for TRX_OFF state */
uint8_t status;
uint8_t max_wait = 100;
do {
status = at86rf231_get_status();
if (!--max_wait) {
printf("at86rf231 : ERROR : could not enter TRX_OFF mode\n");
break;
}
} while ((status & AT86RF231_TRX_STATUS_MASK__TRX_STATUS)
!= AT86RF231_TRX_STATUS__TRX_OFF);
}
uint16_t at86rf231_set_address(uint16_t address)
{
radio_address = address;
at86rf231_reg_write(AT86RF231_REG__SHORT_ADDR_0, (uint8_t)(0x0F & radio_address));
at86rf231_reg_write(AT86RF231_REG__SHORT_ADDR_1, (uint8_t)(radio_address >> 8));
return radio_address;
}
uint16_t at86rf231_set_pan(uint16_t pan)
{
radio_pan = pan;
at86rf231_reg_write(AT86RF231_REG__PAN_ID_0, (uint8_t)(0x0F & radio_pan));
at86rf231_reg_write(AT86RF231_REG__PAN_ID_1, (uint8_t)(radio_pan >> 8));
return radio_pan;
}
uint8_t at86rf231_set_channel(uint8_t channel)
{
radio_channel = channel;
if (channel < RF86RF231_MIN_CHANNEL ||
channel > RF86RF231_MAX_CHANNEL) {
radio_channel = RF86RF231_MAX_CHANNEL;
}
at86rf231_reg_write(AT86RF231_REG__PHY_CC_CCA, AT86RF231_PHY_CC_CCA_DEFAULT__CCA_MODE | radio_channel);
return radio_channel;
}
uint64_t at86rf231_set_address_long(uint64_t address)
{
radio_address_long = address;
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_0, (uint8_t)(0x0F & radio_address));
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_1, (uint8_t)(radio_address >> 8));
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_2, (uint8_t)(radio_address >> 16));
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_3, (uint8_t)(radio_address >> 24));
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_4, (uint8_t)(radio_address >> 32));
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_5, (uint8_t)(radio_address >> 40));
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_6, (uint8_t)(radio_address >> 48));
at86rf231_reg_write(AT86RF231_REG__IEEE_ADDR_7, (uint8_t)(radio_address >> 56));
return radio_address_long;
}
uint8_t at86rf231_set_channel(uint8_t channel)
{
uint8_t cca_state;
radio_channel = channel;
if (channel < RF86RF231_MIN_CHANNEL ||
channel > RF86RF231_MAX_CHANNEL) {
radio_channel = RF86RF231_MAX_CHANNEL;
}
cca_state = at86rf231_reg_read(AT86RF231_REG__PHY_CC_CCA) & ~AT86RF231_PHY_CC_CCA_MASK__CHANNEL;
at86rf231_reg_write(AT86RF231_REG__PHY_CC_CCA, cca_state | (radio_channel & AT86RF231_PHY_CC_CCA_MASK__CHANNEL));
return radio_channel;
}
