static void meesc_macb_hw_init(void) { at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; /* Enable clock */ writel(1 << ATMEL_ID_EMAC, &pmc->pcer); at91_macb_hw_init(); }
int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; #ifdef CONFIG_NAND_ATMEL sama5d3xek_nand_hw_init(); #endif #ifdef CONFIG_MTD_NOR_FLASH sama5d3xek_nor_hw_init(); #endif #ifdef CONFIG_CMD_USB sama5d3xek_usb_hw_init(); #endif #ifdef CONFIG_USB_GADGET_ATMEL_USBA at91_udp_hw_init(); #endif #ifdef CONFIG_GENERIC_ATMEL_MCI sama5d3xek_mci_hw_init(); #endif #ifdef CONFIG_ATMEL_SPI at91_spi0_hw_init(1 << 0); #endif #ifdef CONFIG_MACB if (has_emac()) at91_macb_hw_init(); if (has_gmac()) at91_gmac_hw_init(); #endif #ifdef CONFIG_LCD if (has_lcdc()) sama5d3xek_lcd_hw_init(); #endif return 0; }
static void pm9g45_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* * PD2 enables the 50MHz oscillator for Ethernet PHY * 1 - enable * 0 - disable */ at91_set_pio_output(AT91_PIO_PORTD, 2, 1); at91_set_pio_value(AT91_PIO_PORTD, 2, 1); /* 1- enable, 0 - disable */ /* Enable clock */ writel(1 << ATMEL_ID_EMAC, &pmc->pcer); /* * Disable pull-up on: * RXDV (PA15) => PHY normal mode (not Test mode) * ERX0 (PA12) => PHY ADDR0 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0 * * PHY has internal pull-down */ at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0); at91_set_pio_pullup(AT91_PIO_PORTA, 12, 0); at91_set_pio_pullup(AT91_PIO_PORTA, 13, 0); /* Re-enable pull-up */ at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1); at91_set_pio_pullup(AT91_PIO_PORTA, 12, 1); at91_set_pio_pullup(AT91_PIO_PORTA, 13, 1); at91_macb_hw_init(); }
int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; #ifdef CONFIG_CMD_NAND at91sam9x5ek_nand_hw_init(); #endif #ifdef CONFIG_ATMEL_SPI at91_spi0_hw_init(1 << 4); #endif #ifdef CONFIG_MACB at91_macb_hw_init(); #endif #if defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_EHCI) at91_uhp_hw_init(); #endif #ifdef CONFIG_LCD at91sam9x5ek_lcd_hw_init(); #endif return 0; }
static void picosam9g45_macb_hw_init(void) { struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Disable pull-up on: * RXDV (PA15) => PHY normal mode (not Test mode) * ERX0 (PA12) => PHY ADDR0 * ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0 * * PHY has internal pull-down */ writel(pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA12) | pin_to_mask(AT91_PIN_PA13), &pioa->pudr); at91_phy_reset(); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA12) | pin_to_mask(AT91_PIN_PA13), &pioa->puer); /* And the pins. */ at91_macb_hw_init(); }
int board_init(void) { /* arch number of AT91SAM9X5EK-Board */ gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9X5EK; /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; #ifdef CONFIG_CMD_NAND at91sam9x5ek_nand_hw_init(); #endif #ifdef CONFIG_ATMEL_SPI at91_spi0_hw_init(1 << 0); at91_spi0_hw_init(1 << 4); #endif #ifdef CONFIG_MACB at91_macb_hw_init(); #endif #ifdef CONFIG_LCD at91sam9x5ek_lcd_hw_init(); #endif return 0; }
static void at91sam9260ek_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; unsigned long erstl; /* Enable EMAC clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); /* * Disable pull-up on: * RXDV (PA17) => PHY normal mode (not Test mode) * ERX0 (PA14) => PHY ADDR0 * ERX1 (PA15) => PHY ADDR1 * ERX2 (PA25) => PHY ADDR2 * ERX3 (PA26) => PHY ADDR3 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 * * PHY has internal pull-down */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), &pioa->pudr); erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; /* Need to reset PHY -> 500ms reset */ writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | AT91_RSTC_MR_URSTEN, &rstc->mr); writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); /* Wait for end hardware reset */ while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) ; /* Restore NRST value */ writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), &pioa->puer); /* Initialize EMAC=MACB hardware */ at91_macb_hw_init(); }
static void macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; /* Enable EMAC clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); /* Initialize EMAC=MACB hardware */ at91_macb_hw_init(); }
static void cpu9260_macb_hw_init(void) { unsigned long rstc; /* Enable clock */ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC); /* * Disable pull-up on: * RXDV (PA17) => PHY normal mode (not Test mode) * ERX0 (PA14) => PHY ADDR0 * ERX1 (PA15) => PHY ADDR1 * ERX2 (PA25) => PHY ADDR2 * ERX3 (PA26) => PHY ADDR3 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 * * PHY has internal pull-down */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL; /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); /* Wait for end hardware reset */ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)) ; /* Restore NRST value */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (rstc) | AT91_RSTC_URSTEN); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), pin_to_controller(AT91_PIN_PA0) + PIO_PUER); at91_macb_hw_init(); }
static void macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; unsigned long erstl; /* Enable clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); /* Disable pull-ups to prevent PHY going into test mode */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA18), &pioa->pudr); /* Power down ethernet */ pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT); pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1); /* Hold ethernet in reset */ pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT); pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0); /* Enable ethernet power */ pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0); /* Need to reset PHY -> 500ms reset */ erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) | AT91_RSTC_MR_URSTEN, &rstc->mr); writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); /* Wait for end hardware reset */ while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) ; /* Restore NRST value */ writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); /* Bring the ethernet out of reset */ pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1); /* The phy internal reset take 21ms */ udelay(21 * 1000); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA18), &pioa->puer); at91_macb_hw_init(); }
int board_init(void) { /* address of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; wb45n_gpio_hw_init(); wb45n_nand_hw_init(); at91_macb_hw_init(); return 0; }
int board_init(void) { /* adress of boot parameters */ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; #ifdef CONFIG_NAND_ATMEL sama5d3_xplained_nand_hw_init(); #endif #ifdef CONFIG_CMD_USB sama5d3_xplained_usb_hw_init(); #endif #ifdef CONFIG_GENERIC_ATMEL_MCI sama5d3_xplained_mci0_hw_init(); #endif #ifdef CONFIG_MACB at91_gmac_hw_init(); at91_macb_hw_init(); #endif return 0; }
static void at91sam9260ek_macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; /* Enable EMAC clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); /* * Disable pull-up on: * RXDV (PA17) => PHY normal mode (not Test mode) * ERX0 (PA14) => PHY ADDR0 * ERX1 (PA15) => PHY ADDR1 * ERX2 (PA25) => PHY ADDR2 * ERX3 (PA26) => PHY ADDR3 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 * * PHY has internal pull-down */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), &pioa->pudr); at91_phy_reset(); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA25) | pin_to_mask(AT91_PIN_PA26) | pin_to_mask(AT91_PIN_PA28), &pioa->puer); /* Initialize EMAC=MACB hardware */ at91_macb_hw_init(); }
static void macb_hw_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; /* Enable clock */ writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); /* Disable pull-ups to prevent PHY going into test mode */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA18), &pioa->pudr); /* Power down ethernet */ pca953x_set_dir(0x28, IO_EXP_ETH_POWER, PCA953X_DIR_OUT); pca953x_set_val(0x28, IO_EXP_ETH_POWER, 1); /* Hold ethernet in reset */ pca953x_set_dir(0x28, IO_EXP_ETH_RESET, PCA953X_DIR_OUT); pca953x_set_val(0x28, IO_EXP_ETH_RESET, 0); /* Enable ethernet power */ pca953x_set_val(0x28, IO_EXP_ETH_POWER, 0); at91_phy_reset(); /* Bring the ethernet out of reset */ pca953x_set_val(0x28, IO_EXP_ETH_RESET, 1); /* The phy internal reset take 21ms */ udelay(21 * 1000); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA18), &pioa->puer); at91_macb_hw_init(); }
static void gurnard_macb_hw_init(void) { struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; at91_periph_clk_enable(ATMEL_ID_EMAC); /* * Enable pull-up on: * RXDV (PA12) => MODE0 - PHY also has pull-up * ERX0 (PA13) => MODE1 - PHY also has pull-up * ERX1 (PA15) => MODE2 - PHY also has pull-up */ writel(pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA12) | pin_to_mask(AT91_PIN_PA13), &pioa->puer); at91_phy_reset(); at91_macb_hw_init(); }
static void stamp9G20_macb_hw_init(void) { struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; unsigned long erstl; /* Enable the PHY Chip via PA26 on the Stamp 2 Adaptor */ at91_set_gpio_output(AT91_PIN_PA26, 0); /* * Disable pull-up on: * RXDV (PA17) => PHY normal mode (not Test mode) * ERX0 (PA14) => PHY ADDR0 * ERX1 (PA15) => PHY ADDR1 * ERX2 (PA25) => PHY ADDR2 * ERX3 (PA26) => PHY ADDR3 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 * * PHY has internal pull-down */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA18) | pin_to_mask(AT91_PIN_PA28), &pioa->pudr); erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK; /* Need to reset PHY -> 500ms reset */ writel(AT91_RSTC_KEY | (AT91_RSTC_MR_ERSTL(13) & ~AT91_RSTC_MR_URSTEN), &rstc->mr); writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr); /* Wait for end of hardware reset */ unsigned long start = get_timer(0); unsigned long timeout = 1000; /* 1000ms */ while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL)) { /* avoid shutdown by watchdog */ WATCHDOG_RESET(); mdelay(10); /* timeout for not getting stuck in an endless loop */ if (get_timer(start) >= timeout) { puts("*** ERROR: Timeout waiting for PHY reset!\n"); break; }; }; /* Restore NRST value */ writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN, &rstc->mr); /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PA14) | pin_to_mask(AT91_PIN_PA15) | pin_to_mask(AT91_PIN_PA17) | pin_to_mask(AT91_PIN_PA18) | pin_to_mask(AT91_PIN_PA28), &pioa->puer); /* Initialize EMAC=MACB hardware */ at91_macb_hw_init(); }
static void otc570_macb_hw_init(void) { /* Enable clock */ at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); at91_macb_hw_init(); }