static void __init ar934x_usb_setup(void) { u32 bootstrap; bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) return; ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_HOST); udelay(1000); ath79_usb_register("ehci-platform", -1, AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ATH79_CPU_IRQ(3), &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); }
static void __init ar934x_usb_setup(void) { u32 bootstrap; bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) return; ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); udelay(1000); ath79_device_reset_clear(AR934X_RESET_USB_HOST); udelay(1000); ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE, AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB); ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; platform_device_register(&ath79_ehci_device); }
static void __init ath79_usb_setup(void) { void __iomem *usb_ctrl_base; ath79_device_reset_set(AR71XX_USB_RESET_MASK); mdelay(1000); ath79_device_reset_clear(AR71XX_USB_RESET_MASK); usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); /* Turning on the Buff and Desc swap bits */ __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG); /* WAR for HW bug. Here it adjusts the duration between two SOFS */ __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); iounmap(usb_ctrl_base); mdelay(900); ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE, AR71XX_OHCI_SIZE, ATH79_MISC_IRQ_OHCI); platform_device_register(&ath79_ohci_device); ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE, AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB); ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1; platform_device_register(&ath79_ehci_device); }
static void __init ar933x_usb_setup(void) { ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); mdelay(10); ath79_device_reset_clear(AR933X_RESET_USB_HOST); mdelay(10); ath79_device_reset_clear(AR933X_RESET_USB_PHY); mdelay(10); ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE, AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB); ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; platform_device_register(&ath79_ehci_device); }
static void ar934x_nfc_hw_reset(bool active) { if (active) { ath79_device_reset_set(AR934X_RESET_NANDF); udelay(100); ath79_device_reset_set(AR934X_RESET_ETH_SWITCH_ANALOG); udelay(250); } else { ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH_ANALOG); udelay(250); ath79_device_reset_clear(AR934X_RESET_NANDF); udelay(100); } }
static void tl_wr1043nd_rtl8366rb_hw_reset(bool active) { if (active) ath79_device_reset_set(AR71XX_RESET_GE0_PHY); else ath79_device_reset_clear(AR71XX_RESET_GE0_PHY); }
static void ap83_vsc7385_reset(void) { ath79_device_reset_set(AR71XX_RESET_GE1_PHY); udelay(10); ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); mdelay(50); }
static void __init ar933x_usb_setup(void) { ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); mdelay(10); ath79_device_reset_clear(AR933X_RESET_USB_HOST); mdelay(10); ath79_device_reset_clear(AR933X_RESET_USB_PHY); mdelay(10); ath79_usb_register("ehci-platform", -1, AR933X_EHCI_BASE, AR933X_EHCI_SIZE, ATH79_CPU_IRQ(3), &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); }
static int ar933x_wmac_reset(void) { ath79_device_reset_set(AR933X_RESET_WMAC); ath79_device_reset_clear(AR933X_RESET_WMAC); return 0; }
static void wndr3700_usb_led_set(struct led_classdev *cdev, enum led_brightness brightness) { if (brightness) ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); else ath79_device_reset_set(AR71XX_RESET_GE1_PHY); }
static void qca955x_nfc_hw_reset(bool active) { if (active) { ath79_device_reset_set(QCA955X_RESET_NANDF); udelay(250); } else { ath79_device_reset_clear(QCA955X_RESET_NANDF); udelay(100); } }
static void __init ar7240_usb_setup(void) { void __iomem *usb_ctrl_base; ath79_device_reset_clear(AR7240_RESET_OHCI_DLL); ath79_device_reset_set(AR7240_RESET_USB_HOST); mdelay(1000); ath79_device_reset_set(AR7240_RESET_OHCI_DLL); ath79_device_reset_clear(AR7240_RESET_USB_HOST); usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE); /* WAR for HW bug. Here it adjusts the duration between two SOFS */ __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); iounmap(usb_ctrl_base); ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE, AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB); platform_device_register(&ath79_ohci_device); }
static void __init ar913x_wmac_setup(void) { /* reset the WMAC */ ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); mdelay(10); ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); mdelay(10); ath79_wmac_resources[0].start = AR913X_WMAC_BASE; ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2; ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2; }
void __init ath79_register_ar913x_wmac(u8 *cal_data) { if (cal_data) memcpy(ar913x_wmac_data.eeprom_data, cal_data, sizeof(ar913x_wmac_data.eeprom_data)); /* reset the WMAC */ ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); mdelay(10); ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); mdelay(10); platform_device_register(&ar913x_wmac_device); }