static void __init gl_mifi_setup(void)
{
/* ART base address */
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. */
ath79_register_m25p80(NULL);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_mifi_leds_gpio),
gl_mifi_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_MIFI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_mifi_gpio_keys),
gl_mifi_gpio_keys);
/* enable usb */
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, art+GL_MIFI_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, art+GL_MIFI_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(art + GL_MIFI_CALDATA_OFFSET, art + GL_MIFI_WMAC_MAC_OFFSET);
}
static void __init cf_e380ac_v2_setup(void)
{
cf_e380ac_v1v2_common_setup(0x40000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e380ac_v2_leds_gpio),
cf_e380ac_v2_leds_gpio);
}
static void __init antminer_s1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ANTMINER_S1_leds_gpio),
ANTMINER_S1_leds_gpio);
ath79_register_gpio_keys_polled(-1, ANTMINER_S1_KEYSPOLL_INTERVAL,
ARRAY_SIZE(ANTMINER_S1_GPIO_keys),
ANTMINER_S1_GPIO_keys);
gpio_request_one(ANTMINER_S1_GPIO_USB_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_m25p80(&ANTMINER_S1_flash_data);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
static void __init alfa_nx_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
ath79_register_m25p80(&alfa_nx_flash_data);
ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio),
alfa_nx_leds_gpio);
ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL,
ARRAY_SIZE(alfa_nx_gpio_keys),
alfa_nx_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + ALFA_NX_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr,
art + ALFA_NX_MAC1_OFFSET, 0);
/* WAN port */
ath79_register_eth(0);
/* LAN port */
ath79_register_eth(1);
ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL);
}
static void __init cf_e320n_v2_setup(void)
{
cf_exxxn_common_setup(0x10000, CF_E320N_V2_GPIO_EXT_WDT);
cf_exxxn_qca953x_eth_setup();
/* Disable JTAG (enables GPIO0-3) */
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_LAN, true);
ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WAN, true);
ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WLAN, true);
ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_LAN, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WAN, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WLAN, 0);
/* Enable GPIO function for GPIOs in J9 header */
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_1, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_2, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_3, 0);
ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_4, 0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e320n_v2_leds_gpio),
cf_e320n_v2_leds_gpio);
ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cf_e320n_v2_gpio_keys),
cf_e320n_v2_gpio_keys);
}
static void __init gl_inet_setup(void)
{
/* get the mac address which is stored in the 1st 64k uboot MTD */
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
/* get the art address, which is the last 64K. By using
0x1fff1000, it doesn't matter it is 4M, 8M or 16M flash */
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
/* register flash. MTD will use tp-link parser to parser MTD */
ath79_register_m25p80(&gl_inet_flash_data);
/* register gpio LEDs and keys */
ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_inet_leds_gpio),
gl_inet_leds_gpio);
ath79_register_gpio_keys_polled(-1, GL_INET_KEYS_POLL_INTERVAL,
ARRAY_SIZE(gl_inet_gpio_keys),
gl_inet_gpio_keys);
/* enable usb */
ath79_register_usb();
/* register eth0 as WAN, eth1 as LAN */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
/* register wireless mac with cal data */
ath79_register_wmac(ee, mac);
}
/*
* Init the wAPGSC (RB wAPG-5HacT2HnD // wAP AC) hardware.
* The wAPGSC has one Ethernet port via AR8033 with PoE input, dual radio (SoC
* 2.4 GHz and external QCA9880) and a ZT2046Q temperature and voltage sensor
* (currently not supported).
*/
static void __init rbwapgsc_setup(void)
{
u32 flags = RBSPI_HAS_PCI;
if (!rbspi_platform_setup())
return;
rbspi_peripherals_setup(flags);
platform_device_register(&rbwapgsc_phy_device);
ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0);
ath79_eth1_data.mii_bus_dev = &rbwapgsc_phy_device.dev;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.phy_mask = BIT(RBWAPGSC_MDIO_PHYADDR);
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_eth1_pll_data.pll_100 = 0x80000101;
ath79_eth1_pll_data.pll_10 = 0x80001313;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
rbspi_wlan_init(1, 2);
rbspi_register_reset_button(RBWAPGSC_GPIO_BTN_RESET);
ath79_gpio_function_enable(QCA955X_GPIO_FUNC_JTAG_DISABLE|
QCA955X_GPIO_REG_OUT_FUNC4|
QCA955X_GPIO_REG_OUT_FUNC3);
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbwapgsc_leds),
rbwapgsc_leds);
}
static void __init tl_wr1041nv2_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_m25p80(&tl_wr1041nv2_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio),
tl_wr1041nv2_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr1041nv2_gpio_keys),
tl_wr1041nv2_gpio_keys);
ath79_register_wmac(ee, mac);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
mdiobus_register_board_info(db120_mdio0_info,
ARRAY_SIZE(db120_mdio0_info));
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
static void __init WPJ563_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(WPJ563_leds_gpio),
WPJ563_leds_gpio);
ath79_register_gpio_keys_polled(-1, WPJ563_KEYS_POLL_INTERVAL,
ARRAY_SIZE(WPJ563_gpio_keys),
WPJ563_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + WPJ563_WMAC_CALDATA_OFFSET, NULL);
ath79_register_pci();
mdiobus_register_board_info(WPJ563_mdio0_info,
ARRAY_SIZE(WPJ563_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ563_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ563_MAC1_OFFSET, 0);
/* GMAC0 is connected to an QCA8334 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
static void __init dir825b1_setup(void)
{
dir825b1_wlan_init();
ath79_register_mdio(0, 0x0);
ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_pll_data.pll_1000 = 0x11110000;
ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth1_data.phy_mask = 0x10;
ath79_eth1_pll_data.pll_1000 = 0x11110000;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
dir825b1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir825b1_gpio_keys),
dir825b1_gpio_keys);
ath79_register_usb();
platform_device_register(&dir825b1_rtl8366s_device);
}
static void __init tl_wr941nd_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev,
&tl_wr941nd_dsa_data);
ath79_register_m25p80(&tl_wr941nd_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio),
tl_wr941nd_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr941nd_gpio_keys),
tl_wr941nd_gpio_keys);
ath79_register_wmac(eeprom, mac);
}
static void __init ap113_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(&ap113_flash_data);
ath79_register_mdio(0, ~BIT(0));
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_eth(0);
ath79_register_gpio_keys_polled(-1, AP113_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap113_gpio_keys),
ap113_gpio_keys);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap113_leds_gpio),
ap113_leds_gpio);
ath79_register_pci();
ath79_register_usb();
}
static void __init wzrhpg450h_init(void)
{
u8 *ee = (u8 *) KSEG1ADDR(0x1f051000);
u8 *mac = (u8 *) ee + 2;
ath79_register_m25p80_multi(&wzrhpg450h_flash_data);
ath79_register_mdio(0, ~BIT(0));
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio),
wzrhpg450h_leds_gpio);
ath79_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wzrhpg450h_gpio_keys),
wzrhpg450h_gpio_keys);
ath79_register_eth(0);
gpio_request_one(16, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ap91_pci_init(ee, NULL);
ap9x_pci_get_wmac_data(0)->tx_gain_buffalo = true;
ap9x_pci_get_wmac_data(1)->tx_gain_buffalo = true;
ap9x_pci_setup_wmac_led_pin(0, 15);
ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio,
ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio));
}
static void __init tl_wa901nd_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN |
AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN);
/*
* ath79_eth0 would be the WAN port, but is not connected on
* the TL-WA901ND. ath79_eth1 connects to the internal switch chip,
* however we have a single LAN port only.
*/
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(1);
ath79_register_m25p80(&tl_wa901nd_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio),
tl_wa901nd_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wa901nd_gpio_keys),
tl_wa901nd_gpio_keys);
ap91_pci_init(ee, mac);
}
static void __init tl_wr1043nd_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
tl_wr1043nd_rtl8366rb_hw_reset(true);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_pll_data.pll_1000 = 0x1a000000;
ath79_register_eth(0);
ath79_register_usb();
ath79_register_m25p80(&tl_wr1043nd_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio),
tl_wr1043nd_leds_gpio);
platform_device_register(&tl_wr1043nd_rtl8366rb_device);
ath79_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr1043nd_gpio_keys),
tl_wr1043nd_gpio_keys);
ath79_register_wmac(eeprom, mac);
}
static void __init cus227_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(cus227_leds_gpio),
cus227_leds_gpio);
ath79_register_gpio_keys_polled(-1, CUS227_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cus227_gpio_keys),
cus227_gpio_keys);
ath79_register_usb();
ath79_register_nand();
ath79_mtd_caldata_fixup(&cus227_caldata);
cus227_register_spi_devices(cus227_spi_info);
ath79_register_wmac(NULL, NULL);
/* GMAC1 is connected to the internal switch */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_mdio(1, 0x0);
ath79_register_eth(1);
/* Audio initialization: PCM/I2S and CODEC */
cus227_audio_setup();
ath79_audio_device_register();
}
static void __init wndap360_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_mdio(0, ~(WNDAP360_LAN_PHYMASK));
/* Reusing wifi MAC with offset of 1 as eth0 MAC */
ath79_init_mac(ath79_eth0_data.mac_addr,
art + WNDAP360_WMAC0_MAC_OFFSET, 1);
ath79_eth0_pll_data.pll_1000 = 0x11110000;
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = WNDAP360_LAN_PHYMASK;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_register_eth(0);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wndap360_leds_gpio),
wndap360_leds_gpio);
ath79_register_gpio_keys_polled(-1, WNDAP360_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wndap360_gpio_keys),
wndap360_gpio_keys);
ap9x_pci_setup_wmac_led_pin(0, 5);
ap9x_pci_setup_wmac_led_pin(1, 5);
ap94_pci_init(art + WNDAP360_CALDATA0_OFFSET,
art + WNDAP360_WMAC0_MAC_OFFSET,
art + WNDAP360_CALDATA1_OFFSET,
art + WNDAP360_WMAC1_MAC_OFFSET);
}
static void __init ew_dorin_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
static u8 mac[6];
ath79_register_m25p80(NULL);
ath79_register_usb();
if (ar93xx_wmac_read_mac_address(mac)) {
ath79_register_wmac(NULL, NULL);
} else {
ath79_register_wmac(art + DORIN_CALDATA_OFFSET,
art + DORIN_WMAC_MAC_OFFSET);
memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac));
}
mac[3] |= 0x40;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_mdio(0, 0x0);
/* LAN ports */
ath79_register_eth(1);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio),
dorin_leds_gpio);
ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dorin_gpio_keys),
dorin_gpio_keys);
}
/*
* Init the mAP hardware.
* The mAP 2nD has two ethernet ports, PoE output, SSR for LED
* multiplexing and USB port.
*/
static void __init rbmap_setup(void)
{
u32 flags = RBSPI_HAS_USB | RBSPI_HAS_WLAN0 |
RBSPI_HAS_SSR | RBSPI_HAS_POE;
if (!rbspi_platform_setup())
return;
rbspi_spi_cs_gpios[1] = RBMAP_GPIO_SSR_CS;
rbspi_peripherals_setup(flags);
/* GMAC1 is HW MAC, WLAN0 MAC is HW MAC + 2 */
rbspi_network_setup(flags, 0, 2, 0);
if (flags & RBSPI_HAS_POE)
gpio_request_one(RBMAP_GPIO_POE_POWER,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"POE power");
if (flags & RBSPI_HAS_USB)
gpio_request_one(RBMAP_GPIO_USB_PWROFF,
GPIOF_OUT_INIT_HIGH | GPIOF_ACTIVE_LOW |
GPIOF_EXPORT_DIR_FIXED,
"USB power off");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rbmap_leds), rbmap_leds);
/* mAP 2nD has a single reset button as gpio 16 */
rbspi_register_reset_button(RBMAP_GPIO_BTN_RESET);
}
static void __init db120_vhyfi_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_output_select(DB120_VHYFI_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_vhyfi_leds_gpio),
db120_vhyfi_leds_gpio);
ath79_register_gpio_keys_polled(-1, DB120_VHYFI_KEYS_POLL_INTERVAL,
ARRAY_SIZE(db120_vhyfi_gpio_keys),
db120_vhyfi_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + DB120_VHYFI_WMAC_CALDATA_OFFSET, NULL);
ap91_pci_init(art + DB120_VHYFI_PCIE_CALDATA_OFFSET, NULL);
db120_vhyfi_gmac_setup();
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_VHYFI_MAC0_OFFSET, 0);
mdiobus_register_board_info(db120_vhyfi_mdio0_info,
ARRAY_SIZE(db120_vhyfi_mdio0_info));
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
/*
* The hAP, hAP ac lite, hEX lite and hEX PoE lite share the same platform
*/
static void __init rbspi_952_750r2_setup(u32 flags)
{
if (flags & RBSPI_HAS_SSR)
rbspi_spi_cs_gpios[1] = RB952_GPIO_SSR_CS;
rbspi_peripherals_setup(flags);
/*
* GMAC1 is HW MAC + 1, WLAN0 MAC IS HW MAC + 5 (hAP),
* WLAN1 MAC IS HW MAC + 6 (hAP ac lite)
*/
rbspi_network_setup(flags, 1, 5, 6);
if (flags & RBSPI_HAS_USB)
gpio_request_one(RB952_GPIO_USB_PWROFF, GPIOF_ACTIVE_LOW |
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power off");
if (flags & RBSPI_HAS_POE)
gpio_request_one(RB952_GPIO_POE_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"POE power");
ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds), rb952_leds);
/* These devices have a single reset button as gpio 16 */
rbspi_register_reset_button(RB952_GPIO_BTN_RESET);
}
static void __init ubnt_unifi_outdoor_plus_setup(void)
{
u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_m25p80(NULL);
ath79_register_mdio(0, ~(UBNT_UNIFIOD_PRI_PHYMASK |
UBNT_UNIFIOD_2ND_PHYMASK));
ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0);
ath79_register_eth(0);
ath79_register_eth(1);
ap91_pci_init(ee, NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_unifi_outdoor_plus_leds_gpio),
ubnt_unifi_outdoor_plus_leds_gpio);
ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ubnt_xm_gpio_keys),
ubnt_xm_gpio_keys);
}
static void __init wnr2000_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth0_data.speed = SPEED_100;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.has_ar8216 = 1;
ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ath79_eth1_data.phy_mask = 0x10;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_m25p80(&wnr2000_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio),
wnr2000_leds_gpio);
ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL,
ARRAY_SIZE(wnr2000_gpio_keys),
wnr2000_gpio_keys);
ath79_register_wmac(eeprom, NULL);
}
static void __init ubnt_uap_pro_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_uap_pro_gpio_leds),
ubnt_uap_pro_gpio_leds);
ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
ARRAY_SIZE(uap_pro_gpio_keys),
uap_pro_gpio_keys);
ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(uap_pro_mdio0_info,
ARRAY_SIZE(uap_pro_mdio0_info));
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
ath79_init_mac(ath79_eth0_data.mac_addr,
eeprom + UAP_PRO_MAC0_OFFSET, 0);
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
static void __init cf_e355ac_v2_setup(void)
{
cf_e355ac_setup();
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e355ac_v2_leds_gpio),
cf_e355ac_v2_leds_gpio);
}
static void __init ubnt_rocket_m_xw_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xw_leds_gpio),
ubnt_xw_leds_gpio);
ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ubnt_xm_gpio_keys),
ubnt_xm_gpio_keys);
ath79_register_wmac(eeprom + UAP_PRO_WMAC_CALDATA_OFFSET, NULL);
ap91_pci_init(eeprom + UAP_PRO_PCI_CALDATA_OFFSET, NULL);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
ath79_init_mac(ath79_eth0_data.mac_addr,
eeprom + UAP_PRO_MAC0_OFFSET, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_mdio(0, ~BIT(4));
ath79_eth0_data.phy_mask = BIT(4);
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
static void __init cf_e385ac_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f040000);
cf_e38xac_common_setup(0x40000);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e385ac_leds_gpio),
cf_e385ac_leds_gpio);
mdiobus_register_board_info(cf_e385ac_mdio0_info,
ARRAY_SIZE(cf_e385ac_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* QCA9558 GMAC0 is connected to RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x96000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_register_eth(0);
/* QCA9558 GMAC1 is connected to SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
ath79_register_eth(1);
}
static void __init hornet_ub_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
hornet_ub_gpio_setup();
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio),
hornet_ub_leds_gpio);
ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL,
ARRAY_SIZE(hornet_ub_gpio_keys),
hornet_ub_gpio_keys);
ath79_init_mac(ath79_eth1_data.mac_addr,
art + HORNET_UB_MAC0_OFFSET, 0);
ath79_init_mac(ath79_eth0_data.mac_addr,
art + HORNET_UB_MAC1_OFFSET, 0);
ath79_register_mdio(0, 0x0);
ath79_register_eth(1);
ath79_register_eth(0);
ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL);
ath79_register_usb();
}
static void __init common_setup(unsigned usb_power_gpio, bool sec_ethernet)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
/* disable PHY_SWAP and PHY_ADDR_SWAP bits */
ath79_setup_ar933x_phy4_switch(false, false);
ath79_register_m25p80(&tl_wr703n_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio),
tl_wr703n_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL,
ARRAY_SIZE(tl_wr703n_gpio_keys),
tl_wr703n_gpio_keys);
gpio_request_one(usb_power_gpio,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB power");
ath79_register_usb();
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
if (sec_ethernet)
{
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_register_eth(1);
}
tplink_register_builtin_wmac1(0x1000, mac, 0);
}
static void __init TL_WA901ND_V4_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
ath79_register_m25p80(&tl_wa901nd_v4_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(TL_WA901ND_V4_leds_gpio),
TL_WA901ND_V4_leds_gpio);
ath79_register_gpio_keys_polled(-1, TL_WA901ND_V4_KEYS_POLL_INTERVAL,
ARRAY_SIZE(TL_WA901ND_V4_gpio_keys),
TL_WA901ND_V4_gpio_keys);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1);
ath79_switch_data.phy4_mii_en = 1;
ath79_register_eth(0);
ath79_register_eth(1);
ath79_register_wmac(ee, mac);
}
