/*
* Fix on 2.4 GHz band for orientation sensitivity issue by increasing
* rf_pwd_icsyndiv.
*
* Theoretical Rules:
* if 2 GHz band
* if forceBiasAuto
* if synth_freq < 2412
* bias = 0
* else if 2412 <= synth_freq <= 2422
* bias = 1
* else // synth_freq > 2422
* bias = 2
* else if forceBias > 0
* bias = forceBias & 7
* else
* no change, use value from ini file
* else
* no change, invalid band
*
* 1st Mod:
* 2422 also uses value of 2
* <approved>
*
* 2nd Mod:
* Less than 2412 uses value of 0, 2412 and above uses value of 2
*/
static void
ar2133ForceBias(struct ath_hal *ah, uint16_t synth_freq)
{
uint32_t tmp_reg;
int reg_writes = 0;
uint32_t new_bias = 0;
struct ar2133State *priv = AR2133(ah);
/* XXX this is a bit of a silly check for 2.4ghz channels -adrian */
if (synth_freq >= 3000)
return;
if (synth_freq < 2412)
new_bias = 0;
else if (synth_freq < 2422)
new_bias = 1;
else
new_bias = 2;
/* pre-reverse this field */
tmp_reg = ath_hal_reverseBits(new_bias, 3);
HALDEBUG(ah, HAL_DEBUG_ANY, "%s: Force rf_pwd_icsyndiv to %1d on %4d\n",
__func__, new_bias, synth_freq);
/* swizzle rf_pwd_icsyndiv */
ar5416ModifyRfBuffer(priv->Bank6Data, tmp_reg, 3, 181, 3);
/* write Bank 6 with new params */
ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank6, priv->Bank6Data, reg_writes);
}
/*
* Reads EEPROM header info from device structure and programs
* all rf registers
*
* REQUIRES: Access to the analog rf device
*/
static HAL_BOOL
ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
uint16_t modesIndex, uint16_t *rfXpdGain)
{
struct ar2133State *priv = AR2133(ah);
int writes;
HALASSERT(priv);
/* Setup Bank 0 Write */
ath_hal_ini_bank_setup(priv->Bank0Data, &AH5416(ah)->ah_ini_bank0, 1);
/* Setup Bank 1 Write */
ath_hal_ini_bank_setup(priv->Bank1Data, &AH5416(ah)->ah_ini_bank1, 1);
/* Setup Bank 2 Write */
ath_hal_ini_bank_setup(priv->Bank2Data, &AH5416(ah)->ah_ini_bank2, 1);
/* Setup Bank 3 Write */
ath_hal_ini_bank_setup(priv->Bank3Data, &AH5416(ah)->ah_ini_bank3, modesIndex);
/* Setup Bank 6 Write */
ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
/* Only the 5 or 2 GHz OB/DB need to be set for a mode */
if (IEEE80211_IS_CHAN_2GHZ(chan)) {
ar5416ModifyRfBuffer(priv->Bank6Data,
ath_hal_eepromGet(ah, AR_EEP_OB_2, AH_NULL), 3, 197, 0);
ar5416ModifyRfBuffer(priv->Bank6Data,
ath_hal_eepromGet(ah, AR_EEP_DB_2, AH_NULL), 3, 194, 0);
} else {
ar5416ModifyRfBuffer(priv->Bank6Data,
ath_hal_eepromGet(ah, AR_EEP_OB_5, AH_NULL), 3, 203, 0);
ar5416ModifyRfBuffer(priv->Bank6Data,
ath_hal_eepromGet(ah, AR_EEP_DB_5, AH_NULL), 3, 200, 0);
}
/* Setup Bank 7 Setup */
ath_hal_ini_bank_setup(priv->Bank7Data, &AH5416(ah)->ah_ini_bank7, 1);
/* Write Analog registers */
writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank0,
priv->Bank0Data, 0);
writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank1,
priv->Bank1Data, writes);
writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank2,
priv->Bank2Data, writes);
writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank3,
priv->Bank3Data, writes);
writes = ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank6,
priv->Bank6Data, writes);
(void) ath_hal_ini_bank_write(ah, &AH5416(ah)->ah_ini_bank7,
priv->Bank7Data, writes);
return AH_TRUE;
#undef RF_BANK_SETUP
}
