/**
* Helper function for implementing BHND_BUS_IS_REGION_VALID().
*
* This implementation assumes that port and region numbers are 0-indexed and
* are allocated non-sparsely, using BHND_BUS_GET_PORT_COUNT() and
* BHND_BUS_GET_REGION_COUNT() to determine if @p port and @p region fall
* within the defined range.
*/
bool
bhnd_generic_is_region_valid(device_t dev, device_t child,
bhnd_port_type type, u_int port, u_int region)
{
if (port >= bhnd_get_port_count(child, type))
return (false);
if (region >= bhnd_get_region_count(child, type, port))
return (false);
return (true);
}
/* Allocate region records for the given port, and add the port's memory
* range to the mem_rman */
static int
chipc_rman_init_regions (struct chipc_softc *sc, bhnd_port_type type,
u_int port)
{
struct chipc_region *cr;
rman_res_t start, end;
u_int num_regions;
int error;
num_regions = bhnd_get_region_count(sc->dev, type, port);
for (u_int region = 0; region < num_regions; region++) {
/* Allocate new region record */
cr = chipc_alloc_region(sc, type, port, region);
if (cr == NULL)
return (ENODEV);
/* Can't manage regions that cannot be allocated */
if (cr->cr_rid < 0) {
BHND_DEBUG_DEV(sc->dev, "no rid for chipc region "
"%s%u.%u", bhnd_port_type_name(type), port, region);
chipc_free_region(sc, cr);
continue;
}
/* Add to rman's managed range */
start = cr->cr_addr;
end = cr->cr_end;
if ((error = rman_manage_region(&sc->mem_rman, start, end))) {
chipc_free_region(sc, cr);
return (error);
}
/* Add to region list */
STAILQ_INSERT_TAIL(&sc->mem_regions, cr, cr_link);
}
return (0);
}
