static void lb_boot_media_params(struct lb_header *header)
{
struct lb_boot_media_params *bmp;
struct cbfs_props props;
const struct region_device *boot_dev;
struct region_device fmrd;
boot_device_init();
if (cbfs_boot_region_properties(&props))
return;
boot_dev = boot_device_ro();
if (boot_dev == NULL)
return;
bmp = (struct lb_boot_media_params *)lb_new_record(header);
bmp->tag = LB_TAG_BOOT_MEDIA_PARAMS;
bmp->size = sizeof(*bmp);
bmp->cbfs_offset = props.offset;
bmp->cbfs_size = props.size;
bmp->boot_media_size = region_device_sz(boot_dev);
bmp->fmap_offset = ~(uint64_t)0;
if (find_fmap_directory(&fmrd) == 0) {
bmp->fmap_offset = region_device_offset(&fmrd);
}
}
static int init_emu_rom_cbfs_media(struct cbfs_media *media)
{
boot_device_init();
media->context = (void *)boot_device_ro();
media->open = emu_rom_open;
media->close = emu_rom_close;
media->map = emu_rom_map;
media->unmap = emu_rom_unmap;
media->read = emu_rom_read;
return 0;
}
/* here is a simple SPI debug test, known to fid trouble */
static void simple_spi_test(void)
{
const struct region_device *boot_dev;
int i, amt = 4 * MiB, errors = 0;
//u32 *data = (void *)0x40000000;
u32 data[1024];
u32 in;
boot_device_init();
boot_dev = boot_device_ro();
amt = sizeof(data);
if (boot_dev == NULL) {
printk(BIOS_SPEW, "Failed to initialize default media.\n");
return;
}
if (rdev_readat(boot_dev, data, 0, amt) < amt) {
printk(BIOS_SPEW, "simple_spi_test fails\n");
return;
}
for(i = 0; i < amt; i += 4){
if (rdev_readat(boot_dev, &in, i, 4) < 4) {
printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i);
return;
}
if (data[i/4] != in){
errors++;
printk(BIOS_SPEW, "BAD at %d(%p):\nRAM %08lx\nSPI %08lx\n",
i, &data[i/4], (unsigned long)data[i/4], (unsigned long)in);
/* reread it to see which is wrong. */
if (rdev_readat(boot_dev, &in, i, 4) < 4) {
printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i);
return;
}
printk(BIOS_SPEW, "RTRY at %d(%p):\nRAM %08lx\nSPI %08lx\n",
i, &data[i/4], (unsigned long)data[i/4], (unsigned long)in);
}
}
printk(BIOS_SPEW, "%d errors\n", errors);
}
int boot_device_wp_region(struct region_device *rd,
const enum bootdev_prot_type type)
{
uint32_t ctrlr_pr;
/* Ensure boot device has been initialized at least once. */
boot_device_init();
const struct spi_flash *boot_dev = boot_device_spi_flash();
if (boot_dev == NULL)
return -1;
if (type == MEDIA_WP) {
if (spi_flash_is_write_protected(boot_dev,
region_device_region(rd)) != 1) {
return spi_flash_set_write_protected(boot_dev,
region_device_region(rd), true,
SPI_WRITE_PROTECTION_REBOOT);
}
/* Already write protected */
return 0;
}
switch (type) {
case CTRLR_WP:
ctrlr_pr = WRITE_PROTECT;
break;
case CTRLR_RP:
ctrlr_pr = READ_PROTECT;
break;
case CTRLR_RWP:
ctrlr_pr = READ_WRITE_PROTECT;
break;
default:
return -1;
}
return spi_flash_ctrlr_protect_region(boot_dev,
region_device_region(rd), ctrlr_pr);
}
void platform_init(void)
{
u32 ret, tmp;
boot_reason_t reason;
/* init watch dog, will enable AP watch dog */
mtk_wdt_init();
/*init kpd PMIC mode support*/
set_kpd_pmic_mode();
#if CFG_MDWDT_DISABLE
/* no need to disable MD WDT, the code here is for backup reason */
/* disable MD0 watch dog. */
DRV_WriteReg32(0x20050000, 0x2200);
/* disable MD1 watch dog. */
DRV_WriteReg32(0x30050020, 0x2200);
#endif
//ALPS00427972, implement the analog register formula
//Set the calibration after power on
//Add here for eFuse, chip version checking -> analog register calibration
mt_usb_calibraion();
//ALPS00427972, implement the analog register formula
/* make usb11 phy enter savecurrent mode */
mt_usb11_phy_savecurrent();
#if 1 /* FIXME */
g_boot_reason = reason = platform_boot_status();
if (reason == BR_RTC || reason == BR_POWER_KEY || reason == BR_USB || reason == BR_WDT || reason == BR_WDT_BY_PASS_PWK)
rtc_bbpu_power_on();
#else
g_boot_reason = BR_POWER_KEY;
#endif
enable_PMIC_kpd_clock();
#if CFG_EMERGENCY_DL_SUPPORT
/* check if to enter emergency download mode */
if (mtk_detect_dl_keys()) {
platform_emergency_download(CFG_EMERGENCY_DL_TIMEOUT_MS);
}
#endif
/* init memory */
mt_mem_init();
#ifdef MTK_MT8193_SUPPORT
mt8193_init();
#endif
/* init device storeage */
ret = boot_device_init();
print("%s Init Boot Device: %s(%d)\n", MOD, ret ? "FAIL" : "OK", ret);
#if CFG_REBOOT_TEST
mtk_wdt_sw_reset();
while(1);
#endif
}
void platform_init(void)
{
u32 ret, tmp;
boot_reason_t reason;
#ifdef PL_PROFILING
u32 profiling_time;
profiling_time = 0;
#endif
#if !defined(CFG_MEM_PRESERVED_MODE)
#ifdef PL_PROFILING
profiling_time = get_timer(0);
#endif
/* init watch dog, will enable AP watch dog */
mtk_wdt_init();
#ifdef PL_PROFILING
printf("#T#wdt_init=%d\n", get_timer(profiling_time));
profiling_time = get_timer(0); //for next
#endif
/*init kpd PMIC mode support*/
set_kpd_pmic_mode();
#ifdef PL_PROFILING
printf("#T#kpd_pmic=%d\n", get_timer(profiling_time));
#endif
#else
//Memory Preserved mode, disable WDT
DRV_WriteReg32(0x10007000, 0x22000000);
#endif
#if CFG_MDWDT_DISABLE
/* no need to disable MD WDT, the code here is for backup reason */
/* disable MD0 watch dog. */
DRV_WriteReg32(0x20050000, 0x2200);
#endif
#if !defined(CFG_MEM_PRESERVED_MODE)
#ifdef PL_PROFILING
profiling_time = get_timer(0);
#endif
//ALPS00427972, implement the analog register formula
//Set the calibration after power on
//Add here for eFuse, chip version checking -> analog register calibration
mt_usb_calibraion();
//ALPS00427972, implement the analog register formula
/* make usb11 phy enter savecurrent mode */
// USB11, USB host need it, 72 with host ip, but not list in feature list,
// USB20, USB target for target,
// access with UM (throught CPU) will mett all '?', means protect
// access with PM (BUS, not CPU) will mett all '0', means clock or Power is gating
//mt_usb11_phy_savecurrent();
#ifdef PL_PROFILING
printf("#T#usb calib=%d\n", get_timer(profiling_time));
profiling_time = get_timer(0); //for next
#endif
g_boot_reason = reason = platform_boot_status();
if (reason == BR_RTC || reason == BR_POWER_KEY || reason == BR_USB || reason == BR_WDT || reason == BR_WDT_BY_PASS_PWK
#ifdef RTC_2SEC_REBOOT_ENABLE
|| reason == BR_2SEC_REBOOT
#endif //#ifdef RTC_2SEC_REBOOT_ENABLE
)
rtc_bbpu_power_on();
#ifdef PL_PROFILING
printf("#T#BR&bbpu on=%d\n", get_timer(profiling_time));
profiling_time = get_timer(0); //for next
#endif
enable_PMIC_kpd_clock();
#ifdef PL_PROFILING
printf("#T#enable PMIC kpd clk=%d\n", get_timer(profiling_time));
#endif
#else
rtc_bbpu_power_on();
#endif
#if !defined(CFG_MEM_PRESERVED_MODE)
#if CFG_EMERGENCY_DL_SUPPORT
#ifdef PL_PROFILING
profiling_time = get_timer(0);
#endif
/* check if to enter emergency download mode */
if (mtk_detect_dl_keys()) {
platform_emergency_download(CFG_EMERGENCY_DL_TIMEOUT_MS);
}
#ifdef PL_PROFILING
printf("#T#chk_emgdwl=%d\n", get_timer(profiling_time));
#endif
#endif
#ifdef PL_PROFILING
profiling_time = get_timer(0);
#endif
/* init memory */
mt_mem_init();
#ifdef PL_PROFILING
printf("#T#mem_init&tst=%d\n", get_timer(profiling_time));
#endif
#endif
#ifdef MTK_MT8193_SUPPORT
mt8193_init();
#endif
#ifdef PL_PROFILING
profiling_time = get_timer(0);
#endif
/* init device storeage */
ret = boot_device_init();
print("%s Init Boot Device: %s(%d)\n", MOD, ret ? "FAIL" : "OK", ret);
#ifdef PL_PROFILING
printf("#T#bootdev_init=%d\n", get_timer(profiling_time));
#endif
#if CFG_REBOOT_TEST
mtk_wdt_sw_reset();
while(1);
#endif
}
