static void __init c6474_setup_clocks(struct device_node *node) { struct pll_data *pll = &c6x_soc_pll1; struct clk *sysclks = pll->sysclks; pll->flags = PLL_HAS_MUL; sysclks[7].flags |= FIXED_DIV_PLL; sysclks[7].div = 1; sysclks[9].flags |= FIXED_DIV_PLL; sysclks[9].div = 3; sysclks[10].flags |= FIXED_DIV_PLL; sysclks[10].div = 6; sysclks[11].div = PLLDIV11; sysclks[12].flags |= FIXED_DIV_PLL; sysclks[12].div = 2; sysclks[13].div = PLLDIV13; c6x_core_clk.parent = &sysclks[7]; c6x_i2c_clk.parent = &sysclks[10]; c6x_watchdog_clk.parent = &sysclks[10]; c6x_mcbsp1_clk.parent = &sysclks[10]; c6x_mcbsp2_clk.parent = &sysclks[10]; c6x_clks_init(c6474_clks); }
static void __init c6472_setup_clocks(struct device_node *node) { struct pll_data *pll = &c6x_soc_pll1; struct clk *sysclks = pll->sysclks; int i; pll->flags = PLL_HAS_MUL; for (i = 1; i <= 6; i++) { sysclks[i].flags |= FIXED_DIV_PLL; sysclks[i].div = 1; } sysclks[7].flags |= FIXED_DIV_PLL; sysclks[7].div = 3; sysclks[8].flags |= FIXED_DIV_PLL; sysclks[8].div = 6; sysclks[9].flags |= FIXED_DIV_PLL; sysclks[9].div = 2; sysclks[10].div = PLLDIV10; c6x_core_clk.parent = &sysclks[get_coreid() + 1]; c6x_i2c_clk.parent = &sysclks[8]; c6x_watchdog_clk.parent = &sysclks[8]; c6x_mdio_clk.parent = &sysclks[5]; c6x_clks_init(c6472_clks); }
static void __init c6678_setup_clocks(struct device_node *node) { struct pll_data *pll = &c6x_soc_pll1; struct clk *sysclks = pll->sysclks; pll->flags = PLL_HAS_MUL; sysclks[1].flags |= FIXED_DIV_PLL; sysclks[1].div = 1; sysclks[2].div = PLLDIV2; sysclks[3].flags |= FIXED_DIV_PLL; sysclks[3].div = 2; sysclks[4].flags |= FIXED_DIV_PLL; sysclks[4].div = 3; sysclks[5].div = PLLDIV5; sysclks[6].flags |= FIXED_DIV_PLL; sysclks[6].div = 64; sysclks[7].flags |= FIXED_DIV_PLL; sysclks[7].div = 6; sysclks[8].div = PLLDIV8; sysclks[9].flags |= FIXED_DIV_PLL; sysclks[9].div = 12; sysclks[10].flags |= FIXED_DIV_PLL; sysclks[10].div = 3; sysclks[11].flags |= FIXED_DIV_PLL; sysclks[11].div = 6; c6x_core_clk.parent = &sysclks[0]; c6x_i2c_clk.parent = &sysclks[7]; c6x_clks_init(c6678_clks); }
static void __init c6455_setup_clocks(struct device_node *node) { struct pll_data *pll = &c6x_soc_pll1; struct clk *sysclks = pll->sysclks; pll->flags = PLL_HAS_PRE | PLL_HAS_MUL; sysclks[2].flags |= FIXED_DIV_PLL; sysclks[2].div = 3; sysclks[3].flags |= FIXED_DIV_PLL; sysclks[3].div = 6; sysclks[4].div = PLLDIV4; sysclks[5].div = PLLDIV5; c6x_core_clk.parent = &sysclks[0]; c6x_i2c_clk.parent = &sysclks[3]; c6x_watchdog_clk.parent = &sysclks[3]; c6x_mdio_clk.parent = &sysclks[3]; c6x_clks_init(c6455_clks); }