int can_devinit(void)
{
static bool initialized = false;
struct can_dev_s *can;
int ret;
/* Check if we have already initialized */
if (!initialized) {
/* Call stm32_caninitialize() to get an instance of the CAN interface */
can = stm32_caninitialize(CAN_PORT);
if (can == NULL) {
candbg("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can0" */
ret = can_register("/dev/can0", can);
if (ret < 0) {
candbg("ERROR: can_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
}
int stm32_can_setup(void)
{
#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
struct can_dev_s *can;
int ret;
/* Call stm32_caninitialize() to get an instance of the CAN interface */
can = stm32_caninitialize(CAN_PORT);
if (can == NULL)
{
candbg("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can0" */
ret = can_register("/dev/can0", can);
if (ret < 0)
{
candbg("ERROR: can_register failed: %d\n", ret);
return ret;
}
return OK;
#else
return -ENODEV;
#endif
}
static int can_xmit(FAR struct can_dev_s *dev)
{
int tmpndx;
int ret = -EBUSY;
canllvdbg("xmit head: %d queue: %d tail: %d\n",
dev->cd_xmit.tx_head, dev->cd_xmit.tx_queue, dev->cd_xmit.tx_tail);
/* If there is nothing to send, then just disable interrupts and return */
if (dev->cd_xmit.tx_head == dev->cd_xmit.tx_tail)
{
DEBUGASSERT(dev->cd_xmit.tx_queue == dev->cd_xmit.tx_head);
dev_txint(dev, false);
return -EIO;
}
/* Check if we have already queued all of the data in the TX fifo.
*
* tx_tail: Incremented in can_write each time a message is queued in the FIFO
* tx_head: Incremented in can_txdone each time a message completes
* tx_queue: Incremented each time that a message is sent to the hardware.
*
* Logically (ignoring buffer wrap-around): tx_head <= tx_queue <= tx_tail
* tx_head == tx_queue == tx_tail means that the FIFO is empty
* tx_head < tx_queue == tx_tail means that all data has been queued, but
* we are still waiting for transmissions to complete.
*/
while (dev->cd_xmit.tx_queue != dev->cd_xmit.tx_tail && dev_txready(dev))
{
/* No.. The FIFO should not be empty in this case */
DEBUGASSERT(dev->cd_xmit.tx_head != dev->cd_xmit.tx_tail);
/* Increment the FIFO queue index before sending (because dev_send()
* might call can_txdone().
*/
tmpndx = dev->cd_xmit.tx_queue;
if (++dev->cd_xmit.tx_queue >= CONFIG_CAN_FIFOSIZE)
{
dev->cd_xmit.tx_queue = 0;
}
/* Send the next message at the FIFO queue index */
ret = dev_send(dev, &dev->cd_xmit.tx_buffer[tmpndx]);
if (ret != OK)
{
candbg("dev_send failed: %d\n", ret);
break;
}
}
/* Make sure that TX interrupts are enabled */
dev_txint(dev, true);
return ret;
}