void sysclk_init(void)
{
uint8_t *reg = (uint8_t *)&PR.PRGEN;
uint8_t i;
#ifdef CONFIG_OSC_RC32_CAL
uint16_t cal;
#endif
/* Turn off all peripheral clocks that can be turned off. */
for (i = 0; i <= SYSCLK_PORT_F; i++) {
*(reg++) = 0xff;
}
/* Set up system clock prescalers if different from defaults */
if ((CONFIG_SYSCLK_PSADIV != SYSCLK_PSADIV_1)
|| (CONFIG_SYSCLK_PSBCDIV != SYSCLK_PSBCDIV_1_1)) {
sysclk_set_prescalers(CONFIG_SYSCLK_PSADIV,
CONFIG_SYSCLK_PSBCDIV);
}
#if (CONFIG_OSC_RC32_CAL==48000000UL)
MSB(cal) = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(USBRCOSC));
LSB(cal) = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(USBRCOSCA));
/*
* If a device has an uncalibrated value in the
* production signature row (early sample part), load a
* sane default calibration value.
*
* MODIFIED 16-7-2012 by C.DOGGEN:
* - commented the if statement, otherwise the USART won't work
* - don't know exactly the problem, but this seems to be a workaround.
*/
if (cal == 0xFFFF) {
cal = 0x2340;
}
osc_user_calibration(OSC_ID_RC32MHZ,cal);
#endif
/*
* Switch to the selected initial system clock source, unless
* the default internal 2 MHz oscillator is selected.
*/
if (CONFIG_SYSCLK_SOURCE != SYSCLK_SRC_RC2MHZ) {
bool need_rc2mhz = false;
switch (CONFIG_SYSCLK_SOURCE) {
case SYSCLK_SRC_RC32MHZ:
osc_enable(OSC_ID_RC32MHZ);
osc_wait_ready(OSC_ID_RC32MHZ);
break;
case SYSCLK_SRC_RC32KHZ:
osc_enable(OSC_ID_RC32KHZ);
osc_wait_ready(OSC_ID_RC32KHZ);
break;
case SYSCLK_SRC_XOSC:
osc_enable(OSC_ID_XOSC);
osc_wait_ready(OSC_ID_XOSC);
break;
#ifdef CONFIG_PLL0_SOURCE
case SYSCLK_SRC_PLL:
if (CONFIG_PLL0_SOURCE == PLL_SRC_RC2MHZ) {
need_rc2mhz = true;
}
pll_enable_config_defaults(0);
break;
#endif
default:
//unhandled_case(CONFIG_SYSCLK_SOURCE);
return;
}
ccp_write_io((uint8_t *)&CLK.CTRL, CONFIG_SYSCLK_SOURCE);
Assert(CLK.CTRL == CONFIG_SYSCLK_SOURCE);
#ifdef CONFIG_OSC_AUTOCAL
osc_enable_autocalibration(CONFIG_OSC_AUTOCAL,CONFIG_OSC_AUTOCAL_REF_OSC);
if (CONFIG_OSC_AUTOCAL == OSC_ID_RC2MHZ
|| CONFIG_OSC_AUTOCAL_REF_OSC == OSC_ID_RC2MHZ) {
need_rc2mhz = true;
}
#endif
if (!need_rc2mhz) {
osc_disable(OSC_ID_RC2MHZ);
}
}
}
/**
* \brief Disable clock for the USB module
*/
void sysclk_disable_usb(void)
{
sysclk_disable_module(SYSCLK_PORT_GEN, SYSCLK_USB);
ccp_write_io((uint8_t *)&CLK.USBCTRL, 0);
}
int main (void)
{
hw_init();
while(ioport_get_pin_level(BUTTON)==1);
delay_ms(500);
ioport_set_pin_level(LED_BLUE,1);
delay_ms(500);
ioport_set_pin_level(LED_GREEN1,1);
delay_ms(500);
ioport_set_pin_level(LED_GREEN2,1);
delay_ms(500);
//ioport_set_pin_level(LED_RED,1);
int val=0;
char temp[10];
char day[10]="none";
char hour[10]="none";
for(;;)
{
long_delay(3);
ioport_set_pin_level(SHUTTER,0);
delay_ms(500);
ioport_set_pin_level(SHUTTER,1);
val=ioport_get_pin_level(BUTTON);
if(val==0)
{
ioport_set_pin_level(LED_BLUE,1);
ioport_set_pin_level(LED_GREEN1,1);
ioport_set_pin_level(LED_GREEN2,1);
ioport_set_pin_level(LED_RED,1);
delay_ms(200);
ioport_set_pin_level(LED_BLUE,0);
delay_ms(500);
ioport_set_pin_level(LED_GREEN1,0);
delay_ms(500);
ioport_set_pin_level(LED_GREEN2,0);
delay_ms(500);
ioport_set_pin_level(LED_RED,0);
delay_ms(500);
//boot();
ccp_write_io((uint8_t *)&RST.CTRL,RST_SWRST_bm);
}
}
for (;;)
{
read_temp_str(&temp);
str_of_date(&day);
str_of_hour(&hour);
printf("temp:%s date:%s %s\n",temp,day,hour);
val=ioport_get_pin_level(BUTTON);
if(val==0)
{
delay_ms(1000);
val=ioport_get_pin_level(BUTTON);
if(val==0)
{
ioport_set_pin_level(LED_BLUE,1);
ioport_set_pin_level(LED_GREEN1,1);
ioport_set_pin_level(LED_GREEN2,1);
ioport_set_pin_level(LED_RED,1);
delay_ms(200);
ioport_set_pin_level(LED_BLUE,0);
delay_ms(500);
ioport_set_pin_level(LED_GREEN1,0);
delay_ms(500);
ioport_set_pin_level(LED_GREEN2,0);
delay_ms(500);
ioport_set_pin_level(LED_RED,0);
delay_ms(500);
//boot();
ccp_write_io((uint8_t *)&RST.CTRL,RST_SWRST_bm);
}
}
}
// Insert application code here, after the board has been initialized.
}
/**
* \brief Disable clock for the USB module
*/
void sysclk_disable_usb_opt(void)
{
ccp_write_io((uint8_t *)&CLK.USBCTRL, 0);
}
void sysclk_init(void)
{
//uint8_t *reg = (uint8_t *)&PR.PRGEN;
//uint8_t i;
#ifdef CONFIG_OSC_RC32_CAL
uint16_t cal;
/* avoid Cppcheck Warning */
UNUSED(cal);
#endif
bool need_rc2mhz = false;
/* Turn off all peripheral clocks that can be turned off. */
/*
for (i = 0; i <= SYSCLK_PORT_F; i++) {
*(reg++) = 0xff;
}
*/
/* Set up system clock prescalers if different from defaults */
if ((CONFIG_SYSCLK_PSADIV != SYSCLK_PSADIV_1)
|| (CONFIG_SYSCLK_PSBCDIV != SYSCLK_PSBCDIV_1_1)) {
sysclk_set_prescalers(CONFIG_SYSCLK_PSADIV,
CONFIG_SYSCLK_PSBCDIV);
}
#if (CONFIG_OSC_RC32_CAL==48000000UL)
MSB(cal) = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(USBRCOSC));
LSB(cal) = nvm_read_production_signature_row(
nvm_get_production_signature_row_offset(USBRCOSCA));
/*
* If a device has an uncalibrated value in the
* production signature row (early sample part), load a
* sane default calibration value.
*/
if (cal == 0xFFFF) {
cal = 0x2340;
}
osc_user_calibration(OSC_ID_RC32MHZ,cal);
#endif
/*
* Switch to the selected initial system clock source, unless
* the default internal 2 MHz oscillator is selected.
*/
if (CONFIG_SYSCLK_SOURCE == SYSCLK_SRC_RC2MHZ) {
need_rc2mhz = true;
} else {
switch (CONFIG_SYSCLK_SOURCE) {
case SYSCLK_SRC_RC32MHZ:
osc_enable(OSC_ID_RC32MHZ);
osc_wait_ready(OSC_ID_RC32MHZ);
#ifdef CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
if (CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC
!= OSC_ID_USBSOF) {
osc_enable(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
osc_wait_ready(CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
}
osc_enable_autocalibration(OSC_ID_RC32MHZ,
CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC);
#endif
break;
case SYSCLK_SRC_RC32KHZ:
osc_enable(OSC_ID_RC32KHZ);
osc_wait_ready(OSC_ID_RC32KHZ);
break;
case SYSCLK_SRC_XOSC:
osc_enable(OSC_ID_XOSC);
osc_wait_ready(OSC_ID_XOSC);
break;
#ifdef CONFIG_PLL0_SOURCE
case SYSCLK_SRC_PLL:
if (CONFIG_PLL0_SOURCE == PLL_SRC_RC2MHZ) {
need_rc2mhz = true;
}
pll_enable_config_defaults(0);
break;
#endif
#if XMEGA_E
case SYSCLK_SRC_RC8MHZ:
osc_enable(OSC_ID_RC8MHZ);
osc_wait_ready(OSC_ID_RC8MHZ);
break;
#endif
default:
//unhandled_case(CONFIG_SYSCLK_SOURCE);
return;
}
ccp_write_io((uint8_t *)&CLK.CTRL, CONFIG_SYSCLK_SOURCE);
Assert(CLK.CTRL == CONFIG_SYSCLK_SOURCE);
}
if (need_rc2mhz) {
#ifdef CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC
osc_enable(CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC);
osc_wait_ready(CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC);
osc_enable_autocalibration(OSC_ID_RC2MHZ,
CONFIG_OSC_AUTOCAL_RC2MHZ_REF_OSC);
#endif
} else {
osc_disable(OSC_ID_RC2MHZ);
}
#ifdef CONFIG_RTC_SOURCE
sysclk_rtcsrc_enable(CONFIG_RTC_SOURCE);
#endif
}
/**
* \brief Initialize low power mode
*
* Disconnect all peripherals, enable pull-up on all I/O pins, disable watchdog
* timer and brown out detection, and JTAG-interface (if configured in
* \ref conf_low_power_demo.h )
*/
static void lowpower_init(void)
{
/* Disable unused modules */
sysclk_disable_peripheral_clock(&AES);
sysclk_disable_peripheral_clock(&DMA);
sysclk_disable_peripheral_clock(&EVSYS);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&RTC);
sysclk_disable_peripheral_clock(&EBI);
#endif
/* Disable TWI */
sysclk_disable_peripheral_clock(&TWIC);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&TWID);
#endif
sysclk_disable_peripheral_clock(&TWIE);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&TWIF);
#endif
/* Disable SPI */
sysclk_disable_peripheral_clock(&SPIC);
sysclk_disable_peripheral_clock(&SPID);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&SPIF);
#endif
/* Disable USART */
sysclk_disable_peripheral_clock(&USARTC0);
sysclk_disable_peripheral_clock(&USARTC1);
sysclk_disable_peripheral_clock(&USARTD0);
sysclk_disable_peripheral_clock(&USARTD1);
sysclk_disable_peripheral_clock(&USARTE0);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&USARTE1);
#endif
sysclk_disable_peripheral_clock(&USARTF0);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&USARTF1);
#endif
/* Disable timers/counters */
sysclk_disable_peripheral_clock(&TCC0);
sysclk_disable_peripheral_clock(&TCC1);
sysclk_disable_peripheral_clock(&TCD0);
sysclk_disable_peripheral_clock(&TCD1);
sysclk_disable_peripheral_clock(&TCE0);
sysclk_disable_peripheral_clock(&TCE1);
sysclk_disable_peripheral_clock(&TCF0);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&TCF1);
#endif
/* Disable HIRES */
sysclk_disable_peripheral_clock(&HIRESC);
sysclk_disable_peripheral_clock(&HIRESD);
sysclk_disable_peripheral_clock(&HIRESE);
sysclk_disable_peripheral_clock(&HIRESF);
/* Disable analog modules */
sysclk_disable_peripheral_clock(&ACA);
sysclk_disable_peripheral_clock(&ADCA);
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
sysclk_disable_peripheral_clock(&DACA);
#endif
sysclk_disable_peripheral_clock(&ACB);
sysclk_disable_peripheral_clock(&ADCB);
sysclk_disable_peripheral_clock(&DACB);
/* Enable pull-up on all I/O pins */
ioport_configure_port_pin(&PORTA, 0xF4,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTA,
0x03, IOPORT_DIR_INPUT | IOPORT_INPUT_DISABLE);
ioport_configure_port_pin(&PORTB, 0x7F,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTC, 0xFF,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTD, 0x3F,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTE, 0x0F,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTF, 0xFF,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTR, 0x03,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
#if AVR8_PART_IS_DEFINED(ATxmega256A3BU)
/* Disable display for A3BU Xplained */
ioport_configure_pin(NHD_C12832A1Z_RESETN, IOPORT_DIR_INPUT);
#endif
#if AVR8_PART_IS_DEFINED(ATxmega128A1)
ioport_configure_port_pin(&PORTH, 0xFF,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTJ, 0xFF,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTK, 0xFF,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
ioport_configure_port_pin(&PORTQ, 0x0F,
IOPORT_DIR_INPUT | IOPORT_PULL_UP);
#endif
/* Disable Watchdog timer */
wdt_disable();
/* Enable EEPROM and Flash power reduction mode. */
ccp_write_io((uint8_t *)&NVM.CTRLB, NVM_EPRM_bm | NVM_FPRM_bm);
#ifdef NO_JTAG
ccp_write_io((uint8_t *)&MCU.MCUCR, MCU_JTAGD_bm);
#endif
}
