/**
* \brief Execute SRAM and CPU tests
*
* This is an example of how the Class B interrupt monitor is used.
* The tests performed in this function are not required to be run
* periodically for Class B certification.
*
* \return Nothing is returned, but the tests will alter the state
* of the global classb_error if an error is detected.
*/
static void ovenctl_periodic_classb_tests(void)
{
/* Check a section of SRAM */
cli();
classb_sram_test();
/* Check the register file */
classb_register_test();
sei();
/* Tell the interrupt monitor that we have executed */
classb_intmon_increase(PER_CLASSB_TESTS);
}
/**
* \brief Run all Class B tests
*
* Destructively test ADC and DAC; modules must be reinitialized for application
* use. Then test the SRAM, CPU registers and CRC of Flash (if enabled).
*/
void oven_classb_run_tests(void)
{
oven_ui_set_status_leds(S_ORANGE); /* Tests started */
/* Test the DAC and ADC used in this application */
dac_enable(&DACB);
adc_enable(&ADCA);
classb_analog_io_test(&DACB, &ADCA);
/* Disable interrupts globally. Normally one would disable
* this also for the analog test, but to emulate an error
* we allow interrupts during the analog test.
*/
cli();
for (uint8_t i = 0; i < CLASSB_NSECS; ++i) {
classb_sram_test();
}
/* Test the register file */
classb_register_test();
/* Test CRC Checksum */
/* Uncomment the code below and set a breakpoint on it, then press
* F10/Step over to read the calculated checksum. Insert the value in
* classb_precalculated_flash_crc at the top of this file and recompile
* to get a working CRC check.
*/
/* checksum_test_flash = CLASSB_CRC32_Flash_HW (CRC_APP, 0, 0,
* &classb_precalculated_flash_crc);
*/
sei();
/* Update status LED according to test results */
if (classb_error == CLASSB_ERROR_NONE) {
oven_ui_set_status_leds(S_GREEN);
} else {
oven_ui_set_status_leds(S_RED);
}
}