int main()
{
int i;
int prekidac;
init_platform();
XStatus Status;
//Set Terminal count for my_timer
//XIo_Out32(XPAR_MY_TIMER_0_BASEADDR + 0x0, 0x5F5E100);
// Run my_timer
XIo_Out32(XPAR_MY_TIMER_0_BASEADDR + 0x4, 0x2);
Status = XIntc_Initialize (&Intc, XPAR_INTC_0_DEVICE_ID);
if (Status != XST_SUCCESS)
xil_printf ("\r\nInterrupt controller initialization failure");
else
xil_printf("\r\nInterrupt controller initialized");
// Connect my_timer_interrupt_handler
Status = XIntc_Connect (&Intc, XPAR_INTC_0_DEVICE_ID,
(XInterruptHandler) my_timer_interrupt_handler,(void *)0);
if (Status != XST_SUCCESS)
xil_printf ("\r\nRegistering MY_TIMER Interrupt Failed");
else
xil_printf("\r\nMY_TIMER Interrupt registered");
//start the interrupt controller in real mode
Status = XIntc_Start(&Intc, XIN_REAL_MODE);
//enable interrupt controller
XIntc_Enable (&Intc, XPAR_INTC_0_DEVICE_ID);
microblaze_enable_interrupts();
unsigned char string_s[] = "LPRS 2 BRATE\n";
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x00, 0x0);// direct mode 0
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x04, 0x3);// display_mode 1
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x08, 0x1);// show frame 2
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x0C, 0x1);// font size 3
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x10, 0xFF0000);// foreground 4 crvena
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x14, 0x00FF00);// foreground 4 green
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x18, 0x0000FF);// foreground 4 plava
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x1c, 0xffff00);// foreground 4 zuta
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x20, 0x000000);// background color crna
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + 0x24, 0xFF0000);// frame color 6
xil_printf("Hello World\n\r");
clear_text_screen(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR);
clear_graphics_screen(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR);
for(i=0;i<1200;i++){
set_cursor(i);
print_char(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR, 0, '2');
}
/*
set_cursor(0);
print_char(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR, 0, '2');
set_cursor(1);
print_char(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR, 1, 'G');
set_cursor(2);
print_char(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR, 2, 'B');
set_cursor(3);
print_char(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR, 3, 'Y');
set_cursor(6);
print_string(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR, 2, string_s, 12);
set_cursor(45);
unsigned char znak = '2';
if(znak >= 0x40){
znak -= 0x40;
}
VGA_PERIPH_MEM_mWriteMemory(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR + TEXT_MEM_OFF + 4*4, znak);
for(i=64;i<76;i++){
set_cursor(i);
print_char(XPAR_VGA_PERIPH_MEM_0_S_AXI_MEM0_BASEADDR, 2, string_s[i-64]);
}*/
while (1){
prekidac = Xil_In8(XPAR_MY_PERIPHERAL_0_BASEADDR);//iscitavanje prekidaca
//xil_printf("0x%08x\r\n", prekidac);
/*
value3 = XIo_In32(XPAR_MY_TIMER_0_BASEADDR + 0x0);
value1 = XIo_In32(XPAR_MY_TIMER_0_BASEADDR + 0x4);
value2 = XIo_In32(XPAR_MY_TIMER_0_BASEADDR + 0x8);
xil_printf("\n\rvalue1 = %x, value2 = %x, value3 = %x.", value1, value2, value3);
*/
}
cleanup_platform();
return 0;
}
void clear_screen(Xuint32 BaseAddress)
{
clear_text_screen(BaseAddress);
clear_graphics_screen(BaseAddress);
}