void vpr_place_and_route(INP t_vpr_setup vpr_setup, INP t_arch arch, INP t_options options) {
/* Startup X graphics */
set_graphics_state(vpr_setup.ShowGraphics, vpr_setup.GraphPause,
vpr_setup.RouterOpts.route_type);
if (vpr_setup.ShowGraphics) {
init_graphics("VPR: Versatile Place and Route for FPGAs", WHITE);
alloc_draw_structs();
}
/* Do placement and routing */ //bug here need to debug - corrected
place_and_route(vpr_setup.Operation, vpr_setup.PlacerOpts,
&vpr_setup.FileNameOpts, vpr_setup.AnnealSched, vpr_setup.RouterOpts, vpr_setup.RoutingArch,
vpr_setup.Segments, vpr_setup.Timing, arch.Chans, arch.models,
arch.Directs, arch.num_directs, &arch);
//added QT - for main.c hunk 3 qt
if(options.Count[OT_INC_DUMP_NETS]) {
inc_dump_nets(&vpr_setup.FileNameOpts);
}
fflush(stdout);
/* Close down X Display */
if (vpr_setup.ShowGraphics)
close_graphics();
free_draw_structs();
}
/**
* main
* This function initializes all graphical variables as well as opens the input
* file and calls a function which populates a 2D array accordingly. It then
* calls run(), which takes care of the actual running of the Game of Life.
* Finally, it restores the video mode to the original state and releases
* keyboard control.
**/
int main(int argc, char *argv[]) {
//this array stores the current life state
int model[COLUMNS][ROWS] = {0};
key_init(); //takes control of keyboard input
init_graphics(); //switches to XGA
my_video_ds = __dpmi_allocate_ldt_descriptors(1);
__dpmi_set_segment_base_address(my_video_ds,ADDR);
ADDR = 0; /* basis now zero from selector */
__dpmi_set_segment_limit(my_video_ds,(width*height)|0xfff);
//the following reads in a file if one was given and populates the grid
if (argc==2) {
FILE *fp = fopen(argv[1], "r");
if (fp == 0) {
printf("Error - invalid filename\n" );
return 0;
}
else {
populate(model, fp);
}
}
run(model); //runs the program
close_graphics(); //restores video mode to original state
key_delete(); //releases control over the keyboard
return 0;
}
void CacheList::free_oldest()
{
int32_t old_time = last_access;
CacheItem *ci=list,*oldest=NULL;
ful=1;
for (int i = 0; i < total; i++, ci++)
{
if (ci->data && ci->last_access < old_time)
{
oldest = ci;
old_time = ci->last_access;
}
}
if (oldest)
{
dprintf("mem_maker : freeing %s\n",spec_types[oldest->type]);
unmalloc(oldest);
}
else
{
close_graphics();
printf("Out of memory, please remove any TSR's device drivers you can\n");
exit(0);
}
}
void PlotRna(char* seqName, char* sequence, short* structure, char* filename, float score)
{
/*A:red, U: Green, G:Blue, C:Yellow*/
int i, j;
int length;
int sizex, sizey;
fname = filename;
length = (int)strlen(sequence) ;
sizex = length;
sizey = length;
/*printf("here......length %d\n",length);*/
drawInit(length, length, seqName, filename, score);
/* print out stems */
int st, stp;
char* c = (char*)malloc(sizeof(char)*1000);
i = 0; j = 0;
while(i < length) {
while(i < length && (structure[i] == 0 || structure[i] < i)) i++;
st = i;
while(i < length && (structure[i]-1 == structure[i+1])) i++;
stp = i;
if (i >= length) break;
sprintf(c, "%d-%d; %d-%d ",st+1, stp+1, structure[stp],structure[st]);
i++; j++;
if ((j%2) == 1) drawtext (sizex*CELLSIZE/4,sizey*CELLSIZE/10.0+((int)(j/2)+1)*CELLSIZE*sizey/30,c,1.0e6);
else drawtext (sizex*CELLSIZE/2,sizey*CELLSIZE/10.0+((int)(j/2))*CELLSIZE*sizey/30,c,1.0e6);
flushinput();
}
for(i=0; i<length; i++) {
if(sequence[i] == 'A' || sequence[i] == 'a')
setcolor(RED);
else if(sequence[i] == 'U'|| sequence[i] == 'u' || sequence[i] == 'T' || sequence[i] == 't')
setcolor(GREEN);
else if(sequence[i] == 'G' || sequence[i] == 'g')
setcolor(BLUE);
else if(sequence[i] == 'C' || sequence[i] == 'c')
setcolor(YELLOW);
else
setcolor(BLACK);
fillrect((i+0.2)*CELLSIZE, (sizey/2 - 0.8)*CELLSIZE, (i+0.8)*CELLSIZE, (sizey/2 - 0.2)*CELLSIZE);
flushinput();
}
plotBP(sequence, structure);
close_postscript();
close_graphics();
}
int
main(int argc,
char **argv)
{
int simSize = 14;
int xx;
simResults = (double *) malloc(simSize*sizeof(double));
simCounts = (unsigned long *) malloc(simSize*sizeof(unsigned long));
simIndex = 0;
for(xx = 0; xx < simSize ; xx++)
{
simResults[xx] = 0.0;
simCounts[xx] = 0;
}
t_options Options;
t_arch Arch = { 0 };
enum e_operation Operation;
struct s_placer_opts PlacerOpts;
struct s_annealing_sched AnnealSched;
struct s_router_opts RouterOpts;
struct s_det_routing_arch RoutingArch;
t_segment_inf *Segments;
t_timing_inf Timing;
t_subblock_data Subblocks;
boolean ShowGraphics;
boolean TimingEnabled;
int GraphPause;
/* Print title message */
PrintTitle();
/* Print usage message if no args */
if(argc < 2)
{
PrintUsage();
exit(1);
}
/* Read in available inputs */
ReadOptions(argc, argv, &Options);
/* Determine whether timing is on or off */
TimingEnabled = IsTimingEnabled(Options);
/* Use inputs to configure VPR */
SetupVPR(Options, TimingEnabled, &Arch, &Operation, &PlacerOpts,
&AnnealSched, &RouterOpts, &RoutingArch, &Segments,
&Timing, &Subblocks, &ShowGraphics, &GraphPause);
/* Check inputs are reasonable */
CheckOptions(Options, TimingEnabled);
CheckArch(Arch, TimingEnabled);
/* Verify settings don't conflict or otherwise not make sense */
CheckSetup(Operation, PlacerOpts, AnnealSched, RouterOpts,
RoutingArch, Segments, Timing, Subblocks, Arch.Chans);
/* Output the current settings to console. */
ShowSetup(Options, Arch, TimingEnabled, Operation, PlacerOpts,
AnnealSched, RouterOpts, RoutingArch, Segments, Timing,
Subblocks);
if(Operation == TIMING_ANALYSIS_ONLY) {
do_constant_net_delay_timing_analysis(
Timing, Subblocks, Options.constant_net_delay);
return 0;
}
/* Startup X graphics */
set_graphics_state(ShowGraphics, GraphPause, RouterOpts.route_type);
if(ShowGraphics)
{
init_graphics("VPR: Versatile Place and Route for FPGAs");
alloc_draw_structs();
}
/* Do the actual operation */
place_and_route(Operation, PlacerOpts, Options.PlaceFile,
Options.NetFile, Options.ArchFile, Options.RouteFile,
AnnealSched, RouterOpts, RoutingArch,
Segments, Timing, &Subblocks, Arch.Chans);
/* Close down X Display */
if(ShowGraphics)
close_graphics();
/* free data structures */
free(Options.PlaceFile);
free(Options.NetFile);
free(Options.ArchFile);
free(Options.RouteFile);
freeArch(&Arch);
printf("\nTiming Results\n");
for(xx = 0; xx < simSize ; xx++)
{
if(simCounts[xx] != 0)
{
simResults[xx] /= (double) simCounts[xx];
}
printf("Index: %d\tAverage Clock: %f\n", xx, simResults[xx]);
}
free(simResults);
free(simCounts);
/* Return 0 to single success to scripts */
return 0;
}
static void quit(int bnum, void (*drawscreen) (void)) {
close_graphics();
exit(0);
}
void parsing(){
std::cout << "================================================================================" << std::endl;
std::cout << " ECE297: Communication and Design " << std::endl;
std::cout << " TEAM CD025 " << std::endl;
std::cout << "--------------------------------------------------------------------------------" << std::endl;
std::cout << "Welcome to team cd025's map (Revision 81). " << std::endl;
std::cout << "Type in 'help' for a list of available commands. " << std::endl;
std::cout << "================================================================================" << std::endl;
select_map();
setup();
char* buffer;
rl_completer_quote_characters = strdup("\"\'");
char* breakSet = "\t\n;";
rl_completer_word_break_characters = breakSet;
rl_bind_key('\t', rl_complete);
init_graphics("Team CD025 Mapper", CFG_background);
create_button("Window", "POI", toggle_poi);
create_button("POI", "Land", toggle_natural);
create_button("Land", "Waterways", toggle_waterways);
create_button("Waterways", "Boundaries", toggle_boundary);
create_button("Boundaries", "Water", toggle_water);
create_button("Water", "Parks", toggle_parks);
create_button("Parks", "Night Mode", Night_mode); //changes the background to black
draw_map();
std::cout << "Type in 'help' for a list of commands." << std::endl;
while((buffer = readline("mapper> ")) != NULL ){
GVAR_draw_tsp_points = false;
GVAR_depotIDs.clear();
GVAR_deliveryIDs.clear();
if(strcmp(buffer, "") != 0){
add_history(buffer);
}
if(!(strcmp(buffer, "Exit")) || !(strcmp(buffer, "quit")) ||!(strcmp(buffer, "exit"))){
close_graphics();
close_map();
break;
} else if(!(strcmp(buffer, "change"))){
close_map();
select_map();
setup();
} else if(!(strcmp(buffer, "tsp")) || !(strcmp(buffer, "ts")) ||!(strcmp(buffer, "Traveling_Salesman"))){
// Try creating buffer, initializing string and then freeing buffer to get rid of memory leaks
std::string depotPoints(readline("Enter delivery intersection IDs (Space separated):"));
char* numSep = strtok((char*)(depotPoints.c_str()), " ");
while (numSep != NULL){
std::stringstream strValue;
strValue << numSep;
unsigned intersection;
strValue >> intersection;
GVAR_depotIDs.push_back(intersection);
numSep = strtok (NULL, " ");
}
std::string deliveryPoints(readline("Enter depot intersection IDs (Space separated):"));
numSep = strtok((char*)(deliveryPoints.c_str()), " ");
while (numSep != NULL){
std::stringstream strValue;
strValue << numSep;
unsigned intersection;
strValue >> intersection;
GVAR_deliveryIDs.push_back(intersection);
numSep = strtok (NULL, " ");
}
std::cout << "Calculating optimal path..." << std::endl;
GVAR_path = traveling_salesman(GVAR_depotIDs, GVAR_deliveryIDs);
if(GVAR_path.empty()){
std::cout << "No valid path exists" << std::endl;
} else {
GVAR_mypath = Path(0,0, GVAR_path);
GVAR_mypath.setistour(true);
std::cout << "Path found and drawn!" << std::endl;
GVAR_draw_tsp_points = true;
}
draw_map();
} else if(!(strcmp(buffer, "draw"))){
int main (int argc, char *argv[]) {
#ifndef SPEC
char title[] = "\n\nVPR FPGA Placement and Routing Program Version 4.22 "
"by V. Betz.\n"
"Source completed Jan. 25, 1999; compiled " __DATE__ ".\n"
"This code is licensed only for non-commercial use.\n\n";
#else
char title[] = "\n\nVPR FPGA Placement and Routing Program Version 4.00-spec"
"\nSource completed Sept. 19, 1997.\n\n";
#endif
char net_file[BUFSIZE], place_file[BUFSIZE], arch_file[BUFSIZE];
char route_file[BUFSIZE];
float aspect_ratio;
boolean full_stats, user_sized;
char pad_loc_file[BUFSIZE];
enum e_operation operation;
boolean verify_binary_search;
boolean show_graphics;
int gr_automode;
struct s_annealing_sched annealing_sched;
struct s_placer_opts placer_opts;
struct s_router_opts router_opts;
struct s_det_routing_arch det_routing_arch;
t_segment_inf *segment_inf;
t_timing_inf timing_inf;
t_subblock_data subblock_data;
t_chan_width_dist chan_width_dist;
float constant_net_delay;
printf("%s",title);
placer_opts.pad_loc_file = pad_loc_file;
/* Parse the command line. */
parse_command (argc, argv, net_file, arch_file, place_file, route_file,
&operation, &aspect_ratio, &full_stats, &user_sized, &verify_binary_search,
&gr_automode, &show_graphics, &annealing_sched, &placer_opts, &router_opts,
&timing_inf.timing_analysis_enabled, &constant_net_delay);
/* Parse input circuit and architecture */
get_input (net_file, arch_file, placer_opts.place_cost_type,
placer_opts.num_regions, aspect_ratio, user_sized,
router_opts.route_type, &det_routing_arch, &segment_inf,
&timing_inf, &subblock_data, &chan_width_dist);
if (full_stats == TRUE)
print_lambda ();
#ifdef DEBUG
print_netlist ("net.echo", net_file, subblock_data);
print_arch (arch_file, router_opts.route_type, det_routing_arch,
segment_inf, timing_inf, subblock_data, chan_width_dist);
#endif
if (operation == TIMING_ANALYSIS_ONLY) { /* Just run the timing analyzer. */
do_constant_net_delay_timing_analysis (timing_inf, subblock_data,
constant_net_delay);
free_subblock_data (&subblock_data);
exit (0);
}
set_graphics_state (show_graphics, gr_automode, router_opts.route_type);
if (show_graphics) {
/* Get graphics going */
init_graphics("VPR: Versatile Place and Route for FPGAs");
alloc_draw_structs ();
}
fflush (stdout);
place_and_route (operation, placer_opts, place_file, net_file, arch_file,
route_file, full_stats, verify_binary_search, annealing_sched, router_opts,
det_routing_arch, segment_inf, timing_inf, &subblock_data,
chan_width_dist);
if (show_graphics)
close_graphics(); /* Close down X Display */
exit (0);
}
