int ext_disp_deinit(char *lcm_name) { EXT_DISP_FUNC(); _ext_disp_path_lock(); if(pgc->state == EXTD_DEINIT) { goto deinit_exit; } dpmgr_path_deinit(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_destroy_path(pgc->dpmgr_handle, NULL); cmdqRecDestroy(pgc->cmdq_handle_config); cmdqRecDestroy(pgc->cmdq_handle_trigger); pgc->state = EXTD_DEINIT; deinit_exit: _ext_disp_path_unlock(); is_context_inited = 0; EXT_DISP_LOG("ext_disp_deinit done \n" ); return 0; }
int ext_disp_deinit(char *lcm_name) { DISPFUNC(); _ext_disp_path_lock(); if(pgc->state == EXTD_DEINIT) goto deinit_exit; dpmgr_path_deinit(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_destroy_path(pgc->dpmgr_handle,NULL); cmdqRecDestroy(pgc->cmdq_handle_config); cmdqRecDestroy(pgc->cmdq_handle_trigger); pgc->state = EXTD_DEINIT; deinit_exit: _ext_disp_path_unlock(); is_context_inited = 0; hdmi_smb_kpd_disable(); DISPMSG("ext_disp_deinit done \n" ); }
int ovl2mem_deinit(void) { int ret = -1; DISPFUNC(); _ovl2mem_path_lock(__func__); if (pgc->state == 0) goto Exit; ovl2mem_wait_done(); dpmgr_path_stop(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_path_reset(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_path_deinit(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_destroy_path(pgc->dpmgr_handle, NULL); cmdqRecDestroy(pgc->cmdq_handle_config); pgc->dpmgr_handle = NULL; pgc->cmdq_handle_config = NULL; pgc->state = 0; pgc->need_trigger_path = 0; atomic_set(&g_trigger_ticket, 1); atomic_set(&g_release_ticket, 1); ovl2mem_layer_num = 0; Exit: _ovl2mem_path_unlock(__func__); DISPMSG("ovl2mem_deinit done\n"); return ret; }
static int setup_rdma_sec(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void *handle) { static int rdma_is_sec[2]; CMDQ_ENG_ENUM cmdq_engine; int rdma_idx = rdma_index(module); DISP_BUFFER_TYPE security = pConfig->rdma_config.security; enum RDMA_MODE mode = rdma_config_mode(pConfig->rdma_config.address); cmdq_engine = rdma_idx==0 ? CMDQ_ENG_DISP_RDMA0 : CMDQ_ENG_DISP_RDMA1; if(!handle) { DDPMSG("[SVP] bypass rdma sec setting sec=%d,handle=NULL\n", security); return 0; } /* sec setting make sence only in memory mode ! */ if(mode == RDMA_MODE_MEMORY) { if(security == DISP_SECURE_BUFFER) { cmdqRecSetSecure(handle, 1); /* set engine as sec */ cmdqRecSecureEnablePortSecurity(handle, (1LL << cmdq_engine)); //cmdqRecSecureEnableDAPC(handle, (1LL << cmdq_engine)); if(rdma_is_sec[rdma_idx] == 0) DDPMSG("[SVP] switch rdma%d to sec\n", rdma_idx); rdma_is_sec[rdma_idx] = 1; } else { if(rdma_is_sec[rdma_idx]) { /* rdma is in sec stat, we need to switch it to nonsec */ cmdqRecHandle nonsec_switch_handle; int ret; ret = cmdqRecCreate(CMDQ_SCENARIO_DISP_PRIMARY_DISABLE_SECURE_PATH, &(nonsec_switch_handle)); if(ret) DDPAEE("[SVP]fail to create disable handle %s ret=%d\n", __FUNCTION__, ret); cmdqRecReset(nonsec_switch_handle); _cmdq_insert_wait_frame_done_token_mira(nonsec_switch_handle); cmdqRecSetSecure(nonsec_switch_handle, 1); /*ugly work around by kzhang !!. will remove when cmdq delete disable scenario. * To avoid translation fault like ovl (see notes in ovl.c)*/ do_rdma_config_l(module, pConfig, nonsec_switch_handle); /*in fact, dapc/port_sec will be disabled by cmdq*/ cmdqRecSecureEnablePortSecurity(nonsec_switch_handle, (1LL << cmdq_engine)); //cmdqRecSecureEnableDAPC(nonsec_switch_handle, (1LL << cmdq_engine)); cmdqRecFlush(nonsec_switch_handle); cmdqRecDestroy(nonsec_switch_handle); DDPMSG("[SVP] switch rdma%d to nonsec done\n", rdma_idx); } rdma_is_sec[rdma_idx] = 0; } } return 0; }
int ovl2mem_deinit(void) { int ret = -1; int loop_cnt = 0; DISPFUNC(); _ovl2mem_path_lock(__func__); if (pgc->state == 0) goto Exit; /* ovl2mem_wait_done(); */ ovl2mem_layer_num = 0; while (((atomic_read(&g_trigger_ticket) - atomic_read(&g_release_ticket)) != 1) && (loop_cnt < 10)) { msleep(5); /* wait the last configuration done */ loop_cnt++; } dpmgr_path_stop(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_path_reset(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_path_deinit(pgc->dpmgr_handle, CMDQ_DISABLE); dpmgr_destroy_path(pgc->dpmgr_handle, NULL); cmdqRecDestroy(pgc->cmdq_handle_config); pgc->dpmgr_handle = NULL; pgc->cmdq_handle_config = NULL; pgc->state = 0; pgc->need_trigger_path = 0; atomic_set(&g_trigger_ticket, 1); atomic_set(&g_release_ticket, 1); Exit: _ovl2mem_path_unlock(__func__); DISPMSG("ovl2mem_deinit done\n"); return ret; }
static void disp_debug_api(unsigned int enable, char *buf) { if (enable == 1) { DDPMSG("[DDP] debug=1, trigger AEE\n"); /* aee_kernel_exception("DDP-TEST-ASSERT", "[DDP] DDP-TEST-ASSERT"); */ } else if (enable == 2) { ddp_mem_test(); } else if (enable == 3) { ddp_lcd_test(); } else if (enable == 4) { DDPAEE("test enable=%d\n", enable); sprintf(buf, "test enable=%d\n", enable); } else if (enable == 5) { if (gDDPError == 0) gDDPError = 1; else gDDPError = 0; sprintf(buf, "bypass PQ: %d\n", gDDPError); DDPMSG("bypass PQ: %d\n", gDDPError); } else if (enable == 6) { /*ddp_dump_analysis(DISP_MODULE_DSI0);*/ ddp_dump_reg(DISP_MODULE_DSI0); } else if (enable == 7) { if (dbg_log_level < 3) dbg_log_level++; else dbg_log_level = 0; pr_debug("DDP: dbg_log_level=%d\n", dbg_log_level); sprintf(buf, "dbg_log_level: %d\n", dbg_log_level); } else if (enable == 8) { DDPDUMP("clock_mm setting:%u\n", DISP_REG_GET(DISP_REG_CONFIG_C11)); if (DISP_REG_GET(DISP_REG_CONFIG_C11) & 0xff000000 != 0xff000000) { DDPDUMP ("error, MM clock bit 24~bit31 should be 1, but real value=0x%x", DISP_REG_GET(DISP_REG_CONFIG_C11)); } } else if (enable == 9) { gOVLBackground = 0xFF0000FF; pr_debug("DDP: gOVLBackground=%d\n", gOVLBackground); sprintf(buf, "gOVLBackground: %d\n", gOVLBackground); } else if (enable == 10) { gOVLBackground = 0xFF000000; pr_debug("DDP: gOVLBackground=%d\n", gOVLBackground); sprintf(buf, "gOVLBackground: %d\n", gOVLBackground); } else if (enable == 11) { dispsys_irq[DISP_REG_NUM]; ddp_irq_num[DISP_REG_NUM]; unsigned int i = 0; char *buf_temp = buf; for (i = 0; i < DISP_REG_NUM; i++) { DDPDUMP ("i=%d, module=%s, va=0x%lx, pa=0x%x, irq(%d,%d)\n", i, ddp_get_reg_module_name(i), dispsys_reg[i], ddp_reg_pa_base[i], dispsys_irq[i], ddp_irq_num[i]); sprintf(buf_temp, "i=%d, module=%s, va=0x%lx, pa=0x%x, irq(%d,%d)\n", i, ddp_get_reg_module_name(i), dispsys_reg[i], ddp_reg_pa_base[i], dispsys_irq[i], ddp_irq_num[i]); buf_temp += strlen(buf_temp); } } else if (enable == 12) { if (gUltraEnable == 0) gUltraEnable = 1; else gUltraEnable = 0; pr_debug("DDP : gUltraEnable = %d\n", gUltraEnable); sprintf(buf, "gUltraEnable: %d\n", gUltraEnable); } else if (enable == 13) { /*int ovl_status = ovl_get_status(); config.type = DISP_SESSION_MEMORY; config.device_id = 0; disp_create_session(&config); pr_debug("old status=%d, ovl1 status=%d\n", ovl_status, ovl_get_status()); sprintf(buf, "old status=%d, ovl1 status=%d\n", ovl_status, ovl_get_status()); */ } else if (enable == 14) { /*int ovl_status = ovl_get_status(); disp_destroy_session(&config); pr_debug("old status=%d, ovl1 status=%d\n", ovl_status, ovl_get_status()); sprintf(buf, "old status=%d, ovl1 status=%d\n", ovl_status, ovl_get_status()); */ } else if (enable == 15) { /* extern smi_dumpDebugMsg(void); */ ddp_dump_analysis(DISP_MODULE_CONFIG); ddp_dump_analysis(DISP_MODULE_RDMA0); ddp_dump_analysis(DISP_MODULE_OVL0); ddp_dump_analysis(DISP_MODULE_OVL1); /* dump ultra/preultra related regs */ DDPMSG("wdma_con1(2c) = 0x%x, wdma_con2(0x38) = 0x%x, rdma_gmc0(30) = 0x%x", DISP_REG_GET(DISP_REG_WDMA_BUF_CON1), DISP_REG_GET(DISP_REG_WDMA_BUF_CON2), DISP_REG_GET(DISP_REG_RDMA_MEM_GMC_SETTING_0)); DDPMSG(" rdma_gmc1(38) = 0x%x, fifo_con(40) = 0x%x\n ", DISP_REG_GET(DISP_REG_RDMA_MEM_GMC_SETTING_1), DISP_REG_GET(DISP_REG_RDMA_FIFO_CON)); DDPMSG(" ovl0_gmc : 0x%x, 0x%x, 0x%x, 0x%x, ovl1_gmc : 0x%x, 0x%x, 0x%x, 0x%x\n ", DISP_REG_GET(DISP_REG_OVL_RDMA0_MEM_GMC_SETTING), DISP_REG_GET(DISP_REG_OVL_RDMA1_MEM_GMC_SETTING), DISP_REG_GET(DISP_REG_OVL_RDMA2_MEM_GMC_SETTING), DISP_REG_GET(DISP_REG_OVL_RDMA3_MEM_GMC_SETTING), DISP_REG_GET(DISP_REG_OVL_RDMA0_MEM_GMC_SETTING + DISP_OVL_INDEX_OFFSET), DISP_REG_GET(DISP_REG_OVL_RDMA1_MEM_GMC_SETTING + DISP_OVL_INDEX_OFFSET), DISP_REG_GET(DISP_REG_OVL_RDMA2_MEM_GMC_SETTING + DISP_OVL_INDEX_OFFSET), DISP_REG_GET(DISP_REG_OVL_RDMA3_MEM_GMC_SETTING + DISP_OVL_INDEX_OFFSET)); /* dump smi regs */ /* smi_dumpDebugMsg(); */ } else if (enable == 16) { if (gDumpMemoutCmdq == 0) gDumpMemoutCmdq = 1; else gDumpMemoutCmdq = 0; pr_debug(" DDP : gDumpMemoutCmdq = %d\n ", gDumpMemoutCmdq); sprintf(buf, " gDumpMemoutCmdq : %d\n ", gDumpMemoutCmdq); } else if (enable == 21) { if (gEnableSODIControl == 0) gEnableSODIControl = 1; else gEnableSODIControl = 0; pr_debug(" DDP : gEnableSODIControl = %d\n ", gEnableSODIControl); sprintf(buf, " gEnableSODIControl : %d\n ", gEnableSODIControl); } else if (enable == 22) { if (gPrefetchControl == 0) gPrefetchControl = 1; else gPrefetchControl = 0; pr_debug(" DDP : gPrefetchControl = %d\n ", gPrefetchControl); sprintf(buf, " gPrefetchControl : %d\n ", gPrefetchControl); } else if (enable == 23) { if (disp_low_power_enlarge_blanking == 0) disp_low_power_enlarge_blanking = 1; else disp_low_power_enlarge_blanking = 0; pr_debug(" DDP : disp_low_power_enlarge_blanking = %d\n ", disp_low_power_enlarge_blanking); sprintf(buf, " disp_low_power_enlarge_blanking : %d\n ", disp_low_power_enlarge_blanking); } else if (enable == 24) { if (disp_low_power_disable_ddp_clock == 0) disp_low_power_disable_ddp_clock = 1; else disp_low_power_disable_ddp_clock = 0; pr_debug(" DDP : disp_low_power_disable_ddp_clock = %d\n ", disp_low_power_disable_ddp_clock); sprintf(buf, " disp_low_power_disable_ddp_clock : %d\n ", disp_low_power_disable_ddp_clock); } else if (enable == 25) { if (disp_low_power_disable_fence_thread == 0) disp_low_power_disable_fence_thread = 1; else disp_low_power_disable_fence_thread = 0; pr_debug(" DDP : disp_low_power_disable_fence_thread = %d\n ", disp_low_power_disable_fence_thread); sprintf(buf, " disp_low_power_disable_fence_thread : %d\n ", disp_low_power_disable_fence_thread); } else if (enable == 26) { if (disp_low_power_remove_ovl == 0) disp_low_power_remove_ovl = 1; else disp_low_power_remove_ovl = 0; pr_debug(" DDP : disp_low_power_remove_ovl = %d\n ", disp_low_power_remove_ovl); sprintf(buf, " disp_low_power_remove_ovl : %d\n ", disp_low_power_remove_ovl); } else if (enable == 27) { if (gSkipIdleDetect == 0) gSkipIdleDetect = 1; else gSkipIdleDetect = 0; pr_debug(" DDP : gSkipIdleDetect = %d\n ", gSkipIdleDetect); sprintf(buf, " gSkipIdleDetect : %d\n ", gSkipIdleDetect); } else if (enable == 28) { if (gDumpClockStatus == 0) gDumpClockStatus = 1; else gDumpClockStatus = 0; pr_debug(" DDP : gDumpClockStatus = %d\n ", gDumpClockStatus); sprintf(buf, " gDumpClockStatus : %d\n ", gDumpClockStatus); } else if (enable == 29) { if (gEnableUartLog == 0) gEnableUartLog = 1; else gEnableUartLog = 0; pr_debug(" DDP : gEnableUartLog = %d\n ", gEnableUartLog); sprintf(buf, " gEnableUartLog : %d\n ", gEnableUartLog); } else if (enable == 30) { if (gEnableMutexRisingEdge == 0) { gEnableMutexRisingEdge = 1; DISP_REG_SET_FIELD(0, SOF_FLD_MUTEX0_SOF_TIMING, DISP_REG_CONFIG_MUTEX0_SOF, 1); } else { gEnableMutexRisingEdge = 0; DISP_REG_SET_FIELD(0, SOF_FLD_MUTEX0_SOF_TIMING, DISP_REG_CONFIG_MUTEX0_SOF, 0); } pr_debug(" DDP : gEnableMutexRisingEdge = %d\n ", gEnableMutexRisingEdge); sprintf(buf, " gEnableMutexRisingEdge : %d\n ", gEnableMutexRisingEdge); } else if (enable == 31) { if (gEnableReduceRegWrite == 0) gEnableReduceRegWrite = 1; else gEnableReduceRegWrite = 0; pr_debug(" DDP : gEnableReduceRegWrite = %d\n ", gEnableReduceRegWrite); sprintf(buf, " gEnableReduceRegWrite : %d\n ", gEnableReduceRegWrite); } else if (enable == 32) { /* DDPAEE(" DDP : (32) gEnableReduceRegWrite = %d\n ", gEnableReduceRegWrite); */ } else if (enable == 33) { if (gDumpConfigCMD == 0) gDumpConfigCMD = 1; else gDumpConfigCMD = 0; pr_debug(" DDP : gDumpConfigCMD = %d\n ", gDumpConfigCMD); sprintf(buf, " gDumpConfigCMD : %d\n ", gDumpConfigCMD); } else if (enable == 34) { if (gESDEnableSODI == 0) gESDEnableSODI = 1; else gESDEnableSODI = 0; pr_debug(" DDP : gESDEnableSODI = %d\n ", gESDEnableSODI); sprintf(buf, " gESDEnableSODI : %d\n ", gESDEnableSODI); } else if (enable == 35) { if (gEnableOVLStatusCheck == 0) gEnableOVLStatusCheck = 1; else gEnableOVLStatusCheck = 0; pr_debug(" DDP : gEnableOVLStatusCheck = %d\n ", gEnableOVLStatusCheck); sprintf(buf, " gEnableOVLStatusCheck : %d\n ", gEnableOVLStatusCheck); } else if (enable == 36) { if (gResetRDMAEnable == 0) gResetRDMAEnable = 1; else gResetRDMAEnable = 0; pr_debug(" DDP : gResetRDMAEnable = %d\n ", gResetRDMAEnable); sprintf(buf, " gResetRDMAEnable : %d\n ", gResetRDMAEnable); } else if (enable == 37) { unsigned int reg_value = 0; if (gEnableIRQ == 0) { gEnableIRQ = 1; /* OVL0/OVL1 */ DISP_CPU_REG_SET(DISP_REG_OVL_INTEN, 0x1e2); DISP_CPU_REG_SET(DISP_REG_OVL_INTEN + DISP_OVL_INDEX_OFFSET, 0x1e2); /* Mutex0 */ reg_value = DISP_REG_GET(DISP_REG_CONFIG_MUTEX_INTEN); DISP_CPU_REG_SET(DISP_REG_CONFIG_MUTEX_INTEN, reg_value | (1 << 0) | (1 << DISP_MUTEX_TOTAL)); /* RDMA0 */ DISP_CPU_REG_SET(DISP_REG_RDMA_INT_ENABLE, 0x3E); } else { gEnableIRQ = 0; /* OVL0/OVL1 */ DISP_CPU_REG_SET(DISP_REG_OVL_INTEN, 0x1e0); DISP_CPU_REG_SET(DISP_REG_OVL_INTEN + DISP_OVL_INDEX_OFFSET, 0x1e0); /* Mutex0 */ reg_value = DISP_REG_GET(DISP_REG_CONFIG_MUTEX_INTEN); DISP_CPU_REG_SET(DISP_REG_CONFIG_MUTEX_INTEN, reg_value & (~(1 << 0)) & (~(1 << DISP_MUTEX_TOTAL))); /* RDMA0 */ DISP_CPU_REG_SET(DISP_REG_RDMA_INT_ENABLE, 0x18); } pr_debug(" DDP : gEnableIRQ = %d\n ", gEnableIRQ); sprintf(buf, " gEnableIRQ : %d\n ", gEnableIRQ); } else if (enable == 38) { if (gDisableSODIForTriggerLoop == 0) gDisableSODIForTriggerLoop = 1; else gDisableSODIForTriggerLoop = 0; pr_debug(" DDP : gDisableSODIForTriggerLoop = %d\n ", gDisableSODIForTriggerLoop); sprintf(buf, " gDisableSODIForTriggerLoop : %d\n ", gDisableSODIForTriggerLoop); } else if (enable == 39) { cmdqCoreSetEvent(CMDQ_SYNC_TOKEN_STREAM_EOF); cmdqCoreSetEvent(CMDQ_EVENT_DISP_RDMA0_EOF); sprintf(buf, " enable = %d\n ", enable); } else if (enable == 41) { if (gResetOVLInAALTrigger == 0) gResetOVLInAALTrigger = 1; else gResetOVLInAALTrigger = 0; pr_debug(" DDP : gResetOVLInAALTrigger = %d\n ", gResetOVLInAALTrigger); sprintf(buf, " gResetOVLInAALTrigger : %d\n ", gResetOVLInAALTrigger); } else if (enable == 42) { if (gDisableOVLTF == 0) gDisableOVLTF = 1; else gDisableOVLTF = 0; pr_debug(" DDP : gDisableOVLTF = %d\n ", gDisableOVLTF); sprintf(buf, " gDisableOVLTF : %d\n ", gDisableOVLTF); } else if (enable == 43) { if (gDumpESDCMD == 0) gDumpESDCMD = 1; else gDumpESDCMD = 0; pr_debug(" DDP : gDumpESDCMD = %d\n ", gDumpESDCMD); sprintf(buf, " gDumpESDCMD : %d\n ", gDumpESDCMD); } else if (enable == 44) { disp_dump_emi_status(); disp_dump_emi_status(); sprintf(buf, " dump emi status !\n "); } else if (enable == 45) { if (gEnableCMDQProfile == 0) gEnableCMDQProfile = 1; else gEnableCMDQProfile = 0; pr_debug(" DDP : gEnableCMDQProfile = %d\n ", gEnableCMDQProfile); sprintf(buf, " gEnableCMDQProfile : %d\n ", gEnableCMDQProfile); } else if (enable == 46) { disp_set_pll(156); pr_debug(" DDP : disp_set_pll = 156.\n "); sprintf(buf, " disp_set_pll = 156.\n "); } else if (enable == 47) { disp_set_pll(182); pr_debug(" DDP : disp_set_pll = 182.\n "); sprintf(buf, " disp_set_pll = 182.\n "); } else if (enable == 48) { disp_set_pll(364); pr_debug(" DDP : disp_set_pll = 364\n "); sprintf(buf, " disp_set_pll = 364.\n "); } else if (enable == 49) { if (gChangeRDMAThreshold == 0) gChangeRDMAThreshold = 1; else gChangeRDMAThreshold = 0; pr_debug(" DDP : gChangeRDMAThreshold = %d\n ", gChangeRDMAThreshold); sprintf(buf, " gChangeRDMAThreshold : %d\n ", gChangeRDMAThreshold); } else if (enable == 50) { if (gChangeMMClock == 0) gChangeMMClock = 1; else gChangeMMClock = 0; pr_debug(" DDP : gChangeMMClock = %d\n ", gChangeMMClock); sprintf(buf, " gChangeMMClock : %d\n ", gChangeMMClock); } else if (enable == 51) { if (gEnableUnderflowAEE == 0) gEnableUnderflowAEE = 1; else gEnableUnderflowAEE = 0; pr_debug(" DDP : gEnableUnderflowAEE = %d\n ", gEnableUnderflowAEE); sprintf(buf, " gEnableUnderflowAEE : %d\n ", gEnableUnderflowAEE); } else if (enable == 52) { unsigned int time; cmdqRecHandle handle = NULL; cmdqRecCreate(CMDQ_SCENARIO_PRIMARY_DISP, &handle); time = disp_set_pll_by_cmdq(156, handle); pr_debug(" DDP : disp_set_pll_by_cmdq = 156. estimate execute time = %d\n ", time); sprintf(buf, " disp_set_pll_by_cmdq = 156. estimate execute time = %d\n ", time); cmdqRecDestroy(handle); } else if (enable == 53) { unsigned int time; cmdqRecHandle handle = NULL; cmdqRecCreate(CMDQ_SCENARIO_PRIMARY_DISP, &handle); time = disp_set_pll_by_cmdq(182, handle); pr_debug(" DDP : disp_set_pll_by_cmdq = 182. estimate execute time = %d\n ", time); sprintf(buf, " disp_set_pll_by_cmdq = 182. estimate execute time = %d\n ", time); cmdqRecDestroy(handle); } else if (enable == 54) { unsigned int time; cmdqRecHandle handle = NULL; cmdqRecCreate(CMDQ_SCENARIO_PRIMARY_DISP, &handle); time = disp_set_pll_by_cmdq(364, handle); pr_debug(" DDP : disp_set_pll_by_cmdq = 364. estimate execute time = %d\n ", time); sprintf(buf, " disp_set_pll_by_cmdq = 364. estimate execute time = %d\n ", time); cmdqRecDestroy(handle); } else if (enable == 55) { if (gIssueRequestThreshold == 0) gIssueRequestThreshold = 1; else gIssueRequestThreshold = 0; pr_debug(" DDP : gIssueRequestThreshold = %d\n ", gIssueRequestThreshold); sprintf(buf, " gIssueRequestThreshold : %d\n ", gIssueRequestThreshold); } else if (enable == 56) { if (gDisableIRQWhenIdle == 0) gDisableIRQWhenIdle = 1; else gDisableIRQWhenIdle = 0; pr_debug(" DDP : gDisableIRQWhenIdle = %d\n ", gDisableIRQWhenIdle); sprintf(buf, " gDisableIRQWhenIdle : %d\n ", gDisableIRQWhenIdle); } else if (enable == 57) { if (gEnableSODIWhenIdle == 0) gEnableSODIWhenIdle = 1; else gEnableSODIWhenIdle = 0; pr_debug(" DDP : gEnableSODIWhenIdle = %d\n ", gEnableSODIWhenIdle); sprintf(buf, " gEnableSODIWhenIdle : %d\n ", gEnableSODIWhenIdle); } else if (enable == 58) { #ifdef DISP_ENABLE_LAYER_FRAME if (gAddFrame == 0) gAddFrame = 1; else gAddFrame = 0; pr_debug(" DDP : gAddFrame = %d\n ", gAddFrame); sprintf(buf, " gAddFrame : %d\n ", gAddFrame); #else pr_debug(" Please enable DISP_ENABLE_LAYER_FRAME in ddp_debug.h first !\n "); sprintf(buf, " Please enable DISP_ENABLE_LAYER_FRAME in ddp_debug.h first !\n "); #endif } else if (enable == 40) { sprintf(buf, " version : %d, %s\n ", 12, __TIME__); } else if (enable==59) { extern void ddp_reset_test(void); ddp_reset_test(); sprintf(buf, " dp_reset_test called. \n "); } else if (enable == 60) { unsigned int i = 0; int *modules = ddp_get_scenario_list(DDP_SCENARIO_PRIMARY_DISP); int module_num = ddp_get_module_num(DDP_SCENARIO_PRIMARY_DISP); pr_debug("dump path status:"); for (i = 0; i < module_num; i++) pr_debug("%s-", ddp_get_module_name(modules[i])); pr_debug("\n"); ddp_dump_analysis(DISP_MODULE_CONFIG); ddp_dump_analysis(DISP_MODULE_MUTEX); for (i = 0; i < module_num; i++) ddp_dump_analysis(modules[i]); if (primary_display_is_decouple_mode()) { ddp_dump_analysis(DISP_MODULE_OVL0); ddp_dump_analysis(DISP_MODULE_OVL1); ddp_dump_analysis(DISP_MODULE_WDMA0); } ddp_dump_reg(DISP_MODULE_CONFIG); ddp_dump_reg(DISP_MODULE_MUTEX); if (primary_display_is_decouple_mode()) { ddp_dump_reg(DISP_MODULE_OVL0); ddp_dump_reg(DISP_MODULE_OVL1); ddp_dump_reg(DISP_MODULE_WDMA0); } for (i = 0; i < module_num; i++) ddp_dump_reg(modules[i]); } }
static int jpeg_dec_ioctl(unsigned int cmd, unsigned long arg, struct file *file) { unsigned int* pStatus; unsigned int decResult; long timeout_jiff; JPEG_DEC_DRV_IN dec_params; JPEG_DEC_CONFIG_ROW dec_row_params ; JPEG_DEC_CONFIG_CMDQ cfg_cmdq_params ; unsigned int irq_st = 0; unsigned int i = 0; //unsigned int timeout = 0x1FFFFF; JPEG_DEC_DRV_OUT outParams; pStatus = (unsigned int*)file->private_data; if (NULL == pStatus) { JPEG_MSG("[JPEGDRV]JPEG Decoder: Private data is null in flush operation. SOME THING WRONG??\n"); return -EFAULT; } switch(cmd) { // initial and reset JPEG encoder case JPEG_DEC_IOCTL_INIT: /* OT:OK */ JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Init!!\n"); if(jpeg_drv_dec_init() == 0) { *pStatus = JPEG_DEC_PROCESS; } break; case JPEG_DEC_IOCTL_RESET: /* OT:OK */ JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Reset!!\n"); jpeg_drv_dec_reset(); break; case JPEG_DEC_IOCTL_CONFIG: JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Configration!!\n"); if(*pStatus != JPEG_DEC_PROCESS) { JPEG_MSG("[JPEGDRV]Permission Denied! This process can not access decoder\n"); return -EFAULT; } if(dec_status == 0) { JPEG_MSG("[JPEGDRV]JPEG Decoder is unlocked!!"); *pStatus = 0; return -EFAULT; } if(copy_from_user(&dec_params, (void *)arg, sizeof(JPEG_DEC_DRV_IN))) { JPEG_MSG("[JPEGDRV]JPEG Decoder : Copy from user error\n"); return -EFAULT; } //_jpeg_dec_dump_reg_en = dec_params.regDecDumpEn; if(dec_params.decodeMode == JPEG_DEC_MODE_MCU_ROW) _jpeg_dec_mode = 1; else _jpeg_dec_mode = 0; if (jpeg_drv_dec_set_config_data(&dec_params) < 0) return -EFAULT; break; case JPEG_DEC_IOCTL_FLUSH_CMDQ : JPEG_MSG("[JPEGDRV]enter JPEG BUILD CMDQ !!\n"); if(*pStatus != JPEG_DEC_PROCESS) { JPEG_MSG("[JPEGDRV]Permission Denied! This process can not access decoder\n"); return -EFAULT; } if(dec_status == 0) { JPEG_MSG("[JPEGDRV]JPEG Decoder is unlocked!!"); *pStatus = 0; return -EFAULT; } if(copy_from_user(&cfg_cmdq_params, (void *)arg, sizeof(JPEG_DEC_CONFIG_CMDQ))) { JPEG_MSG("[JPEGDRV]JPEG Decoder : Copy from user error\n"); return -EFAULT; } JPEG_MSG("[JPEGDRV]JPEG CREATE CMDQ !!\n"); cmdqRecCreate(CMDQ_SCENARIO_JPEG_DEC, &jpegCMDQ_handle) ; cmdqRecWait(jpegCMDQ_handle, CMDQ_EVENT_JPEG_DEC_EOF) ; for( i = 0 ; i < cfg_cmdq_params.goNum ; i++ ){ JPEG_MSG("[JPEGDRV]JPEG gen CMDQ %x %x %x %x !!\n", cfg_cmdq_params.pauseMCUidx[i], cfg_cmdq_params.decRowBuf0[i], cfg_cmdq_params.decRowBuf1[i], cfg_cmdq_params.decRowBuf2[i]); cmdqRecWrite(jpegCMDQ_handle, 0x18004170 /*REG_ADDR_JPGDEC_PAUSE_MCU_NUM*/, cfg_cmdq_params.pauseMCUidx[i]-1 , 0xFFFFFFFF) ; cmdqRecWrite(jpegCMDQ_handle, 0x18004140 /*REG_ADDR_JPGDEC_DEST_ADDR0_Y */, cfg_cmdq_params.decRowBuf0[i] , 0xFFFFFFFF) ; cmdqRecWrite(jpegCMDQ_handle, 0x18004144 /*REG_ADDR_JPGDEC_DEST_ADDR0_U */, cfg_cmdq_params.decRowBuf1[i] , 0xFFFFFFFF) ; cmdqRecWrite(jpegCMDQ_handle, 0x18004148 /*REG_ADDR_JPGDEC_DEST_ADDR0_V */, cfg_cmdq_params.decRowBuf2[i] , 0xFFFFFFFF) ; JPEG_MSG("[JPEGDRV]JPEG gen CMDQ go!!\n"); //trigger cmdqRecWrite(jpegCMDQ_handle, 0x18004274 /*REG_ADDR_JPGDEC_INTERRUPT_STATUS*/ , BIT_INQST_MASK_PAUSE , 0xFFFFFFFF) ; JPEG_MSG("[JPEGDRV]JPEG gen CMDQ wait!!\n"); //wait frame done cmdqRecWait(jpegCMDQ_handle, CMDQ_EVENT_JPEG_DEC_EOF) ; //cmdqRecPoll(jpegCMDQ_handle, 0x18004274 /*REG_ADDR_JPGDEC_INTERRUPT_STATUS*/ , BIT_INQST_MASK_PAUSE , 0x0010) ; } JPEG_MSG("[JPEGDRV]JPEG flush CMDQ start!!\n"); cmdqRecFlush(jpegCMDQ_handle) ; JPEG_MSG("[JPEGDRV]JPEG flush CMDQ end!!\n"); cmdqRecDestroy(jpegCMDQ_handle) ; JPEG_MSG("[JPEGDRV]JPEG destroy CMDQ end!!\n"); break; case JPEG_DEC_IOCTL_RESUME: if(*pStatus != JPEG_DEC_PROCESS) { JPEG_MSG("[JPEGDRV]Permission Denied! This process can not access decoder\n"); return -EFAULT; } if(dec_status == 0) { JPEG_MSG("[JPEGDRV]JPEG Decoder is unlocked!!"); *pStatus = 0; return -EFAULT; } if(copy_from_user(&dec_row_params, (void *)arg, sizeof(JPEG_DEC_CONFIG_ROW))) { JPEG_MSG("[JPEGDRV]JPEG Decoder : Copy from user error\n"); return -EFAULT; } JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Resume, [%d] %x %x %x !!\n", dec_row_params.pauseMCU -1,dec_row_params.decRowBuf[0], dec_row_params.decRowBuf[1], dec_row_params.decRowBuf[2]); jpeg_drv_dec_set_dst_bank0( dec_row_params.decRowBuf[0], dec_row_params.decRowBuf[1], dec_row_params.decRowBuf[2]); jpeg_drv_dec_set_pause_mcu_idx(dec_row_params.pauseMCU -1) ; // lock CPU to ensure irq is enabled after trigger HW spin_lock(&jpeg_dec_lock); jpeg_drv_dec_resume(BIT_INQST_MASK_PAUSE); spin_unlock(&jpeg_dec_lock); break; case JPEG_DEC_IOCTL_START: /* OT:OK */ JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Start!!\n"); //Debug: printk("0xF0: 0x%08x\n", *(volatile unsigned int*)(JPEG_DEC_BASE + 0xF0)); jpeg_drv_dec_start(); break; case JPEG_DEC_IOCTL_WAIT: if(*pStatus != JPEG_DEC_PROCESS) { JPEG_WRN("Permission Denied! This process can not access decoder"); return -EFAULT; } if(dec_status == 0) { JPEG_WRN("Decoder status is available, HOW COULD THIS HAPPEN ??"); *pStatus = 0; return -EFAULT; } if(copy_from_user(&outParams, (void *)arg, sizeof(JPEG_DEC_DRV_OUT))) { JPEG_WRN("JPEG Decoder : Copy from user error\n"); return -EFAULT; } //set timeout timeout_jiff = outParams.timeout* HZ / 1000; //JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Wait Resume Time Jiffies : %ld\n", timeout_jiff); #ifdef FPGA_VERSION //#if 1 JPEG_MSG("[JPEGDRV]Polling JPEG Status"); do { _jpeg_dec_int_status = REG_JPGDEC_INTERRUPT_STATUS; } while(_jpeg_dec_int_status == 0); #else //if(outParams.timeout >= 5000){ // // JPEG_MSG("Polling JPEG Status"); // do // { // _jpeg_dec_int_status = REG_JPGDEC_INTERRUPT_STATUS; // timeout--; // } while(_jpeg_dec_int_status == 0 && timeout != 0); // if(timeout == 0) JPEG_MSG("Polling JPEG Status TIMEOUT!!\n"); //}else if(jpeg_isr_dec_lisr()<0){ //JPEG_MSG("wait JPEG irq\n"); wait_event_interruptible_timeout(dec_wait_queue, _jpeg_dec_int_status, timeout_jiff); JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Enter IRQ Wait Done!!\n"); //printk("[JPEGDRV]wait JPEG irq done\n"); }else{ JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Enter IRQ Wait Already Done!!\n"); //printk("[JPEGDRV]JPEG decoder already done\n"); } #endif decResult = jpeg_drv_dec_get_result(); //jpeg_drv_dec_dump_key_reg(); if(decResult >= 2) { JPEG_MSG("[JPEGDRV]Decode Result : %d, status %x!\n", decResult, _jpeg_dec_int_status ); jpeg_drv_dec_dump_key_reg(); //jpeg_drv_dec_dump_reg(); jpeg_drv_dec_reset(); } irq_st = _jpeg_dec_int_status ; decResult = decResult | (irq_st<<8) ; _jpeg_dec_int_status = 0; if(copy_to_user(outParams.result, &decResult, sizeof(unsigned int))) { JPEG_WRN("JPEG Decoder : Copy to user error (result)\n"); return -EFAULT; } break; case JPEG_DEC_IOCTL_BREAK: if (jpeg_drv_dec_break() < 0) return -EFAULT; break; case JPEG_DEC_IOCTL_DUMP_REG: JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder DUMP REGISTER !!\n"); jpeg_drv_dec_dump_reg(); break; case JPEG_DEC_IOCTL_DEINIT: JPEG_MSG("[JPEGDRV][IOCTL] JPEG Decoder Deinit !!\n"); // copy input parameters if(*pStatus != JPEG_DEC_PROCESS) { JPEG_ERR("Permission Denied! This process can not access encoder"); return -EFAULT; } if(dec_status == 0) { JPEG_ERR("Encoder status is available, HOW COULD THIS HAPPEN ??"); *pStatus = 0; return -EFAULT; } jpeg_drv_dec_deinit(); *pStatus = 0; break; #ifdef FOR_COMPILE case JPEG_DEC_IOCTL_RW_REG: /* OT:OK */ jpeg_drv_dec_rw_reg(); break; #endif default: JPEG_ERR("JPEG DEC IOCTL NO THIS COMMAND\n"); break; } return 0; }
static int wdma_config_l(DISP_MODULE_ENUM module, disp_ddp_path_config* pConfig, void *handle) { WDMA_CONFIG_STRUCT* config = &pConfig->wdma_config; int wdma_idx = wdma_index(module); CMDQ_ENG_ENUM cmdq_engine; if (!pConfig->wdma_dirty) { return 0; } //warm reset wdma every time we use it if(handle) { if(/*(primary_display_is_video_mode()==0 && primary_display_is_decouple_mode()==0) ||*/ primary_display_is_decouple_mode()==1) { unsigned int idx_offst = wdma_idx*DISP_WDMA_INDEX_OFFSET; DISP_REG_SET(handle, idx_offst+DISP_REG_WDMA_RST, 0x01); // trigger soft reset cmdqRecPoll(handle, disp_addr_convert(idx_offst+DISP_REG_WDMA_FLOW_CTRL_DBG), 1, 0x1); DISP_REG_SET(handle, idx_offst+DISP_REG_WDMA_RST , 0x0); // trigger soft reset } } cmdq_engine = wdma_idx==0 ? CMDQ_ENG_DISP_WDMA0 : CMDQ_ENG_DISP_WDMA1; if(config->security == DISP_SECURE_BUFFER) { cmdqRecSetSecure(handle, 1); /* set engine as sec */ cmdqRecSecureEnablePortSecurity(handle, (1LL << cmdq_engine)); cmdqRecSecureEnableDAPC(handle, (1LL << cmdq_engine)); if(wdma_is_sec[wdma_idx] == 0) DDPMSG("[SVP] switch wdma%d to sec\n", wdma_idx); wdma_is_sec[wdma_idx] = 1; } else { if(wdma_is_sec[wdma_idx]) { /* wdma is in sec stat, we need to switch it to nonsec */ cmdqRecHandle nonsec_switch_handle; int ret; ret = cmdqRecCreate(CMDQ_SCENARIO_DISP_PRIMARY_DISABLE_SECURE_PATH, &(nonsec_switch_handle)); if(ret) DDPAEE("[SVP]fail to create disable handle %s ret=%d\n", __FUNCTION__, ret); cmdqRecReset(nonsec_switch_handle); _cmdq_insert_wait_frame_done_token_mira(nonsec_switch_handle); cmdqRecSetSecure(nonsec_switch_handle, 1); /*in fact, dapc/port_sec will be disabled by cmdq*/ cmdqRecSecureEnablePortSecurity(nonsec_switch_handle, (1LL << cmdq_engine)); cmdqRecSecureEnableDAPC(nonsec_switch_handle, (1LL << cmdq_engine)); cmdqRecFlushAsync(nonsec_switch_handle); cmdqRecDestroy(nonsec_switch_handle); DDPMSG("[SVP] switch wdma%d to nonsec\n", wdma_idx); } wdma_is_sec[wdma_idx] = 0; } if (wdma_check_input_param(config) == 0) wdma_config(module, config->srcWidth, config->srcHeight, config->clipX, config->clipY, config->clipWidth, config->clipHeight, config->outputFormat, config->dstAddress, config->dstPitch, config->useSpecifiedAlpha, config->alpha, config->security, handle); return 0; }