static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) { int line = pinfo - cpm_uart_ports; volatile scc_t *scp; volatile scc_uart_t *sup; pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line); scp = pinfo->sccp; sup = pinfo->sccup; /* Store address */ pinfo->sccup->scc_genscc.scc_rbase = (unsigned char *)pinfo->rx_bd_base - DPRAM_BASE; pinfo->sccup->scc_genscc.scc_tbase = (unsigned char *)pinfo->tx_bd_base - DPRAM_BASE; /* Set up the uart parameters in the * parameter ram. */ cpm_set_scc_fcr(sup); sup->scc_genscc.scc_mrblr = pinfo->rx_fifosize; sup->scc_maxidl = pinfo->rx_fifosize; sup->scc_brkcr = 1; sup->scc_parec = 0; sup->scc_frmec = 0; sup->scc_nosec = 0; sup->scc_brkec = 0; sup->scc_uaddr1 = 0; sup->scc_uaddr2 = 0; sup->scc_toseq = 0; sup->scc_char1 = 0x8000; sup->scc_char2 = 0x8000; sup->scc_char3 = 0x8000; sup->scc_char4 = 0x8000; sup->scc_char5 = 0x8000; sup->scc_char6 = 0x8000; sup->scc_char7 = 0x8000; sup->scc_char8 = 0x8000; sup->scc_rccm = 0xc0ff; /* Send the CPM an initialize command. */ cpm_line_cr_cmd(line, CPM_CR_INIT_TRX); /* Set UART mode, 8 bit, no parity, one stop. * Enable receive and transmit. */ scp->scc_gsmrh = 0; scp->scc_gsmrl = (SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); /* Enable rx interrupts and clear all pending events. */ scp->scc_sccm = 0; scp->scc_scce = 0xffff; scp->scc_dsr = 0x7e7e; scp->scc_psmr = 0x3000; scp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT); }
static void cpm_uart_init_scc(struct uart_cpm_port *pinfo) { scc_t __iomem *scp; scc_uart_t __iomem *sup; pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line); scp = pinfo->sccp; sup = pinfo->sccup; /* Store address */ out_be16(&pinfo->sccup->scc_genscc.scc_rbase, (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE); out_be16(&pinfo->sccup->scc_genscc.scc_tbase, (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE); /* Set up the uart parameters in the * parameter ram. */ cpm_set_scc_fcr(sup); out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize); out_be16(&sup->scc_maxidl, pinfo->rx_fifosize); out_be16(&sup->scc_brkcr, 1); out_be16(&sup->scc_parec, 0); out_be16(&sup->scc_frmec, 0); out_be16(&sup->scc_nosec, 0); out_be16(&sup->scc_brkec, 0); out_be16(&sup->scc_uaddr1, 0); out_be16(&sup->scc_uaddr2, 0); out_be16(&sup->scc_toseq, 0); out_be16(&sup->scc_char1, 0x8000); out_be16(&sup->scc_char2, 0x8000); out_be16(&sup->scc_char3, 0x8000); out_be16(&sup->scc_char4, 0x8000); out_be16(&sup->scc_char5, 0x8000); out_be16(&sup->scc_char6, 0x8000); out_be16(&sup->scc_char7, 0x8000); out_be16(&sup->scc_char8, 0x8000); out_be16(&sup->scc_rccm, 0xc0ff); /* Send the CPM an initialize command. */ cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX); /* Set UART mode, 8 bit, no parity, one stop. * Enable receive and transmit. */ out_be32(&scp->scc_gsmrh, 0); out_be32(&scp->scc_gsmrl, SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16); /* Enable rx interrupts and clear all pending events. */ out_be16(&scp->scc_sccm, 0); out_be16(&scp->scc_scce, 0xffff); out_be16(&scp->scc_dsr, 0x7e7e); out_be16(&scp->scc_psmr, 0x3000); setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT); }