void LED_Off(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Clr_bits(LED_State, leds);
// While there are specified LEDs left to manage...
while (leds)
{
// Select the next specified LED and turn it off.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_Display_Mask(U32 mask, U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
mask &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Wr_bits(LED_State, mask, leds);
// While there are specified LEDs left to manage...
while (mask)
{
// Select the next specified LED and set it to the requested state.
led_shift = 1 + ctz(mask);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
leds >>= led_shift - 1;
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
mask >>= led_shift;
}
}
void LED_Set_Intensity(U32 leds, U8 intensity)
{
#if 0 // TODO
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_pwm_channel_t *led_pwm_channel;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// For each specified LED...
for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
{
// Select the next specified LED and check that it has a PWM channel.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
if (led_descriptor->PWM.CHANNEL < 0) continue;
// Initialize or update the LED PWM channel.
led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
{
led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
~(AVR32_PWM_CALG_MASK |
AVR32_PWM_CPOL_MASK |
AVR32_PWM_CPD_MASK);
led_pwm_channel->cprd = 0x000000FF;
led_pwm_channel->cdty = intensity;
AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
}
else
{
AVR32_PWM.isr;
while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
led_pwm_channel->cupd = intensity;
}
// Switch the LED pin to its PWM function.
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (led_descriptor->PWM.FUNCTION & 0x1)
{
led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
}
if (led_descriptor->PWM.FUNCTION & 0x2)
{
led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
}
#else
return;
#endif
}
void CEngine_Destroy(void *self)
{
CEngine *thiz = (CEngine *) self;
// Verify that there are no extant objects
unsigned instanceCount = thiz->mEngine.mInstanceCount;
unsigned instanceMask = thiz->mEngine.mInstanceMask;
if ((0 < instanceCount) || (0 != instanceMask)) {
SL_LOGE("Object::Destroy(%p) for engine ignored; %u total active objects",
thiz, instanceCount);
while (0 != instanceMask) {
unsigned i = ctz(instanceMask);
assert(MAX_INSTANCE > i);
SL_LOGE("Object::Destroy(%p) for engine ignored; active object ID %u at %p",
thiz, i + 1, thiz->mEngine.mInstances[i]);
instanceMask &= ~(1 << i);
}
}
// If engine was created but not realized, there will be no sync thread yet
pthread_t zero;
memset(&zero, 0, sizeof(pthread_t));
if (0 != memcmp(&zero, &thiz->mSyncThread, sizeof(pthread_t))) {
// Announce to the sync thread that engine is shutting down; it polls so should see it soon
thiz->mEngine.mShutdown = SL_BOOLEAN_TRUE;
// Wait for the sync thread to acknowledge the shutdown
while (!thiz->mEngine.mShutdownAck) {
object_cond_wait(&thiz->mObject);
}
// The sync thread should have exited by now, so collect it by joining
(void) pthread_join(thiz->mSyncThread, (void **) NULL);
}
// Shutdown the thread pool used for asynchronous operations (there should not be any)
ThreadPool_deinit(&thiz->mThreadPool);
#if defined(ANDROID)
// free equalizer preset names
if (NULL != thiz->mEqPresetNames) {
for (unsigned i = 0; i < thiz->mEqNumPresets; ++i) {
if (NULL != thiz->mEqPresetNames[i]) {
delete[] thiz->mEqPresetNames[i];
thiz->mEqPresetNames[i] = NULL;
}
}
delete[] thiz->mEqPresetNames;
thiz->mEqPresetNames = NULL;
}
thiz->mEqNumPresets = 0;
#endif
#ifdef USE_SDL
SDL_close();
#endif
}
num_t sigma_star(const num_t n) const {
// sum of anti-divisors of n.
if (n <= 1) {
return 0;
}
uint32 two_e = ctz(n);
num_t ret;
ret = sigma(2 * n - 1); // exclude 1 and 2 * n - 1
ret += sigma(2 * n + 1); // exclude 1 and 2 * n
ret += sigma(n >> two_e) << (two_e + 1); // exclude 2 * n
return ret - 6 * n - 2;
}
U8 LED_Get_Intensity(U32 led)
{
tLED_DESCRIPTOR *led_descriptor;
// Check that the argument value is valid.
led = ctz(led);
led_descriptor = &LED_DESCRIPTOR[led];
if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
// Return the duty cycle value if the LED PWM channel is enabled, else 0.
return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
}
void LED_Toggle(U32 leds)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
leds &= (1 << LED_COUNT) - 1;
Tgl_bits(LED_State, leds);
while (leds)
{
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
static int Get( vlc_va_t *va, picture_t *pic, uint8_t **data )
{
vlc_va_sys_t *sys = va->sys;
unsigned i = sys->count;
vlc_mutex_lock( &sys->lock );
if (sys->available)
{
i = ctz(sys->available);
sys->available &= ~(1 << i);
}
vlc_mutex_unlock( &sys->lock );
if( i >= sys->count )
return VLC_ENOMEM;
VASurfaceID *surface = &sys->surfaces[i];
pic->context = surface;
*data = (void *)(uintptr_t)*surface;
return VLC_SUCCESS;
}
{
if (*len <= alloc_block_min_len) {
*len = alloc_block_min_len;
return 0;
}
// ]8, 256] we go by increments of 16 bytes.
if (*len <= alloc_block_mid_len) {
size_t class = ceil_div(*len, alloc_block_mid_inc);
*len = class * alloc_block_mid_inc;
return class;
}
// ]256, 2048] we go by powers of 2.
*len = ceil_pow2(*len);
size_t bits = ctz(*len) - ctz(alloc_block_mid_len);
return bits + (alloc_block_mid_len / alloc_block_mid_inc);
}
// -----------------------------------------------------------------------------
// tag
// -----------------------------------------------------------------------------
static const size_t alloc_block_tag_bits = 16;
static ilka_off_t alloc_block_tag(struct alloc_blocks *blocks, ilka_off_t off)
{
ilka_off_t tag = ilka_atomic_fetch_add(&blocks->tags, 1, morder_relaxed);
return off | (tag << (64 - alloc_block_tag_bits));
}
void LED_Display_Field(U32 field, U32 leds)
{
// Move the bit-field to the appropriate position for the bit-mask.
LED_Display_Mask(field, leds << ctz(field));
}
void object_unlock_exclusive_attributes(IObject *thiz, unsigned attributes)
#endif
{
#ifdef USE_DEBUG
assert(pthread_equal(pthread_self(), thiz->mOwner));
assert(NULL != thiz->mFile);
assert(0 != thiz->mLine);
#endif
int ok;
// make SL object IDs be contiguous with XA object IDs
SLuint32 objectID = IObjectToObjectID(thiz);
SLuint32 index = objectID;
if ((XA_OBJECTID_ENGINE <= index) && (index <= XA_OBJECTID_CAMERADEVICE)) {
;
} else if ((SL_OBJECTID_ENGINE <= index) && (index <= SL_OBJECTID_METADATAEXTRACTOR)) {
index -= SL_OBJECTID_ENGINE - XA_OBJECTID_CAMERADEVICE - 1;
} else {
assert(false);
index = 0;
}
// first synchronously handle updates to attributes here, while object is still locked.
// This appears to be a loop, but actually typically runs through the loop only once.
unsigned asynchronous = attributes;
while (attributes) {
// this sequence is carefully crafted to be O(1); tread carefully when making changes
unsigned bit = ctz(attributes);
// ATTR_INDEX_MAX == next bit position after the last attribute
assert(ATTR_INDEX_MAX > bit);
// compute the entry in the handler table using object ID and bit number
AttributeHandler handler = handlerTable[index][bit];
if (NULL != handler) {
asynchronous &= ~(*handler)(thiz);
}
attributes &= ~(1 << bit);
}
// any remaining attributes are handled asynchronously in the sync thread
if (asynchronous) {
unsigned oldAttributesMask = thiz->mAttributesMask;
thiz->mAttributesMask = oldAttributesMask | asynchronous;
if (oldAttributesMask) {
asynchronous = ATTR_NONE;
}
}
#ifdef ANDROID
// FIXME hack to safely handle a post-unlock PrefetchStatus callback and/or AudioTrack::start()
slPrefetchCallback prefetchCallback = NULL;
void *prefetchContext = NULL;
SLuint32 prefetchEvents = SL_PREFETCHEVENT_NONE;
android::sp<android::AudioTrack> audioTrack;
if (SL_OBJECTID_AUDIOPLAYER == objectID) {
CAudioPlayer *ap = (CAudioPlayer *) thiz;
prefetchCallback = ap->mPrefetchStatus.mDeferredPrefetchCallback;
prefetchContext = ap->mPrefetchStatus.mDeferredPrefetchContext;
prefetchEvents = ap->mPrefetchStatus.mDeferredPrefetchEvents;
ap->mPrefetchStatus.mDeferredPrefetchCallback = NULL;
// clearing these next two fields is not required, but avoids stale data during debugging
ap->mPrefetchStatus.mDeferredPrefetchContext = NULL;
ap->mPrefetchStatus.mDeferredPrefetchEvents = SL_PREFETCHEVENT_NONE;
if (ap->mDeferredStart) {
audioTrack = ap->mAudioTrack;
ap->mDeferredStart = false;
}
}
#endif
#ifdef USE_DEBUG
memset(&thiz->mOwner, 0, sizeof(pthread_t));
thiz->mFile = file;
thiz->mLine = line;
#endif
ok = pthread_mutex_unlock(&thiz->mMutex);
assert(0 == ok);
#ifdef ANDROID
// FIXME call the prefetch status callback while not holding the mutex on AudioPlayer
if (NULL != prefetchCallback) {
// note these are synchronous by the application's thread as it is about to return from API
assert(prefetchEvents != SL_PREFETCHEVENT_NONE);
CAudioPlayer *ap = (CAudioPlayer *) thiz;
// spec requires separate callbacks for each event
if (SL_PREFETCHEVENT_STATUSCHANGE & prefetchEvents) {
(*prefetchCallback)(&ap->mPrefetchStatus.mItf, prefetchContext,
SL_PREFETCHEVENT_STATUSCHANGE);
}
if (SL_PREFETCHEVENT_FILLLEVELCHANGE & prefetchEvents) {
(*prefetchCallback)(&ap->mPrefetchStatus.mItf, prefetchContext,
SL_PREFETCHEVENT_FILLLEVELCHANGE);
}
}
// call AudioTrack::start() while not holding the mutex on AudioPlayer
if (audioTrack != 0) {
audioTrack->start();
audioTrack.clear();
}
#endif
// first update to this interface since previous sync
if (ATTR_NONE != asynchronous) {
unsigned id = thiz->mInstanceID;
if (0 != id) {
--id;
assert(MAX_INSTANCE > id);
IEngine *thisEngine = &thiz->mEngine->mEngine;
// FIXME atomic or here
interface_lock_exclusive(thisEngine);
thisEngine->mChangedMask |= 1 << id;
interface_unlock_exclusive(thisEngine);
}
}
}
/* Given the IP netmask 'netmask', returns the number of bits of the IP address
* that it specifies, that is, the number of 1-bits in 'netmask'. 'netmask'
* must be a CIDR netmask (see ip_is_cidr()). */
int
ip_count_cidr_bits(ovs_be32 netmask)
{
assert(ip_is_cidr(netmask));
return 32 - ctz(ntohl(netmask));
}
enum handler_return platform_irq(struct arm_iframe *frame)
{
uint vector;
uint cpu = arch_curr_cpu_num();
THREAD_STATS_INC(interrupts);
// see what kind of irq it is
uint32_t pend = *REG32(INTC_LOCAL_IRQ_PEND0 + cpu * 4);
pend &= ~(1 << (INTERRUPT_ARM_LOCAL_GPU_FAST % 32)); // mask out gpu interrupts
if (pend != 0) {
// it's a local interrupt
LTRACEF("local pend 0x%x\n", pend);
vector = ARM_IRQ_LOCAL_BASE + ctz(pend);
goto decoded;
}
// XXX disable for now, since all of the interesting irqs are mirrored into the other banks
#if 0
// look in bank 0 (ARM interrupts)
pend = *REG32(INTC_PEND0);
LTRACEF("pend0 0x%x\n", pend);
pend &= ~((1<<8)|(1<<9)); // mask out bit 8 and 9
if (pend != 0) {
// it's a bank 0 interrupt
vector = ARM_IRQ0_BASE + ctz(pend);
goto decoded;
}
#endif
// look for VC interrupt bank 1
pend = *REG32(INTC_PEND1);
LTRACEF("pend1 0x%x\n", pend);
if (pend != 0) {
// it's a bank 1 interrupt
vector = ARM_IRQ1_BASE + ctz(pend);
goto decoded;
}
// look for VC interrupt bank 2
pend = *REG32(INTC_PEND2);
LTRACEF("pend2 0x%x\n", pend);
if (pend != 0) {
// it's a bank 2 interrupt
vector = ARM_IRQ2_BASE + ctz(pend);
goto decoded;
}
vector = 0xffffffff;
decoded:
LTRACEF("cpu %u vector %u\n", cpu, vector);
// dispatch the irq
enum handler_return ret = INT_NO_RESCHEDULE;
#if WITH_SMP
if (vector == INTERRUPT_ARM_LOCAL_MAILBOX0) {
pend = *REG32(INTC_LOCAL_MAILBOX0_CLR0 + 0x10 * cpu);
LTRACEF("mailbox0 clr 0x%x\n", pend);
// ack it
*REG32(INTC_LOCAL_MAILBOX0_CLR0 + 0x10 * cpu) = pend;
if (pend & (1 << MP_IPI_GENERIC)) {
PANIC_UNIMPLEMENTED;
}
if (pend & (1 << MP_IPI_RESCHEDULE)) {
ret = mp_mbx_reschedule_irq();
}
} else
#endif // WITH_SMP
if (vector == 0xffffffff) {
ret = INT_NO_RESCHEDULE;
} else if (int_handler_table[vector].handler) {
ret = int_handler_table[vector].handler(int_handler_table[vector].arg);
} else {
panic("irq %u fired on cpu %u but no handler set!\n", vector, cpu);
}
return ret;
}
/* Given the IP netmask 'netmask', returns the number of bits of the IP address
* that it specifies, that is, the number of 1-bits in 'netmask'.
*
* If 'netmask' is not a CIDR netmask (see ip_is_cidr()), the return value will
* still be in the valid range but isn't otherwise meaningful. */
int
ip_count_cidr_bits(ovs_be32 netmask)
{
return 32 - ctz(ntohl(netmask));
}
void LED_Display_Field(U32 field, U32 leds)
{
LED_Display_Mask(field, leds << ctz(field));
}
