static void init(struct fmt_main *self)
{
assert(sizeof(hccap_t) == HCCAP_SIZE);
///Alocate memory for hashes and passwords
inbuffer =
(wpapsk_password *) malloc(sizeof(wpapsk_password) *
MAX_KEYS_PER_CRYPT);
outbuffer =
(wpapsk_hash *) malloc(sizeof(wpapsk_hash) * MAX_KEYS_PER_CRYPT);
check_mem_allocation(inbuffer, outbuffer);
mic = (mic_t *) malloc(sizeof(mic_t) * MAX_KEYS_PER_CRYPT);
atexit(cleanup);
/*
* Zeroize the lengths in case crypt_all() is called with some keys still
* not set. This may happen during self-tests.
*/
{
int i;
for (i = 0; i < self->params.max_keys_per_crypt; i++)
inbuffer[i].length = 0;
}
///Initialize CUDA
cuda_init(cuda_gpu_id);
}
int cuda_init_memopt(void)
{
int num_devices = cuda_devices();
int device;
int max_device = 0;
if (num_devices > 1) {
size_t mem_max = 0;
size_t mem_free;
size_t mem_total;
for (device = 0; device < num_devices; device++) {
cuda_init(device);
CUDA_ERROR(cudaMemGetInfo(&mem_free, &mem_total));
//printf(" device (%d): %d\n", device, mem_available);
if (mem_max < mem_free) {
mem_max = mem_free;
max_device = device;
}
}
//printf(" max device: %d\n", max_device);
CUDA_ERROR(cudaSetDevice(max_device));
// FIXME: we should set last_init
}
return max_device;
}
static void init(struct fmt_main *self)
{
host_pass = mem_calloc(KEYS_PER_CRYPT, sizeof(pwsafe_pass));
host_hash = mem_calloc(KEYS_PER_CRYPT, sizeof(pwsafe_hash));
host_salt = mem_calloc(1, sizeof(pwsafe_salt));
cuda_init();
}
static void init(struct fmt_main *self)
{
gkey = mem_calloc(MAX_KEYS_PER_CRYPT * sizeof(sha512_key));
ghash = mem_calloc(MAX_KEYS_PER_CRYPT * sizeof(sha512_hash));
cuda_init(cuda_gpu_id);
cuda_sha512_init();
}
static void init(struct fmt_main *self)
{
gkey = mem_calloc(MAX_KEYS_PER_CRYPT, sizeof(xsha512_key));
g_ext_key = mem_calloc(MAX_KEYS_PER_CRYPT, sizeof(xsha512_extend_key));
ghash = mem_calloc(MAX_KEYS_PER_CRYPT, sizeof(xsha512_hash));
cuda_init();
cuda_xsha512_init();
}
static void init(struct fmt_main *self)
{
//Allocate memory for hashes and passwords
inbuffer=(crypt_sha256_password*)mem_calloc(MAX_KEYS_PER_CRYPT*sizeof(crypt_sha256_password));
outbuffer=(uint32_t*)mem_alloc(MAX_KEYS_PER_CRYPT*sizeof(uint32_t)*8);
check_mem_allocation(inbuffer,outbuffer);
//Initialize CUDA
cuda_init(cuda_gpu_id);
}
static void init(struct fmt_main *self)
{
//Allocate memory for hashes and passwords
inbuffer =
(mscash2_password *) mem_calloc(MAX_KEYS_PER_CRYPT*sizeof(mscash2_password));
outbuffer =
(mscash2_hash *) mem_alloc(MAX_KEYS_PER_CRYPT*sizeof(mscash2_hash));
check_mem_allocation(inbuffer, outbuffer);
//Initialize CUDA
cuda_init(cuda_gpu_id);
}
static void init(struct fmt_main *self)
{
///Alocate memory for hashes and passwords
inbuffer =
(uint8_t *) calloc(MAX_KEYS_PER_CRYPT, sizeof(phpass_password));
outbuffer =
(phpass_crack *) calloc(MAX_KEYS_PER_CRYPT, sizeof(phpass_crack));
check_mem_allocation(inbuffer, outbuffer);
atexit(cleanup);
///Initialize CUDA
cuda_init(cuda_gpu_id);
}
static void init(struct fmt_main *self)
{
///Allocate memory for hashes and passwords
inbuffer =
(crypt_md5_password *) mem_calloc(MAX_KEYS_PER_CRYPT *
sizeof(crypt_md5_password));
outbuffer =
(crypt_md5_crack *) mem_alloc(MAX_KEYS_PER_CRYPT *
sizeof(crypt_md5_crack));
check_mem_allocation(inbuffer, outbuffer);
///Initialize CUDA
cuda_init();
}
int main(int argc, char *argv[])
{
service_id_t service_id;
int rc;
int i;
printf(NAME ": VIA-CUDA Apple Desktop Bus driver\n");
for (i = 0; i < ADB_MAX_ADDR; ++i) {
adb_dev[i].client_sess = NULL;
adb_dev[i].service_id = 0;
}
async_set_client_connection(cuda_connection);
rc = loc_server_register(NAME);
if (rc < 0) {
printf(NAME ": Unable to register server.\n");
return rc;
}
rc = loc_service_register("adb/kbd", &service_id);
if (rc != EOK) {
printf(NAME ": Unable to register service %s.\n", "adb/kdb");
return rc;
}
adb_dev[2].service_id = service_id;
adb_dev[8].service_id = service_id;
rc = loc_service_register("adb/mouse", &service_id);
if (rc != EOK) {
printf(NAME ": Unable to register servise %s.\n", "adb/mouse");
return rc;
}
adb_dev[9].service_id = service_id;
if (cuda_init() < 0) {
printf("cuda_init() failed\n");
return 1;
}
task_retval(0);
async_manager();
return 0;
}
static void init(struct fmt_main *self)
{
cuda_init();
if (cuda_getAsyncEngineCount() > 0) {
overlap = 1;
inbuffer =
cuda_pageLockedMalloc(inbuffer,
sizeof(sha256_password) * MAX_KEYS_PER_CRYPT);
outbuffer =
cuda_pageLockedMalloc(outbuffer,
sizeof(SHA_HASH) * MAX_KEYS_PER_CRYPT);
} else {
overlap = 0;
//device does not support overlapping memcpy and kernel execution
inbuffer =
(sha256_password *) mem_calloc(MAX_KEYS_PER_CRYPT,
sizeof(sha256_password));
outbuffer =
(SHA_HASH *) mem_alloc(MAX_KEYS_PER_CRYPT * sizeof(SHA_HASH));
}
check_mem_allocation(inbuffer, outbuffer);
}
/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
CPUState *env = NULL, *envs[MAX_CPUS];
char *filename;
qemu_irq *pic, **openpic_irqs;
int unin_memory;
int linux_boot, i;
ram_addr_t ram_offset, bios_offset, vga_bios_offset;
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
PCIBus *pci_bus;
MacIONVRAMState *nvr;
int nvram_mem_index;
int vga_bios_size, bios_size;
int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
int ide_mem_index[3];
int ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
void *dbdma;
uint8_t *vga_bios_ptr;
int machine_arch;
linux_boot = (kernel_filename != NULL);
/* init CPUs */
if (cpu_model == NULL)
#ifdef TARGET_PPC64
cpu_model = "970fx";
#else
cpu_model = "G4";
#endif
for (i = 0; i < smp_cpus; i++) {
env = cpu_init(cpu_model);
if (!env) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
/* Set time-base frequency to 100 Mhz */
cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
env->osi_call = vga_osi_call;
#endif
qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
envs[i] = env;
}
/* allocate RAM */
ram_offset = qemu_ram_alloc(NULL, "ppc_core99.ram", ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset);
/* allocate and load BIOS */
bios_offset = qemu_ram_alloc(NULL, "ppc_core99.bios", BIOS_SIZE);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
/* Load OpenBIOS (ELF) */
if (filename) {
bios_size = load_elf(filename, NULL, NULL, NULL,
NULL, NULL, 1, ELF_MACHINE, 0);
qemu_free(filename);
} else {
bios_size = -1;
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
exit(1);
}
/* allocate and load VGA BIOS */
vga_bios_offset = qemu_ram_alloc(NULL, "ppc_core99.vbios", VGA_BIOS_SIZE);
vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
if (filename) {
vga_bios_size = load_image(filename, vga_bios_ptr + 8);
qemu_free(filename);
} else {
vga_bios_size = -1;
}
if (vga_bios_size < 0) {
/* if no bios is present, we can still work */
fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
VGABIOS_FILENAME);
vga_bios_size = 0;
} else {
/* set a specific header (XXX: find real Apple format for NDRV
drivers) */
vga_bios_ptr[0] = 'N';
vga_bios_ptr[1] = 'D';
vga_bios_ptr[2] = 'R';
vga_bios_ptr[3] = 'V';
cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
vga_bios_size += 8;
/* Round to page boundary */
vga_bios_size = (vga_bios_size + TARGET_PAGE_SIZE - 1) &
TARGET_PAGE_MASK;
}
if (linux_boot) {
uint64_t lowaddr = 0;
int bswap_needed;
#ifdef BSWAP_NEEDED
bswap_needed = 1;
#else
bswap_needed = 0;
#endif
kernel_base = KERNEL_LOAD_ADDR;
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, kernel_base,
ram_size - kernel_base, bswap_needed,
TARGET_PAGE_SIZE);
if (kernel_size < 0)
kernel_size = load_image_targphys(kernel_filename,
kernel_base,
ram_size - kernel_base);
if (kernel_size < 0) {
hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
exit(1);
}
/* load initrd */
if (initrd_filename) {
initrd_base = INITRD_LOAD_ADDR;
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
hw_error("qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
} else {
initrd_base = 0;
initrd_size = 0;
}
ppc_boot_device = 'm';
} else {
kernel_base = 0;
kernel_size = 0;
initrd_base = 0;
initrd_size = 0;
ppc_boot_device = '\0';
/* We consider that NewWorld PowerMac never have any floppy drive
* For now, OHW cannot boot from the network.
*/
for (i = 0; boot_device[i] != '\0'; i++) {
if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
ppc_boot_device = boot_device[i];
break;
}
}
if (ppc_boot_device == '\0') {
fprintf(stderr, "No valid boot device for Mac99 machine\n");
exit(1);
}
}
isa_mem_base = 0x80000000;
/* Register 8 MB of ISA IO space */
isa_mmio_init(0xf2000000, 0x00800000, 1);
/* UniN init */
unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
openpic_irqs[0] =
qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
for (i = 0; i < smp_cpus; i++) {
/* Mac99 IRQ connection between OpenPIC outputs pins
* and PowerPC input pins
*/
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
break;
#if defined(TARGET_PPC64)
case PPC_FLAGS_INPUT_970:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
break;
#endif /* defined(TARGET_PPC64) */
default:
hw_error("Bus model not supported on mac99 machine\n");
exit(1);
}
}
pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
/* 970 gets a U3 bus */
pci_bus = pci_pmac_u3_init(pic);
machine_arch = ARCH_MAC99_U3;
} else {
pci_bus = pci_pmac_init(pic);
machine_arch = ARCH_MAC99;
}
/* init basic PC hardware */
pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
escc_mem_index = escc_init(0x80013000, pic[0x25], pic[0x24],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
for(i = 0; i < nb_nics; i++)
pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");
exit(1);
}
dbdma = DBDMA_init(&dbdma_mem_index);
/* We only emulate 2 out of 3 IDE controllers for now */
ide_mem_index[0] = -1;
hd[0] = drive_get(IF_IDE, 0, 0);
hd[1] = drive_get(IF_IDE, 0, 1);
ide_mem_index[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
hd[0] = drive_get(IF_IDE, 1, 0);
hd[1] = drive_get(IF_IDE, 1, 1);
ide_mem_index[2] = pmac_ide_init(hd, pic[0x0e], dbdma, 0x1a, pic[0x02]);
/* cuda also initialize ADB */
if (machine_arch == ARCH_MAC99_U3) {
usb_enabled = 1;
}
cuda_init(&cuda_mem_index, pic[0x19]);
adb_kbd_init(&adb_bus);
adb_mouse_init(&adb_bus);
macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
dbdma_mem_index, cuda_mem_index, NULL, 3, ide_mem_index,
escc_mem_index);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, -1);
}
/* U3 needs to use USB for input because Linux doesn't support via-cuda
on PPC64 */
if (machine_arch == ARCH_MAC99_U3) {
usbdevice_create("keyboard");
usbdevice_create("mouse");
}
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
graphic_depth = 15;
/* The NewWorld NVRAM is not located in the MacIO device */
nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
pmac_format_nvram_partition(nvr, 0x2000);
macio_nvram_map(nvr, 0xFFF04000);
/* No PCI init: the BIOS will do it */
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
if (kvm_enabled()) {
#ifdef CONFIG_KVM
uint8_t *hypercall;
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
hypercall = qemu_malloc(16);
kvmppc_get_hypercall(env, hypercall, 16);
fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
#endif
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
}
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;
char *filename;
qemu_irq *pic, **openpic_irqs;
MemoryRegion *unin_memory = g_new(MemoryRegion, 1);
int linux_boot, i;
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
target_phys_addr_t kernel_base, initrd_base, cmdline_base = 0;
long kernel_size, initrd_size;
PCIBus *pci_bus;
MacIONVRAMState *nvr;
int bios_size;
MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem, *escc_mem;
MemoryRegion *escc_bar = g_new(MemoryRegion, 1);
MemoryRegion *ide_mem[3];
int ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
void *dbdma;
int machine_arch;
linux_boot = (kernel_filename != NULL);
/* init CPUs */
if (cpu_model == NULL)
#ifdef TARGET_PPC64
cpu_model = "970fx";
#else
cpu_model = "G4";
#endif
for (i = 0; i < smp_cpus; i++) {
cpu = cpu_ppc_init(cpu_model);
if (cpu == NULL) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
env = &cpu->env;
/* Set time-base frequency to 100 Mhz */
cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
qemu_register_reset(ppc_core99_reset, cpu);
}
/* allocate RAM */
memory_region_init_ram(ram, "ppc_core99.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(get_system_memory(), 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, "ppc_core99.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
/* Load OpenBIOS (ELF) */
if (filename) {
bios_size = load_elf(filename, NULL, NULL, NULL,
NULL, NULL, 1, ELF_MACHINE, 0);
g_free(filename);
} else {
bios_size = -1;
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
exit(1);
}
if (linux_boot) {
uint64_t lowaddr = 0;
int bswap_needed;
#ifdef BSWAP_NEEDED
bswap_needed = 1;
#else
bswap_needed = 0;
#endif
kernel_base = KERNEL_LOAD_ADDR;
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, kernel_base,
ram_size - kernel_base, bswap_needed,
TARGET_PAGE_SIZE);
if (kernel_size < 0)
kernel_size = load_image_targphys(kernel_filename,
kernel_base,
ram_size - kernel_base);
if (kernel_size < 0) {
hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
exit(1);
}
/* load initrd */
if (initrd_filename) {
initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
hw_error("qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
cmdline_base = round_page(initrd_base + initrd_size);
} else {
initrd_base = 0;
initrd_size = 0;
cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
}
ppc_boot_device = 'm';
} else {
kernel_base = 0;
kernel_size = 0;
initrd_base = 0;
initrd_size = 0;
ppc_boot_device = '\0';
/* We consider that NewWorld PowerMac never have any floppy drive
* For now, OHW cannot boot from the network.
*/
for (i = 0; boot_device[i] != '\0'; i++) {
if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
ppc_boot_device = boot_device[i];
break;
}
}
if (ppc_boot_device == '\0') {
fprintf(stderr, "No valid boot device for Mac99 machine\n");
exit(1);
}
}
/* Register 8 MB of ISA IO space */
isa_mmio_init(0xf2000000, 0x00800000);
/* UniN init */
memory_region_init_io(unin_memory, &unin_ops, NULL, "unin", 0x1000);
memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory);
openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
openpic_irqs[0] =
g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
for (i = 0; i < smp_cpus; i++) {
/* Mac99 IRQ connection between OpenPIC outputs pins
* and PowerPC input pins
*/
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
break;
#if defined(TARGET_PPC64)
case PPC_FLAGS_INPUT_970:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
break;
#endif /* defined(TARGET_PPC64) */
default:
hw_error("Bus model not supported on mac99 machine\n");
exit(1);
}
}
pic = openpic_init(&pic_mem, smp_cpus, openpic_irqs, NULL);
if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
/* 970 gets a U3 bus */
pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io());
machine_arch = ARCH_MAC99_U3;
} else {
pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io());
machine_arch = ARCH_MAC99;
}
/* init basic PC hardware */
pci_vga_init(pci_bus);
escc_mem = escc_init(0, pic[0x25], pic[0x24],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
memory_region_init_alias(escc_bar, "escc-bar",
escc_mem, 0, memory_region_size(escc_mem));
for(i = 0; i < nb_nics; i++)
pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
ide_drive_get(hd, MAX_IDE_BUS);
dbdma = DBDMA_init(&dbdma_mem);
/* We only emulate 2 out of 3 IDE controllers for now */
ide_mem[0] = NULL;
ide_mem[1] = pmac_ide_init(hd, pic[0x0d], dbdma, 0x16, pic[0x02]);
ide_mem[2] = pmac_ide_init(&hd[MAX_IDE_DEVS], pic[0x0e], dbdma, 0x1a, pic[0x02]);
/* cuda also initialize ADB */
if (machine_arch == ARCH_MAC99_U3) {
usb_enabled = 1;
}
cuda_init(&cuda_mem, pic[0x19]);
adb_kbd_init(&adb_bus);
adb_mouse_init(&adb_bus);
macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem,
dbdma_mem, cuda_mem, NULL, 3, ide_mem, escc_bar);
if (usb_enabled) {
pci_create_simple(pci_bus, -1, "pci-ohci");
}
/* U3 needs to use USB for input because Linux doesn't support via-cuda
on PPC64 */
if (machine_arch == ARCH_MAC99_U3) {
usbdevice_create("keyboard");
usbdevice_create("mouse");
}
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
graphic_depth = 15;
/* The NewWorld NVRAM is not located in the MacIO device */
nvr = macio_nvram_init(0x2000, 1);
pmac_format_nvram_partition(nvr, 0x2000);
macio_nvram_setup_bar(nvr, get_system_memory(), 0xFFF04000);
/* No PCI init: the BIOS will do it */
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
if (kvm_enabled()) {
#ifdef CONFIG_KVM
uint8_t *hypercall;
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
hypercall = g_malloc(16);
kvmppc_get_hypercall(env, hypercall, 16);
fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
#endif
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
}
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
CPUState *env = NULL, *envs[MAX_CPUS];
char *filename;
qemu_irq *pic, **openpic_irqs;
int unin_memory;
int linux_boot, i;
ram_addr_t ram_offset, bios_offset, vga_bios_offset;
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
PCIBus *pci_bus;
MacIONVRAMState *nvr;
int nvram_mem_index;
int vga_bios_size, bios_size;
qemu_irq *dummy_irq;
int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
int ppc_boot_device;
int index;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
void *dbdma;
uint8_t *vga_bios_ptr;
linux_boot = (kernel_filename != NULL);
/* init CPUs */
if (cpu_model == NULL)
cpu_model = "G4";
for (i = 0; i < smp_cpus; i++) {
env = cpu_init(cpu_model);
if (!env) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
/* Set time-base frequency to 100 Mhz */
cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
env->osi_call = vga_osi_call;
#endif
qemu_register_reset(&cpu_ppc_reset, env);
envs[i] = env;
}
/* allocate RAM */
ram_offset = qemu_ram_alloc(ram_size);
cpu_register_physical_memory(0, ram_size, ram_offset);
/* allocate and load BIOS */
bios_offset = qemu_ram_alloc(BIOS_SIZE);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM);
/* Load OpenBIOS (ELF) */
if (filename) {
bios_size = load_elf(filename, 0, NULL, NULL, NULL);
qemu_free(filename);
} else {
bios_size = -1;
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
exit(1);
}
/* allocate and load VGA BIOS */
vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE);
vga_bios_ptr = qemu_get_ram_ptr(vga_bios_offset);
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, VGABIOS_FILENAME);
if (filename) {
vga_bios_size = load_image(filename, vga_bios_ptr + 8);
qemu_free(filename);
} else {
vga_bios_size = -1;
}
if (vga_bios_size < 0) {
/* if no bios is present, we can still work */
fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n",
VGABIOS_FILENAME);
vga_bios_size = 0;
} else {
/* set a specific header (XXX: find real Apple format for NDRV
drivers) */
vga_bios_ptr[0] = 'N';
vga_bios_ptr[1] = 'D';
vga_bios_ptr[2] = 'R';
vga_bios_ptr[3] = 'V';
cpu_to_be32w((uint32_t *)(vga_bios_ptr + 4), vga_bios_size);
vga_bios_size += 8;
}
if (linux_boot) {
uint64_t lowaddr = 0;
kernel_base = KERNEL_LOAD_ADDR;
/* Now we can load the kernel. The first step tries to load the kernel
supposing PhysAddr = 0x00000000. If that was wrong the kernel is
loaded again, the new PhysAddr being computed from lowaddr. */
kernel_size = load_elf(kernel_filename, kernel_base, NULL, &lowaddr, NULL);
if (kernel_size > 0 && lowaddr != KERNEL_LOAD_ADDR) {
kernel_size = load_elf(kernel_filename, (2 * kernel_base) - lowaddr,
NULL, NULL, NULL);
}
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, kernel_base,
ram_size - kernel_base);
if (kernel_size < 0)
kernel_size = load_image_targphys(kernel_filename,
kernel_base,
ram_size - kernel_base);
if (kernel_size < 0) {
hw_error("qemu: could not load kernel '%s'\n", kernel_filename);
exit(1);
}
/* load initrd */
if (initrd_filename) {
initrd_base = INITRD_LOAD_ADDR;
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
hw_error("qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
} else {
initrd_base = 0;
initrd_size = 0;
}
ppc_boot_device = 'm';
} else {
kernel_base = 0;
kernel_size = 0;
initrd_base = 0;
initrd_size = 0;
ppc_boot_device = '\0';
/* We consider that NewWorld PowerMac never have any floppy drive
* For now, OHW cannot boot from the network.
*/
for (i = 0; boot_device[i] != '\0'; i++) {
if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
ppc_boot_device = boot_device[i];
break;
}
}
if (ppc_boot_device == '\0') {
fprintf(stderr, "No valid boot device for Mac99 machine\n");
exit(1);
}
}
isa_mem_base = 0x80000000;
/* Register 8 MB of ISA IO space */
isa_mmio_init(0xf2000000, 0x00800000);
/* UniN init */
unin_memory = cpu_register_io_memory(unin_read, unin_write, NULL);
cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
openpic_irqs[0] =
qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
for (i = 0; i < smp_cpus; i++) {
/* Mac99 IRQ connection between OpenPIC outputs pins
* and PowerPC input pins
*/
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
break;
#if defined(TARGET_PPC64)
case PPC_FLAGS_INPUT_970:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
break;
#endif /* defined(TARGET_PPC64) */
default:
hw_error("Bus model not supported on mac99 machine\n");
exit(1);
}
}
pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
pci_bus = pci_pmac_init(pic);
/* init basic PC hardware */
pci_vga_init(pci_bus, vga_bios_offset, vga_bios_size);
/* XXX: suppress that */
dummy_irq = i8259_init(NULL);
escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
for(i = 0; i < nb_nics; i++)
pci_nic_init(&nd_table[i], "ne2k_pci", NULL);
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");
exit(1);
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
if (index != -1)
hd[i] = drives_table[index].bdrv;
else
hd[i] = NULL;
}
dbdma = DBDMA_init(&dbdma_mem_index);
pci_cmd646_ide_init(pci_bus, hd, 0);
/* cuda also initialize ADB */
cuda_init(&cuda_mem_index, pic[0x19]);
adb_kbd_init(&adb_bus);
adb_mouse_init(&adb_bus);
macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
dbdma_mem_index, cuda_mem_index, NULL, 0, NULL,
escc_mem_index);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, 3, -1);
}
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
graphic_depth = 15;
/* The NewWorld NVRAM is not located in the MacIO device */
nvr = macio_nvram_init(&nvram_mem_index, 0x2000, 1);
pmac_format_nvram_partition(nvr, 0x2000);
macio_nvram_map(nvr, 0xFFF04000);
/* No PCI init: the BIOS will do it */
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_MAC99);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
void on_program_start()
{
EVENT_TRACE(fprintf(stderr, "%d: on_program_start\n", this_node));
/* tell Electric fence that we do realloc(0) on purpose. */
#ifdef EFENCE
extern int EF_ALLOW_MALLOC_0;
EF_ALLOW_MALLOC_0 = 1;
#endif
register_sigint_handler();
if (this_node == 0) {
/* master node */
#ifdef FORCE_CORE
/* core should be the last exit handler (process dies) */
atexit(core);
#endif
atexit(mpi_stop);
}
#ifdef CUDA
cuda_init();
#endif
/*
call the initialization of the modules here
*/
init_random();
init_bit_random();
init_node_grid();
/* calculate initial minimimal number of cells (see tclcallback_min_num_cells) */
min_num_cells = calc_processor_min_num_cells();
/* initially go for domain decomposition */
dd_topology_init(&local_cells);
ghost_init();
/* Initialise force and energy tables */
force_and_energy_tables_init();
#ifdef P3M
p3m_pre_init();
#endif
#ifdef DP3M
dp3m_pre_init();
#endif
external_potential_pre_init();
#ifdef LB_GPU
if(this_node == 0){
// lb_pre_init_gpu();
}
#endif
#ifdef LB
lb_pre_init();
#endif
#ifdef CATALYTIC_REACTIONS
reaction.eq_rate=0.0;
reaction.sing_mult=0;
#endif
/*
call all initializations to do only on the master node here.
*/
if (this_node == 0) {
/* interaction_data.c: make sure 0<->0 ia always exists */
make_particle_type_exist(0);
}
}
static void
cuda_attach(device_t parent, device_t dev, void *aux)
{
struct confargs *ca = aux;
struct cuda_softc *sc = device_private(dev);
struct i2cbus_attach_args iba;
static struct cuda_attach_args caa;
int irq = ca->ca_intr[0];
int node, i, child;
char name[32];
sc->sc_dev = dev;
node = of_getnode_byname(OF_parent(ca->ca_node), "extint-gpio1");
if (node)
OF_getprop(node, "interrupts", &irq, 4);
printf(" irq %d: ", irq);
sc->sc_node = ca->ca_node;
sc->sc_memt = ca->ca_tag;
sc->sc_sent = 0;
sc->sc_received = 0;
sc->sc_waiting = 0;
sc->sc_polling = 0;
sc->sc_state = CUDA_NOTREADY;
sc->sc_error = 0;
sc->sc_i2c_read_len = 0;
if (bus_space_map(sc->sc_memt, ca->ca_reg[0] + ca->ca_baseaddr,
ca->ca_reg[1], 0, &sc->sc_memh) != 0) {
printf("%s: unable to map registers\n", dev->dv_xname);
return;
}
sc->sc_ih = intr_establish(irq, IST_EDGE, IPL_TTY, cuda_intr, sc);
printf("\n");
for (i = 0; i < 16; i++) {
sc->sc_handlers[i].handler = NULL;
sc->sc_handlers[i].cookie = NULL;
}
cuda_init(sc);
/* now attach children */
config_interrupts(dev, cuda_final);
cuda_set_handler(sc, CUDA_ERROR, cuda_error_handler, sc);
cuda_set_handler(sc, CUDA_PSEUDO, cuda_todr_handler, sc);
child = OF_child(ca->ca_node);
while (child != 0) {
if (OF_getprop(child, "name", name, 32) == 0)
continue;
if (strncmp(name, "adb", 4) == 0) {
cuda_set_handler(sc, CUDA_ADB, cuda_adb_handler, sc);
sc->sc_adbops.cookie = sc;
sc->sc_adbops.send = cuda_adb_send;
sc->sc_adbops.poll = cuda_adb_poll;
sc->sc_adbops.autopoll = cuda_autopoll;
sc->sc_adbops.set_handler = cuda_adb_set_handler;
config_found_ia(dev, "adb_bus", &sc->sc_adbops,
nadb_print);
} else if (strncmp(name, "rtc", 4) == 0) {
sc->sc_todr.todr_gettime = cuda_todr_get;
sc->sc_todr.todr_settime = cuda_todr_set;
sc->sc_todr.cookie = sc;
todr_attach(&sc->sc_todr);
}
child = OF_peer(child);
}
caa.cookie = sc;
caa.set_handler = cuda_set_handler;
caa.send = cuda_send;
caa.poll = cuda_poll;
#if notyet
config_found(dev, &caa, cuda_print);
#endif
mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
iba.iba_tag = &sc->sc_i2c;
sc->sc_i2c.ic_cookie = sc;
sc->sc_i2c.ic_acquire_bus = cuda_i2c_acquire_bus;
sc->sc_i2c.ic_release_bus = cuda_i2c_release_bus;
sc->sc_i2c.ic_send_start = NULL;
sc->sc_i2c.ic_send_stop = NULL;
sc->sc_i2c.ic_initiate_xfer = NULL;
sc->sc_i2c.ic_read_byte = NULL;
sc->sc_i2c.ic_write_byte = NULL;
sc->sc_i2c.ic_exec = cuda_i2c_exec;
config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
if (cuda0 == NULL)
cuda0 = &caa;
}
void grecon(struct grecon_conf* param, const long dims1[DIMS], complex float* out1,
const long cov1_dims[DIMS], complex float* cov1,
const long w1_dims[DIMS], const complex float* weights,
complex float* kspace1, bool usegpu)
{
struct sense_conf* conf = param->sense_conf;
long ksp1_dims[DIMS];
md_select_dims(DIMS, ~MAPS_FLAG, ksp1_dims, dims1);
long pat1_dims[DIMS];
const complex float* pattern;
if (NULL == weights) {
md_select_dims(DIMS, ~(COIL_FLAG | MAPS_FLAG), pat1_dims, dims1);
complex float* tpattern = md_alloc(DIMS, pat1_dims, CFL_SIZE);
estimate_pattern(DIMS, ksp1_dims, COIL_DIM, tpattern, kspace1);
pattern = tpattern;
} else {
md_copy_dims(DIMS, pat1_dims, w1_dims);
pattern = weights;
}
complex float* sens1;
if (NULL != param->calib) {
long img1_dims[DIMS];
md_select_dims(DIMS, ~COIL_FLAG, img1_dims, dims1);
complex float* maps1 = md_alloc(DIMS, img1_dims, CFL_SIZE);
sens1 = md_alloc(DIMS, dims1, CFL_SIZE);
caltwo(param->calib, dims1, sens1, maps1, cov1_dims, cov1, NULL, NULL);
crop_sens(dims1, sens1, param->calib->softcrop, param->calib->crop, maps1);
fixphase(DIMS, dims1, COIL_DIM, sens1, sens1);
md_free(maps1);
} else {
sens1 = cov1;
}
if (NOIR == param->algo) {
assert(NULL == param->calib);
assert(1 == dims1[MAPS_DIM]);
sens1 = md_alloc(DIMS, dims1, CFL_SIZE);
md_clear(DIMS, dims1, sens1, CFL_SIZE);
fftmod(DIMS, ksp1_dims, FFT_FLAGS, kspace1, kspace1);
}
fftmod(DIMS, dims1, FFT_FLAGS, sens1, sens1);
fftmod(DIMS, ksp1_dims, FFT_FLAGS, kspace1, kspace1);
complex float* image1 = NULL;
long img1_dims[DIMS];
md_select_dims(DIMS, ~COIL_FLAG, img1_dims, dims1);
if (param->ksp && (POCS != param->algo)) {
image1 = md_alloc(DIMS, img1_dims, CFL_SIZE);
md_clear(DIMS, img1_dims, image1, CFL_SIZE);
} else {
image1 = out1;
}
#ifdef USE_CUDA
int gpun = 0;
if (usegpu) {
int nr_cuda_devices = MIN(cuda_devices(), MAX_CUDA_DEVICES);
gpun = omp_get_thread_num() % nr_cuda_devices;
cuda_init(gpun);
}
#endif
const struct operator_p_s* thresh_op = NULL;
if (param->l1wav) {
long minsize[DIMS] = { [0 ... DIMS - 1] = 1 };
minsize[0] = MIN(img1_dims[0], 16);
minsize[1] = MIN(img1_dims[1], 16);
minsize[2] = MIN(img1_dims[2], 16);
#ifndef W3
thresh_op = prox_wavethresh_create(DIMS, img1_dims, FFT_FLAGS, minsize, param->lambda, param->randshift, usegpu);
#else
unsigned int wflags = 0;
for (unsigned int i = 0; i < 3; i++)
if (1 < img1_dims[i])
wflags = MD_SET(wflags, i);
thresh_op = prox_wavelet3_thresh_create(DIMS, img1_dims, wflags, minsize, param->lambda, param->randshift);
#endif
}
static void ppc_heathrow_init (ram_addr_t ram_size,
const char *boot_device,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
MemoryRegion *sysmem = get_system_memory();
CPUState *env = NULL;
char *filename;
qemu_irq *pic, **heathrow_irqs;
int linux_boot, i;
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1);
uint32_t kernel_base, initrd_base, cmdline_base = 0;
int32_t kernel_size, initrd_size;
PCIBus *pci_bus;
MacIONVRAMState *nvr;
int bios_size;
MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
uint16_t ppc_boot_device;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
void *dbdma;
linux_boot = (kernel_filename != NULL);
/* init CPUs */
if (cpu_model == NULL)
cpu_model = "G3";
for (i = 0; i < smp_cpus; i++) {
env = cpu_init(cpu_model);
if (!env) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
/* Set time-base frequency to 16.6 Mhz */
cpu_ppc_tb_init(env, 16600000UL);
qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
}
/* allocate RAM */
if (ram_size > (2047 << 20)) {
fprintf(stderr,
"qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
memory_region_init_ram(ram, "ppc_heathrow.ram", ram_size);
vmstate_register_ram_global(ram);
memory_region_add_subregion(sysmem, 0, ram);
/* allocate and load BIOS */
memory_region_init_ram(bios, "ppc_heathrow.bios", BIOS_SIZE);
vmstate_register_ram_global(bios);
if (bios_name == NULL)
bios_name = PROM_FILENAME;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
memory_region_set_readonly(bios, true);
memory_region_add_subregion(sysmem, PROM_ADDR, bios);
/* Load OpenBIOS (ELF) */
if (filename) {
bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
1, ELF_MACHINE, 0);
g_free(filename);
} else {
bios_size = -1;
}
if (bios_size < 0 || bios_size > BIOS_SIZE) {
hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
exit(1);
}
if (linux_boot) {
uint64_t lowaddr = 0;
int bswap_needed;
#ifdef BSWAP_NEEDED
bswap_needed = 1;
#else
bswap_needed = 0;
#endif
kernel_base = KERNEL_LOAD_ADDR;
kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
if (kernel_size < 0)
kernel_size = load_aout(kernel_filename, kernel_base,
ram_size - kernel_base, bswap_needed,
TARGET_PAGE_SIZE);
if (kernel_size < 0)
kernel_size = load_image_targphys(kernel_filename,
kernel_base,
ram_size - kernel_base);
if (kernel_size < 0) {
hw_error("qemu: could not load kernel '%s'\n",
kernel_filename);
exit(1);
}
/* load initrd */
if (initrd_filename) {
initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
initrd_size = load_image_targphys(initrd_filename, initrd_base,
ram_size - initrd_base);
if (initrd_size < 0) {
hw_error("qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
cmdline_base = round_page(initrd_base + initrd_size);
} else {
initrd_base = 0;
initrd_size = 0;
cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
}
ppc_boot_device = 'm';
} else {
kernel_base = 0;
kernel_size = 0;
initrd_base = 0;
initrd_size = 0;
ppc_boot_device = '\0';
for (i = 0; boot_device[i] != '\0'; i++) {
/* TOFIX: for now, the second IDE channel is not properly
* used by OHW. The Mac floppy disk are not emulated.
* For now, OHW cannot boot from the network.
*/
#if 0
if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
ppc_boot_device = boot_device[i];
break;
}
#else
if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
ppc_boot_device = boot_device[i];
break;
}
#endif
}
if (ppc_boot_device == '\0') {
fprintf(stderr, "No valid boot device for G3 Beige machine\n");
exit(1);
}
}
/* Register 2 MB of ISA IO space */
isa_mmio_init(0xfe000000, 0x00200000);
/* XXX: we register only 1 output pin for heathrow PIC */
heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
heathrow_irqs[0] =
g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
/* Connect the heathrow PIC outputs to the 6xx bus */
for (i = 0; i < smp_cpus; i++) {
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
heathrow_irqs[i][0] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
break;
default:
hw_error("Bus model not supported on OldWorld Mac machine\n");
}
}
/* init basic PC hardware */
if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
hw_error("Only 6xx bus is supported on heathrow machine\n");
}
pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
pci_bus = pci_grackle_init(0xfec00000, pic,
get_system_memory(),
get_system_io());
pci_vga_init(pci_bus);
escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
serial_hds[1], ESCC_CLOCK, 4);
memory_region_init_alias(escc_bar, "escc-bar",
escc_mem, 0, memory_region_size(escc_mem));
for(i = 0; i < nb_nics; i++)
pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
ide_drive_get(hd, MAX_IDE_BUS);
/* First IDE channel is a MAC IDE on the MacIO bus */
dbdma = DBDMA_init(&dbdma_mem);
ide_mem[0] = NULL;
ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
/* Second IDE channel is a CMD646 on the PCI bus */
hd[0] = hd[MAX_IDE_DEVS];
hd[1] = hd[MAX_IDE_DEVS + 1];
hd[3] = hd[2] = NULL;
pci_cmd646_ide_init(pci_bus, hd, 0);
/* cuda also initialize ADB */
cuda_init(&cuda_mem, pic[0x12]);
adb_kbd_init(&adb_bus);
adb_mouse_init(&adb_bus);
nvr = macio_nvram_init(0x2000, 4);
pmac_format_nvram_partition(nvr, 0x2000);
macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem,
dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, -1);
}
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
graphic_depth = 15;
/* No PCI init: the BIOS will do it */
fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
if (kernel_cmdline) {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
}
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
if (kvm_enabled()) {
#ifdef CONFIG_KVM
uint8_t *hypercall;
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
hypercall = g_malloc(16);
kvmppc_get_hypercall(env, hypercall, 16);
fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
#endif
} else {
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
}
qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
}
/* PowerPC Mac99 hardware initialisation */
static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
const char *boot_device, DisplayState *ds,
const char *kernel_filename,
const char *kernel_cmdline,
const char *initrd_filename,
const char *cpu_model)
{
CPUState *env = NULL, *envs[MAX_CPUS];
char buf[1024];
qemu_irq *pic, **openpic_irqs;
int unin_memory;
int linux_boot, i;
unsigned long bios_offset, vga_bios_offset;
uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
PCIBus *pci_bus;
nvram_t nvram;
#if 0
MacIONVRAMState *nvr;
int nvram_mem_index;
#endif
m48t59_t *m48t59;
int vga_bios_size, bios_size;
qemu_irq *dummy_irq;
int pic_mem_index, dbdma_mem_index, cuda_mem_index;
int ide_mem_index[2];
int ppc_boot_device;
int index;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
linux_boot = (kernel_filename != NULL);
/* init CPUs */
if (cpu_model == NULL)
cpu_model = "default";
for (i = 0; i < smp_cpus; i++) {
env = cpu_init(cpu_model);
if (!env) {
fprintf(stderr, "Unable to find PowerPC CPU definition\n");
exit(1);
}
/* Set time-base frequency to 100 Mhz */
cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
#if 0
env->osi_call = vga_osi_call;
#endif
qemu_register_reset(&cpu_ppc_reset, env);
register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
envs[i] = env;
}
if (env->nip < 0xFFF80000) {
/* Special test for PowerPC 601:
* the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
* But the NVRAM is located at 0xFFF04000...
*/
cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
}
/* allocate RAM */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
/* allocate and load BIOS */
bios_offset = ram_size + vga_ram_size;
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
bios_size = load_image(buf, phys_ram_base + bios_offset);
if (bios_size < 0 || bios_size > BIOS_SIZE) {
cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
exit(1);
}
bios_size = (bios_size + 0xfff) & ~0xfff;
if (bios_size > 0x00080000) {
/* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
}
cpu_register_physical_memory((uint32_t)(-bios_size),
bios_size, bios_offset | IO_MEM_ROM);
/* allocate and load VGA BIOS */
vga_bios_offset = bios_offset + bios_size;
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
if (vga_bios_size < 0) {
/* if no bios is present, we can still work */
fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
vga_bios_size = 0;
} else {
/* set a specific header (XXX: find real Apple format for NDRV
drivers) */
phys_ram_base[vga_bios_offset] = 'N';
phys_ram_base[vga_bios_offset + 1] = 'D';
phys_ram_base[vga_bios_offset + 2] = 'R';
phys_ram_base[vga_bios_offset + 3] = 'V';
cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
vga_bios_size);
vga_bios_size += 8;
}
vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
if (linux_boot) {
kernel_base = KERNEL_LOAD_ADDR;
/* now we can load the kernel */
kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
if (kernel_size < 0) {
cpu_abort(env, "qemu: could not load kernel '%s'\n",
kernel_filename);
exit(1);
}
/* load initrd */
if (initrd_filename) {
initrd_base = INITRD_LOAD_ADDR;
initrd_size = load_image(initrd_filename,
phys_ram_base + initrd_base);
if (initrd_size < 0) {
cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
initrd_filename);
exit(1);
}
} else {
initrd_base = 0;
initrd_size = 0;
}
ppc_boot_device = 'm';
} else {
kernel_base = 0;
kernel_size = 0;
initrd_base = 0;
initrd_size = 0;
ppc_boot_device = '\0';
/* We consider that NewWorld PowerMac never have any floppy drive
* For now, OHW cannot boot from the network.
*/
for (i = 0; boot_device[i] != '\0'; i++) {
if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
ppc_boot_device = boot_device[i];
break;
}
}
if (ppc_boot_device == '\0') {
fprintf(stderr, "No valid boot device for Mac99 machine\n");
exit(1);
}
}
isa_mem_base = 0x80000000;
/* Register 8 MB of ISA IO space */
isa_mmio_init(0xf2000000, 0x00800000);
/* UniN init */
unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
openpic_irqs[0] =
qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
for (i = 0; i < smp_cpus; i++) {
/* Mac99 IRQ connection between OpenPIC outputs pins
* and PowerPC input pins
*/
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
break;
#if defined(TARGET_PPC64)
case PPC_FLAGS_INPUT_970:
openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
openpic_irqs[i][OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
/* Not connected ? */
openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
break;
#endif /* defined(TARGET_PPC64) */
default:
cpu_abort(env, "Bus model not supported on mac99 machine\n");
exit(1);
}
}
pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
pci_bus = pci_pmac_init(pic);
/* init basic PC hardware */
pci_vga_init(pci_bus, ds, phys_ram_base + ram_size,
ram_size, vga_ram_size,
vga_bios_offset, vga_bios_size);
/* XXX: suppress that */
dummy_irq = i8259_init(NULL);
/* XXX: use Mac Serial port */
serial_init(0x3f8, dummy_irq[4], 115200, serial_hds[0]);
for(i = 0; i < nb_nics; i++) {
if (!nd_table[i].model)
nd_table[i].model = "ne2k_pci";
pci_nic_init(pci_bus, &nd_table[i], -1);
}
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
fprintf(stderr, "qemu: too many IDE bus\n");
exit(1);
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
if (index != -1)
hd[i] = drives_table[index].bdrv;
else
hd[i] = NULL;
}
#if 1
ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13]);
ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14]);
#else
pci_cmd646_ide_init(pci_bus, &hd[0], 0);
#endif
/* cuda also initialize ADB */
cuda_init(&cuda_mem_index, pic[0x19]);
adb_kbd_init(&adb_bus);
adb_mouse_init(&adb_bus);
dbdma_init(&dbdma_mem_index);
macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index,
cuda_mem_index, NULL, 2, ide_mem_index);
if (usb_enabled) {
usb_ohci_init_pci(pci_bus, 3, -1);
}
if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
graphic_depth = 15;
#if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
/* The NewWorld NVRAM is not located in the MacIO device */
nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
pmac_format_nvram_partition(nvr, 0x2000);
macio_nvram_map(nvr, 0xFFF04000);
nvram.opaque = nvr;
nvram.read_fn = &macio_nvram_read;
nvram.write_fn = &macio_nvram_write;
#else
m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
nvram.opaque = m48t59;
nvram.read_fn = &m48t59_read;
nvram.write_fn = &m48t59_write;
#endif
PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
ppc_boot_device, kernel_base, kernel_size,
kernel_cmdline,
initrd_base, initrd_size,
/* XXX: need an option to load a NVRAM image */
0,
graphic_width, graphic_height, graphic_depth);
/* No PCI init: the BIOS will do it */
/* Special port to get debug messages from Open-Firmware */
register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
}