static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; char c; cyg_uint8 lsr; CYGARC_HAL_SAVE_GP(); cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; HAL_READ_UINT8(chan->base+CYG_DEV_LSR, lsr); if ( (lsr & SIO_LSR_DR) != 0 ) { HAL_READ_UINT8(chan->base+CYG_DEV_RBR, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { channel_data_t* chan = (channel_data_t*)__ch_data; cyg_uint8 iir; int res = 0; CYGARC_HAL_SAVE_GP(); HAL_READ_UINT8(chan->base+PXA2X0_UART_IIR, iir); iir &= PXA2X0_UART_IIR_ID_MASK; *__ctrlc = 0; if ( iir == 0x04 ) { cyg_uint8 c, lsr; HAL_READ_UINT8(chan->base+PXA2X0_UART_LSR, lsr); if (lsr & PXA2X0_UART_LSR_DR) { HAL_READ_UINT8(chan->base+PXA2X0_UART_RBR, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; } // Acknowledge the interrupt HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; volatile cyg_uint32* pulBase = chan->pulBase; char c; cyg_uint32 status; CYGARC_HAL_SAVE_GP(); cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; status = pulBase[REL_Adr_uartfr / sizeof(cyg_uint32)]; if(RX_DATA(status)) { c = (cyg_uint8)(pulBase[REL_Adr_uartdr / sizeof(cyg_uint32)] & 0xFF); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
//=========================================================================== // Serial channel ISR //=========================================================================== static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; cyg_uint8 c; cyg_uint8 iir; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT32(chan->base + CYGARC_HAL_LPC24XX_REG_UxIIR, iir); if((iir & (CYGARC_HAL_LPC24XX_REG_UxIIR_IIR0 | CYGARC_HAL_LPC24XX_REG_UxIIR_IIR1 | CYGARC_HAL_LPC24XX_REG_UxIIR_IIR2)) == CYGARC_HAL_LPC24XX_REG_UxIIR_IIR2) { // Rx data available or character timeout // Read data in order to clear interrupt HAL_READ_UINT32(chan->base + CYGARC_HAL_LPC24XX_REG_UxRBR, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; cyg_uint16 status; cyg_uint16 control; cyg_uint16 * base = ((channel_data_t *)__ch_data)->base; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT16(base+CYG_DEV_SERIAL_RS232_SCSR, status); HAL_READ_UINT16(base+CYG_DEV_SERIAL_RS232_SCCR1, control); if((status & SCSR_RDRF) && (control & SCCR1_RIE)) { // Only if the interrupt was caused by the channel cyg_uint8 c; c = cyg_hal_plf_serial_getc(__ch_data); if(cyg_hal_is_break(&c, 1)) *__ctrlc = 1; HAL_INTERRUPT_ACKNOWLEDGE(((channel_data_t *)__ch_data)->imb3_vector); res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int CYGOPT_HAL_KINETIS_DIAG_FLASH_SECTION_ATTR cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { channel_data_t* chan = (channel_data_t*)__ch_data; CYG_ADDRESS uart_p = (CYG_ADDRESS) chan->base; cyg_uint8 uart_s1; int res = 0; cyg_uint8 ch_in; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT8(uart_p + CYGHWR_DEV_FREESCALE_UART_S1, uart_s1); if (uart_s1 & CYGHWR_DEV_FREESCALE_UART_S1_RDRF) { HAL_READ_UINT8(uart_p + CYGHWR_DEV_FREESCALE_UART_D, ch_in); if( cyg_hal_is_break( (char *) &ch_in , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); CYGARC_HAL_RESTORE_GP(); return res; }
static void cyg_hal_plf_serial_isr_handler(channel_data_t *chan, int event, int len) { int res; char ch; *chan->ctrlc = 0; switch (event) { case XUN_EVENT_RECV_ERROR: case XUN_EVENT_RECV_TIMEOUT: case XUN_EVENT_MODEM: diag_printf("%s.%d - chan: %p, event: %d\n", __FUNCTION__, __LINE__, chan, event); break; case XUN_EVENT_RECV_DATA: res = XUartNs550_Recv(&chan->dev, &ch, 1); if (cyg_hal_is_break(&ch , 1)) *chan->ctrlc = 1; break; case XUN_EVENT_SENT_DATA: return; default: break; } }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; char c; cyg_uint32 status; CYGARC_HAL_SAVE_GP(); cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; status = GET_STATUS(chan->base); if ( RX_DATA(status) ) { c = GET_CHAR(chan->base); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_duart_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { channel_data_t* chan = (channel_data_t*)__ch_data; uart_width _iir; int res = 0; CYGARC_HAL_SAVE_GP(); HAL_READ_UINT_UART(chan->base+CYG_DEV_SERIAL_IIR, _iir); _iir &= SIO_IIR_ID_MASK; *__ctrlc = 0; if ( ISR_Rx == _iir ) { uart_width c, lsr; cyg_uint8 c8; HAL_READ_UINT_UART(chan->base+CYG_DEV_SERIAL_LSR, lsr); if (lsr & SIO_LSR_DR) { HAL_READ_UINT_UART(chan->base+CYG_DEV_SERIAL_RHR, c); c8 = (cyg_uint8) (c & 0x00FF); if (cyg_hal_is_break( &c8 , 1 )) *__ctrlc = 1; } // Acknowledge the interrupt HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_screen_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; char c; CYGARC_HAL_SAVE_GP(); cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; if ( KeyboardTest() ) { c = KBPending; KBPending = 0xFF; if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD vector, CYG_ADDRWORD __data) { int res = 0; cyg_uint32 iir; cyg_uint8 c; channel_data_t* chan; CYGARC_HAL_SAVE_GP(); // Some of the diagnostic print code calls through here with no idea what the ch_data is. // Go ahead and assume it is channels[0]. if (__ch_data == 0) __ch_data = (void*)&channels[0]; chan = (channel_data_t*)__ch_data; HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); iir = RA_UART_REG(chan->base, UART_IIR) & UART_IIR_ID_MASK; *__ctrlc = 0; if ((iir == UART_IIR_RX_AVIL) || (iir == UART_IIR_RX_TIMEOUT)) { c = RA_UART_REG(chan->base, UART_IIR) & 0xFF; if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; cyg_uint8 c; cyg_uint8 stat; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT32(chan->base+CYGARC_HAL_LPC2XXX_REG_UxLSR, stat); if ( (stat & CYGARC_HAL_LPC2XXX_REG_UxLSR_RDR) != 0 ) { HAL_READ_UINT32(chan->base+CYGARC_HAL_LPC2XXX_REG_UxRBR, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_sci_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { cyg_uint8 c, sr; cyg_uint8* base = ((channel_data_t*)__ch_data)->base; int res = 0; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT8(base+_REG_SCSSR, sr); if (sr & CYGARC_REG_SCI_SCSSR_ORER) { // Serial RX overrun. Clear error and hope protocol recovers. HAL_WRITE_UINT8(base+_REG_SCSSR, CYGARC_REG_SCI_SCSSR_CLEARMASK & ~CYGARC_REG_SCI_SCSSR_ORER); res = CYG_ISR_HANDLED; } else if (sr & CYGARC_REG_SCI_SCSSR_RDRF) { // Received character HAL_READ_UINT8(base+_REG_SCRDR, c); // Clear buffer full flag. HAL_WRITE_UINT8(base+_REG_SCSSR, CYGARC_REG_SCI_SCSSR_CLEARMASK & ~CYGARC_REG_SCI_SCSSR_RDRF); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; cyg_uint8 eir, c; channel_data_t* chan = (channel_data_t*)__ch_data; CYGARC_HAL_SAVE_GP(); HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); HAL_READ_UINT8(chan->base+CYG_DEVICE_BK0_EIR, eir); *__ctrlc = 0; if( (eir & CYG_DEVICE_BK0_EIR_mask) == CYG_DEVICE_BK0_EIR_IRQ_RX ) { HAL_READ_UINT8(chan->base+CYG_DEVICE_BK0_RXD, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; cyg_uint32 c; cyg_uint8 ch; cyg_uint32 stat; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT32(chan->base+AT91_US_CSR, stat); if ( (stat & AT91_US_CSR_RxRDY) != 0 ) { HAL_READ_UINT32(chan->base+AT91_US_RHR, c); ch = (cyg_uint8)(c & 0xff); if( cyg_hal_is_break( &ch , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; cyg_uint8* base = ((channel_data_t*)__ch_data)->base; char c; cyg_uint32 lsr, _c; CYGARC_HAL_SAVE_GP(); cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; HAL_READ_UINT32(base+AAEC_UART_STATUS, lsr); if ( (lsr & AAEC_UART_STATUS_RxFE) != 0 ) { HAL_READ_UINT32(base+AAEC_UART_DATA, _c); c = (char)_c; if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { channel_data_t* chan = (channel_data_t*)__ch_data; CYG_ADDRESS esci_base = (CYG_ADDRESS) chan->base; cyg_uint16 esci_sr; int res = 0; cyg_uint8 ch_in; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT16(FREESCALE_ESCI_SR(esci_base), esci_sr); if (esci_sr & FREESCALE_ESCI_SR_RDRF) { HAL_READ_UINT8(FREESCALE_ESCI_DRL(esci_base), ch_in); if( cyg_hal_is_break( (char *) &ch_in , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; HAL_WRITE_UINT16(FREESCALE_ESCI_SR(esci_base), FREESCALE_ESCI_SR_RDRF); } HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_scif_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { cyg_uint8 c; cyg_uint16 fdr, sr; cyg_uint8* base = ((channel_data_t*)__ch_data)->base; int res = 0; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; HAL_READ_UINT16(base+_REG_SCFDR, fdr); if ((fdr & CYGARC_REG_SCIF_SCFDR_RCOUNT_MASK) != 0) { HAL_READ_UINT8(base+_REG_SCFRDR, c); // Clear buffer full flag (read back first). HAL_READ_UINT16(base+_REG_SCSSR, sr); HAL_WRITE_UINT16(base+_REG_SCSSR, CYGARC_REG_SCIF_SCSSR_CLEARMASK & ~CYGARC_REG_SCIF_SCSSR_RDF); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; cyg_uint8 _iir, c; channel_data_t* chan; CYGARC_HAL_SAVE_GP(); // Some of the diagnostic print code calls through here with no idea what the ch_data is. // Go ahead and assume it is channels[0]. if (__ch_data == 0) __ch_data = (void*)&channels[0]; chan = (channel_data_t*)__ch_data; HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); HAL_READ_UINT8(chan->base + SER_16550_IIR, _iir); _iir &= SIO_IIR_ID_MASK; *__ctrlc = 0; if ((_iir == ISR_Rx_Avail) || (_iir == ISR_Rx_Char_Timeout)) { HAL_READ_UINT8(chan->base + SER_16550_RBR, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; char c; cyg_uint32 lsr; CYGARC_HAL_SAVE_GP(); cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; HAL_READ_UINT32(chan->base+OFS_UFSTAT, lsr); if (lsr & 0x0f) { HAL_READ_UINT8(chan->base+OFS_URXH, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static void gdb_diag_write_char(char c) { static char line[100]; static int pos = 0; // No need to send CRs if( c == '\r' ) return; line[pos++] = c; if( c == '\n' || pos == sizeof(line) ) { while (1) { static char hex[] = "0123456789ABCDEF"; cyg_uint8 csum = 0; int i; hal_diag_write_char_serial('$'); hal_diag_write_char_serial('O'); csum += 'O'; for( i = 0; i < pos; i++ ) { char ch = line[i]; char h = hex[(ch>>4)&0xF]; char l = hex[ch&0xF]; hal_diag_write_char_serial(h); hal_diag_write_char_serial(l); csum += h; csum += l; } hal_diag_write_char_serial('#'); hal_diag_write_char_serial(hex[(csum>>4)&0xF]); hal_diag_write_char_serial(hex[csum&0xF]); { char c1; hal_diag_read_char_serial( &c1 ); if( c1 == '+' ) break; if( cyg_hal_is_break( &c1, 1 ) ) cyg_hal_user_break( NULL ); } } pos = 0; } }
static int cyg_hal_sccx_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { EPPC *eppc = eppc_base(); volatile struct cp_bufdesc *bd; struct port_info *info = (struct port_info *)__ch_data; volatile struct scc_regs *regs = (volatile struct scc_regs *)((char *)eppc + info->regs); volatile struct uart_pram *uart_pram = (volatile struct uart_pram *)((char *)eppc + info->pram); char ch; int res = 0; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; if (regs->scc_scce & QUICC_SMCE_RX) { regs->scc_scce = QUICC_SMCE_RX; /* rx buffer descriptors */ bd = info->next_rxbd; if ((bd->ctrl & QUICC_BD_CTL_Ready) == 0) { // then there be a character waiting ch = bd->buffer[0]; bd->length = 1; bd->ctrl |= QUICC_BD_CTL_Ready | QUICC_BD_CTL_Int; if (bd->ctrl & QUICC_BD_CTL_Wrap) { bd = (struct cp_bufdesc *)((char *)eppc + uart_pram->rbase); } else { bd++; } info->next_rxbd = bd; if( cyg_hal_is_break( &ch , 1 ) ) *__ctrlc = 1; } // Interrupt handled. Acknowledge it. HAL_INTERRUPT_ACKNOWLEDGE(info->intnum); res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; volatile struct _gps4020_uart *uart = ((channel_data_t*)__ch_data)->base; char c; cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; if ((uart->status & SSR_RxFull) != 0) { c = uart->TxRx; if (cyg_hal_is_break(&c, 1)) *__ctrlc = 1; res = CYG_ISR_HANDLED; } return res; }
cyg_uint32 hal_ctrlc_isr(CYG_ADDRWORD vector, CYG_ADDRWORD data) { char c; cyg_uint16 sr; HAL_INTERRUPT_ACKNOWLEDGE( CYGHWR_HAL_GDB_PORT_VECTOR ); HAL_READ_UINT16( SERIAL_SR, sr ); if( sr & SIO_LSTAT_RRDY ) { HAL_READ_UINT8( SERIAL_RXR, c); if( cyg_hal_is_break( &c , 1 ) ) cyg_hal_user_break( (CYG_ADDRWORD *)hal_saved_interrupt_state ); } return 1; }
static int cyg_hal_plf_smcx_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { struct port_info *info = (struct port_info *)__ch_data; volatile struct smc_regs_8260 *regs = (volatile struct smc_regs_8260*)((char *)IMM + info->regs); t_Smc_Pram *pram = (t_Smc_Pram *)((char *)IMM + info->pram); char ch; int res = 0; volatile struct cp_bufdesc *bd; *__ctrlc = 0; if (regs->smc_smce & SMCE_Rx) { regs->smc_smce = SMCE_Rx; /* rx buffer descriptors */ bd = info->next_rxbd; if ((bd->ctrl & _BD_CTL_Ready) == 0) { // then there be a character waiting ch = bd->buffer[0]; bd->length = 1; bd->ctrl |= _BD_CTL_Ready | _BD_CTL_Int; if (bd->ctrl & _BD_CTL_Wrap) { bd = (struct cp_bufdesc *)((char *)IMM + pram->rbase); } else { bd++; } info->next_rxbd = bd; if( cyg_hal_is_break( &ch , 1 ) ) *__ctrlc = 1; } // Interrupt handled. Acknowledge it. HAL_INTERRUPT_ACKNOWLEDGE(info->intnum); res = CYG_ISR_HANDLED; } return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; cyg_uint8 _iir, c; channel_data_t* chan; CYGARC_HAL_SAVE_GP(); // Some of the diagnostic print code calls through here with no idea what the ch_data is. // Go ahead and assume it is channels[0]. if (__ch_data == 0) __ch_data = (void*)&channels[0]; chan = (channel_data_t*)__ch_data; HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); HAL_READ_UINT8(chan->base + SER_16550_IIR, _iir); _iir &= SIO_IIR_ID_MASK; *__ctrlc = 0; if ((_iir == ISR_Rx_Avail) || (_iir == ISR_Rx_Char_Timeout)) { HAL_READ_UINT8(chan->base + SER_16550_RBR, c); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } /* sfurman - Hmmm. Under or1ksim, we sometimes receive interrupts when no characters are in the FIFO. I think this is a SW bug and not a problem w/ or1ksim, but until the problem is solved, we always consume the interrupt */ res = CYG_ISR_HANDLED; CYGARC_HAL_RESTORE_GP(); return res; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { volatile unsigned char *RxDATA = (volatile unsigned char *)V850_REG_RXB0; cyg_uint8 c; int res = 0; CYGARC_HAL_SAVE_GP(); c = (char)*RxDATA; *__ctrlc = 0; if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; cyg_drv_interrupt_acknowledge(CYGNUM_HAL_VECTOR_INTCSI1); res = CYG_ISR_HANDLED; CYGARC_HAL_RESTORE_GP(); return res; }
static int hal_a2fxxx_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { channel_data_t* chan = (channel_data_t*)__ch_data; cyg_uint8 ch; CYGARC_HAL_SAVE_GP(); *__ctrlc = 0; if( hal_a2fxxx_serial_getc_nonblock(__ch_data, &ch) ) { if( cyg_hal_is_break( (char *)&ch , 1 ) ) *__ctrlc = 1; } HAL_INTERRUPT_ACKNOWLEDGE(chan->isr_vector); CYGARC_HAL_RESTORE_GP(); return 1; }
static int cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc, CYG_ADDRWORD __vector, CYG_ADDRWORD __data) { int res = 0; channel_data_t* chan = (channel_data_t*)__ch_data; char c; CYGARC_HAL_SAVE_GP(); cyg_drv_interrupt_acknowledge(chan->isr_vector); *__ctrlc = 0; if ((chan->base->stat & SYSFLG1_URXFE1) == 0) { c = (cyg_uint8)(chan->base->data.read & 0xFF); if( cyg_hal_is_break( &c , 1 ) ) *__ctrlc = 1; res = CYG_ISR_HANDLED; } CYGARC_HAL_RESTORE_GP(); return res; }
static void cyg_hal_diag_mangler_gdb_flush(void* __ch_data) { CYG_INTERRUPT_STATE old; hal_virtual_comm_table_t* __chan = CYGACC_CALL_IF_DEBUG_PROCS(); #if CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES != 0 int tries = CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES; #endif // Nothing to do if mangler buffer is empty. if (__mangler_pos == 0) return; // Disable interrupts. This prevents GDB trying to interrupt us // while we are in the middle of sending a packet. The serial // receive interrupt will be seen when we re-enable interrupts // later. #if defined(CYG_HAL_STARTUP_ROM) \ || !defined(CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION) HAL_DISABLE_INTERRUPTS(old); #else CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old); #endif #if CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES != 0 // Only wait 500ms for data to arrive - avoid "stuck" connections CYGACC_COMM_IF_CONTROL(*__chan, __COMMCTL_SET_TIMEOUT, CYGNUM_HAL_DEBUG_GDB_PROTOCOL_TIMEOUT); #endif while(1) { static const char hex[] = "0123456789ABCDEF"; cyg_uint8 csum = 0; char c1; int i; CYGACC_COMM_IF_PUTC(*__chan, '$'); CYGACC_COMM_IF_PUTC(*__chan, 'O'); csum += 'O'; for( i = 0; i < __mangler_pos; i++ ) { char ch = __mangler_line[i]; char h = hex[(ch>>4)&0xF]; char l = hex[ch&0xF]; CYGACC_COMM_IF_PUTC(*__chan, h); CYGACC_COMM_IF_PUTC(*__chan, l); csum += h; csum += l; } CYGACC_COMM_IF_PUTC(*__chan, '#'); CYGACC_COMM_IF_PUTC(*__chan, hex[(csum>>4)&0xF]); CYGACC_COMM_IF_PUTC(*__chan, hex[csum&0xF]); nak: #if CYGNUM_HAL_DEBUG_GDB_PROTOCOL_RETRIES != 0 if (CYGACC_COMM_IF_GETC_TIMEOUT(*__chan, &c1) == 0) { c1 = '-'; if (tries && (--tries == 0)) c1 = '+'; } #else c1 = CYGACC_COMM_IF_GETC(*__chan); #endif if( c1 == '+' ) break; if( cyg_hal_is_break( &c1 , 1 ) ) { // Caller's responsibility to react on this. CYGACC_CALL_IF_CONSOLE_INTERRUPT_FLAG_SET(1); break; } if( c1 != '-' ) goto nak; } __mangler_pos = 0; // And re-enable interrupts #if defined(CYG_HAL_STARTUP_ROM) \ || !defined(CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION) HAL_RESTORE_INTERRUPTS(old); #else CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old); #endif }