int
__isNaN(double d)
{
uvlong x;
x = d2u(d);
/* IEEE 754: exponent bits 0x7FF and non-zero mantissa */
return (x&uvinf) == uvinf && (x&~uvneginf) != 0;
}
// timer callback; used to wrest control of the system
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
static const UINT32 sample_instructions[] =
{
0x3d40f900, // li r10,0xf9000000
0x394af000, // addi r10,r10,-0x1000
0x38600146, // li r3,0x00000146
0x38800004, // li r4,0x00000004
0x7c64572c, // sthbrx r3,r4,r10
0x38600000, // li r3,0x00000000
0x986a0070 // stb r3,0x0070(r10)
};
// iterate over instructions
for (int instnum = 0; instnum < ARRAY_LENGTH(sample_instructions); instnum++)
{
// write the instruction to execute, followed by a BLR which will terminate the
// basic block in the DRC
m_space->write_dword(RAM_BASE, sample_instructions[instnum]);
m_space->write_dword(RAM_BASE + 4, 0x4e800020);
// initialize the register state
m_cpu->set_state_int(PPC_PC, RAM_BASE);
for (int regnum = 0; regnum < 32; regnum++)
m_cpu->set_state_int(PPC_R0 + regnum, regnum | (regnum << 8) | (regnum << 16) | (regnum << 24));
m_cpu->set_state_int(PPC_CR, 0);
m_cpu->set_state_int(PPC_LR, 0x12345678);
m_cpu->set_state_int(PPC_CTR, 0x1000);
m_cpu->set_state_int(PPC_XER, 0);
for (int regnum = 0; regnum < 32; regnum++)
{
double value = double(regnum | (regnum << 8) | (regnum << 16) | (regnum << 24));
m_cpu->set_state_int(PPC_F0 + regnum, d2u(value));
}
// output initial state
printf("==================================================\n");
printf("Initial state:\n");
dump_state(true);
// execute one instruction
*m_cpu->m_icountptr = 0;
m_cpu->run();
// dump the final register state
printf("Final state:\n");
dump_state(false);
}
// all done; just bail
throw emu_fatalerror(0, "All done");
}
int
__isInf(double d, int sign)
{
uvlong x;
x = d2u(d);
if(sign == 0)
return x==uvinf || x==uvneginf;
else if(sign > 0)
return x==uvinf;
else
return x==uvneginf;
}
