int create_link_hdmi(struct decon_device *decon)
{
int i, ret = 0;
int n_pad = decon->n_sink_pad + decon->n_src_pad;
int flags = 0;
char err[80];
if (!strcmp(decon->output_sd->name, "s5p-hdmi-sd"))
flags = MEDIA_LNK_FL_ENABLED;
for (i = decon->n_sink_pad; i < n_pad ; i++) {
ret = media_entity_create_link(&decon->sd.entity, i,
&decon->output_sd->entity, 0, flags);
if (ret) {
snprintf(err, sizeof(err), "%s --> %s",
decon->sd.entity.name,
decon->output_sd->entity.name);
return ret;
}
decon_info("%s[%d] --> [0]%s link is created successfully\n",
decon->sd.entity.name, i,
decon->output_sd->entity.name);
}
return ret;
}
void decon_to_init_param(struct decon_device *decon, struct decon_init_param *p)
{
struct decon_lcd *lcd_info = decon->lcd_info;
struct v4l2_mbus_framefmt mbus_fmt;
int ret = 0;
mbus_fmt.width = 0;
mbus_fmt.height = 0;
mbus_fmt.code = 0;
mbus_fmt.field = 0;
mbus_fmt.colorspace = 0;
if (decon->out_type == DECON_OUT_HDMI) {
ret = v4l2_subdev_call(decon->output_sd, video, g_mbus_fmt,
&mbus_fmt);
if (ret)
decon_warn("failed to get mbus_fmt for hdmi\n");
p->lcd_info = find_porch(mbus_fmt);
decon_info("find porch %dx%d@%dHz\n", p->lcd_info->xres,
p->lcd_info->yres, p->lcd_info->fps);
} else {
p->lcd_info = lcd_info;
}
decon->lcd_info = p->lcd_info;
p->psr.psr_mode = decon->pdata->psr_mode;
p->psr.trig_mode = decon->pdata->trig_mode;
p->psr.out_type = decon->out_type;
p->nr_windows = decon->pdata->max_win;
}
int decon_t_set_lcd_info(struct decon_device *decon)
{
struct decon_lcd *lcd_info;
if (decon->lcd_info != NULL)
return 0;
lcd_info = kzalloc(sizeof(struct decon_lcd), GFP_KERNEL);
if (!lcd_info) {
decon_err("could not allocate decon_lcd for wb\n");
return -ENOMEM;
}
decon->lcd_info = lcd_info;
decon->lcd_info->width = 1920;
decon->lcd_info->height = 1080;
decon->lcd_info->xres = 1920;
decon->lcd_info->yres = 1080;
decon->lcd_info->vfp = 2;
decon->lcd_info->vbp = 20;
decon->lcd_info->hfp = 20;
decon->lcd_info->hbp = 20;
decon->lcd_info->vsa = 2;
decon->lcd_info->hsa = 20;
decon->lcd_info->fps = 60;
decon->pdata->out_type = DECON_OUT_WB;
decon_info("decon_%d output size for writeback %dx%d\n", decon->id,
decon->lcd_info->width, decon->lcd_info->height);
return 0;
}
int create_link_mipi(struct decon_device *decon)
{
int i, ret = 0;
int n_pad = decon->n_sink_pad + decon->n_src_pad;
int flags = 0;
char err[80];
struct exynos_md *md = decon->mdev;
if (IS_ERR_OR_NULL(md->dsim_sd[decon->id])) {
decon_err("failed to get subdev of dsim%d\n", decon->id);
return -EINVAL;
}
flags = MEDIA_LNK_FL_ENABLED;
for (i = decon->n_sink_pad; i < n_pad ; i++) {
ret = media_entity_create_link(&decon->sd.entity, i,
&md->dsim_sd[decon->id]->entity, 0, flags);
if (ret) {
snprintf(err, sizeof(err), "%s --> %s",
decon->sd.entity.name,
decon->output_sd->entity.name);
return ret;
}
decon_info("%s[%d] --> [0]%s link is created successfully\n",
decon->sd.entity.name, i,
decon->output_sd->entity.name);
}
return ret;
}
int find_subdev_hdmi(struct decon_device *decon)
{
struct v4l2_subdev *output_sd;
output_sd = (struct v4l2_subdev *)module_name_to_driver_data("s5p-hdmi");
if (!output_sd) {
decon_err("failed to get hdmi device\n");
return -ENODEV;
}
decon->output_sd = output_sd;
decon->out_type = DECON_OUT_HDMI;
decon_info("%s entity get successfully\n", output_sd->name);
return 0;
}
void decon_int_set_clocks(struct decon_device *decon)
{
struct device *dev = decon->dev;
u32 clk_val_dpll = decon->pdata->disp_pll_clk;
u32 clk_val_vclk, clk_val_pclk, clk_val_eclk, clk_val_aclk;
if (!clk_val_dpll) {
decon_info("setting predefined clock values\n");
/* predefined values */
decon_clk_set_rate(dev, "disp_pll", 267 * MHZ);
decon_clk_set_rate(dev, "d_pclk_disp", 134 * MHZ);
decon_clk_set_parent(dev, "m_decon0_eclk", "disp_pll");
decon_clk_set_rate(dev, "d_decon0_eclk", 134 * MHZ);
decon_clk_set_parent(dev, "m_decon0_vclk", "disp_pll");
decon_clk_set_rate(dev, "d_decon0_vclk", 134 * MHZ);
} else {
clk_val_vclk = clk_val_dpll>>1;
clk_val_eclk = (clk_val_vclk * 12) / 10;
clk_val_aclk = clk_get_rate(decon->res.aclk_disp_200);
clk_val_pclk = clk_val_aclk>>1;
decon_info("setting pll to %dMHz\n", clk_val_dpll/MHZ);
decon_info("setting clk_val_vclk %dMHz\n", clk_val_vclk/MHZ);
decon_info("setting clk_val_eclk %dMHz\n", clk_val_eclk/MHZ);
decon_info("setting clk_val_aclk %dMHz\n", clk_val_aclk/MHZ);
decon_info("setting clk_val_pclk %dMHz\n", clk_val_pclk/MHZ);
/* values based on DT input */
decon_clk_set_rate(dev, "disp_pll", clk_val_dpll);
decon_clk_set_rate(dev, "d_pclk_disp", clk_val_pclk);
decon_clk_set_parent(dev, "m_decon0_eclk", "m_eclk_user");
decon_clk_set_parent(dev, "m_eclk_user_a",
"m_bus_pll_top_user");
decon_clk_set_rate(dev, "d_sclk_decon0_eclk", clk_val_eclk);
decon_clk_set_rate(dev, "d_decon0_eclk", clk_val_eclk);
decon_clk_set_parent(dev, "m_decon0_vclk", "disp_pll");
decon_clk_set_rate(dev, "d_decon0_vclk", clk_val_vclk);
}
}
