static irqreturn_t arizona_thermal_shutdown(int irq, void *data)
{
struct arizona *arizona = data;
unsigned int val;
int ret;
ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
&val);
if (ret != 0) {
dev_err(arizona->dev, "Failed to read thermal status: %d\n",
ret);
} else if (val & ARIZONA_SPK_SHUTDOWN_STS) {
dev_crit(arizona->dev, "Thermal shutdown\n");
ret = regmap_update_bits(arizona->regmap,
ARIZONA_OUTPUT_ENABLES_1,
ARIZONA_OUT4L_ENA |
ARIZONA_OUT4R_ENA, 0);
if (ret != 0)
dev_crit(arizona->dev,
"Failed to disable speaker outputs: %d\n",
ret);
}
return IRQ_HANDLED;
}
static void tas5720_fault_check_work(struct work_struct *work)
{
struct tas5720_data *tas5720 = container_of(work, struct tas5720_data,
fault_check_work.work);
struct device *dev = tas5720->codec->dev;
unsigned int curr_fault;
int ret;
ret = regmap_read(tas5720->regmap, TAS5720_FAULT_REG, &curr_fault);
if (ret < 0) {
dev_err(dev, "failed to read FAULT register: %d\n", ret);
goto out;
}
/* Check/handle all errors except SAIF clock errors */
curr_fault &= TAS5720_OCE | TAS5720_DCE | TAS5720_OTE;
/*
* Only flag errors once for a given occurrence. This is needed as
* the TAS5720 will take time clearing the fault condition internally
* during which we don't want to bombard the system with the same
* error message over and over.
*/
if ((curr_fault & TAS5720_OCE) && !(tas5720->last_fault & TAS5720_OCE))
dev_crit(dev, "experienced an over current hardware fault\n");
if ((curr_fault & TAS5720_DCE) && !(tas5720->last_fault & TAS5720_DCE))
dev_crit(dev, "experienced a DC detection fault\n");
if ((curr_fault & TAS5720_OTE) && !(tas5720->last_fault & TAS5720_OTE))
dev_crit(dev, "experienced an over temperature fault\n");
/* Store current fault value so we can detect any changes next time */
tas5720->last_fault = curr_fault;
if (!curr_fault)
goto out;
/*
* Periodically toggle SDZ (shutdown bit) H->L->H to clear any latching
* faults as long as a fault condition persists. Always going through
* the full sequence no matter the first return value to minimizes
* chances for the device to end up in shutdown mode.
*/
ret = regmap_write_bits(tas5720->regmap, TAS5720_POWER_CTRL_REG,
TAS5720_SDZ, 0);
if (ret < 0)
dev_err(dev, "failed to write POWER_CTRL register: %d\n", ret);
ret = regmap_write_bits(tas5720->regmap, TAS5720_POWER_CTRL_REG,
TAS5720_SDZ, TAS5720_SDZ);
if (ret < 0)
dev_err(dev, "failed to write POWER_CTRL register: %d\n", ret);
out:
/* Schedule the next fault check at the specified interval */
schedule_delayed_work(&tas5720->fault_check_work,
msecs_to_jiffies(TAS5720_FAULT_CHECK_INTERVAL));
}
/**
* omap_prev2resz_init - Initialization of device
*/
static int __init omap_prev2resz_init(void)
{
int ret;
p2r_major = register_chrdev(0, OMAP_PREV2RESZ_NAME, &dev_fops);
/* register driver as a platform driver */
ret = platform_driver_register(&omap_prev2resz_driver);
if (ret) {
dev_crit(p2r_device, "failed to register platform driver!\n");
goto drv_fail;
}
/* Register the drive as a platform device */
ret = platform_device_register(&omap_prev2resz_device);
if (ret) {
dev_crit(p2r_device, "failed to register platform device!\n");
goto dev_fail;
}
p2r_class = class_create(THIS_MODULE, OMAP_PREV2RESZ_NAME);
if (!p2r_class) {
dev_crit(p2r_device, "Failed to create class!\n");
goto cls_fail;
}
/* make entry in the devfs */
p2r_device = device_create(p2r_class, p2r_device,
MKDEV(p2r_major, 0), NULL,
OMAP_PREV2RESZ_NAME);
p2r_ctx.vbq_ops.buf_setup = prev2resz_vbq_setup;
p2r_ctx.vbq_ops.buf_prepare = prev2resz_vbq_prepare;
p2r_ctx.vbq_ops.buf_release = prev2resz_vbq_release;
p2r_ctx.vbq_ops.buf_queue = prev2resz_vbq_queue;
p2r_ctx.opened = 0;
return 0;
cls_fail:
platform_device_unregister(&omap_prev2resz_device);
dev_fail:
platform_driver_unregister(&omap_prev2resz_driver);
drv_fail:
unregister_chrdev(p2r_major, OMAP_PREV2RESZ_NAME);
return ret;
}
static int watchdog_release(struct inode *inode, struct file *file)
{
struct watchdog_device *wdd = file->private_data;
int err = -EBUSY;
/*
* We only stop the watchdog if we received the magic character
* or if WDIOF_MAGICCLOSE is not set. If nowayout was set then
* watchdog_stop will fail.
*/
if (test_and_clear_bit(WDOG_ALLOW_RELEASE, &wdd->status) ||
!(wdd->info->options & WDIOF_MAGICCLOSE))
err = watchdog_stop(wdd);
/* If the watchdog was not stopped, send a keepalive ping */
if (err < 0) {
mutex_lock(&wdd->lock);
if (!test_bit(WDOG_UNREGISTERED, &wdd->status))
dev_crit(wdd->dev, "watchdog did not stop!\n");
mutex_unlock(&wdd->lock);
watchdog_ping(wdd);
}
/* Allow the owner module to be unloaded again */
module_put(wdd->ops->owner);
/* make sure that /dev/watchdog can be re-opened */
clear_bit(WDOG_DEV_OPEN, &wdd->status);
/* Note wdd may be gone after this, do not use after this! */
if (wdd->ops->unref)
wdd->ops->unref(wdd);
return 0;
}
static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
{
struct snd_soc_codec *codec = w->codec;
struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
int val;
switch (event) {
case SND_SOC_DAPM_POST_PMU:
val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3);
if (val & ARIZONA_SPK_SHUTDOWN_STS) {
dev_crit(arizona->dev,
"Speaker not enabled due to temperature\n");
return -EBUSY;
}
snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
1 << w->shift, 1 << w->shift);
break;
case SND_SOC_DAPM_PRE_PMD:
snd_soc_update_bits(codec, ARIZONA_OUTPUT_ENABLES_1,
1 << w->shift, 0);
break;
}
return 0;
}
static int __cold oh_free_pcd_fqids(struct device *dev, uint32_t base_fqid)
{
dev_crit(dev, "callback not implemented!\n");
BUG();
return 0;
}
/*
* Work Around for Errata i202 (2430, 3430, 3630, 4430 and 4460)
* The access to uart register after MDR1 Access
* causes UART to corrupt data.
*
* Need a delay =
* 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS)
* give 10 times as much
*/
static void omap_8250_mdr1_errataset(struct uart_8250_port *up,
struct omap8250_priv *priv)
{
u8 timeout = 255;
u8 old_mdr1;
old_mdr1 = serial_in(up, UART_OMAP_MDR1);
if (old_mdr1 == priv->mdr1)
return;
serial_out(up, UART_OMAP_MDR1, priv->mdr1);
udelay(2);
serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT |
UART_FCR_CLEAR_RCVR);
/*
* Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
* TX_FIFO_E bit is 1.
*/
while (UART_LSR_THRE != (serial_in(up, UART_LSR) &
(UART_LSR_THRE | UART_LSR_DR))) {
timeout--;
if (!timeout) {
/* Should *never* happen. we warn and carry on */
dev_crit(up->port.dev, "Errata i202: timedout %x\n",
serial_in(up, UART_LSR));
break;
}
udelay(1);
}
}
static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
{
u8 timeout = 255;
printk("serial_omap_mdr1_errataser start\n");
serial_out(up, UART_OMAP_MDR1, mdr1);
rtdm_task_sleep(2000);
serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
/*
* Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and
* TX_FIFO_E bit is 1.
*/
while (UART_LSR_THRE != (serial_in(up, UART_LSR) & (UART_LSR_THRE | UART_LSR_DR)))
{
timeout--;
if (!timeout)
{
/* Should *never* happen. we warn and carry on */
dev_crit(up->dev, "Errata i202: timedout %x\n",serial_in(up, UART_LSR));
break;
}
rtdm_task_sleep(1000);
}
printk("serial_omap_mdr1_errataser end\n");
}
/**
* ks8695_reset - Reset a KS8695 ethernet interface
* @ksp: The interface to reset
*
* Perform an engine reset of the interface and re-program it
* with sensible defaults.
*/
static void
ks8695_reset(struct ks8695_priv *ksp)
{
int reset_timeout = watchdog;
/* Issue the reset via the TX DMA control register */
ks8695_writereg(ksp, KS8695_DTXC, DTXC_TRST);
while (reset_timeout--) {
if (!(ks8695_readreg(ksp, KS8695_DTXC) & DTXC_TRST))
break;
msleep(1);
}
if (reset_timeout == 0) {
dev_crit(ksp->dev,
"Timeout waiting for DMA engines to reset\n");
/* And blithely carry on */
}
/* Definitely wait long enough before attempting to program
* the engines
*/
msleep(10);
/* RX: unicast and broadcast */
ks8695_writereg(ksp, KS8695_DRXC, DRXC_RU | DRXC_RB);
/* TX: pad and add CRC */
ks8695_writereg(ksp, KS8695_DTXC, DTXC_TEP | DTXC_TAC);
}
static void gpio_wdt_hwping(unsigned long data)
{
struct watchdog_device *wdd = (struct watchdog_device *)data;
struct gpio_wdt_priv *priv = watchdog_get_drvdata(wdd);
if (priv->armed && time_after(jiffies, priv->last_jiffies +
msecs_to_jiffies(wdd->timeout * 1000))) {
dev_crit(wdd->parent,
"Timer expired. System will reboot soon!\n");
return;
}
/* Restart timer */
mod_timer(&priv->timer, jiffies + priv->hw_margin);
switch (priv->hw_algo) {
case HW_ALGO_TOGGLE:
/* Toggle output pin */
priv->state = !priv->state;
gpio_set_value_cansleep(priv->gpio, priv->state);
break;
case HW_ALGO_LEVEL:
/* Pulse */
gpio_set_value_cansleep(priv->gpio, !priv->active_low);
udelay(1);
gpio_set_value_cansleep(priv->gpio, priv->active_low);
break;
}
}
/* Allocation code for the OH port's PCD frame queues */
static int __cold oh_alloc_pcd_fqids(struct device *dev,
uint32_t num,
uint8_t alignment,
uint32_t *base_fqid)
{
dev_crit(dev, "callback not implemented!\n");
BUG();
return 0;
}
static int gsc_sysmmu_m2m_fault_handler(struct iommu_domain *domain,
struct device *dev, unsigned long fault_addr,
int fault_flags, void *p)
{
struct gsc_ctx *ctx = p;
dev_crit(dev, "System MMU fault while M2M ---------\n");
gsc_hw_dump_regs(ctx->gsc_dev->regs);
return 0;
}
/*
* TWL4030 BCI monitoring events
*/
static irqreturn_t twl4030_bci_interrupt(int irq, void *arg)
{
struct twl4030_bci *bci = arg;
u8 irqs1, irqs2;
int ret;
ret = twl_i2c_read_u8(TWL4030_MODULE_INTERRUPTS, &irqs1,
TWL4030_INTERRUPTS_BCIISR1A);
if (ret < 0)
return IRQ_HANDLED;
ret = twl_i2c_read_u8(TWL4030_MODULE_INTERRUPTS, &irqs2,
TWL4030_INTERRUPTS_BCIISR2A);
if (ret < 0)
return IRQ_HANDLED;
dev_dbg(bci->dev, "BCI irq %02x %02x\n", irqs2, irqs1);
if (irqs1 & (TWL4030_ICHGLOW | TWL4030_ICHGEOC)) {
/* charger state change, inform the core */
power_supply_changed(&bci->ac);
power_supply_changed(&bci->usb);
}
/* various monitoring events, for now we just log them here */
if (irqs1 & (TWL4030_TBATOR2 | TWL4030_TBATOR1))
dev_warn(bci->dev, "battery temperature out of range\n");
if (irqs1 & TWL4030_BATSTS)
dev_crit(bci->dev, "battery disconnected\n");
if (irqs2 & TWL4030_VBATOV)
dev_crit(bci->dev, "VBAT overvoltage\n");
if (irqs2 & TWL4030_VBUSOV)
dev_crit(bci->dev, "VBUS overvoltage\n");
if (irqs2 & TWL4030_ACCHGOV)
dev_crit(bci->dev, "Ac charger overvoltage\n");
return IRQ_HANDLED;
}
static irqreturn_t wm831x_syslo_irq(int irq, void *data)
{
struct wm831x_power *wm831x_power = data;
struct wm831x *wm831x = wm831x_power->wm831x;
/* Not much we can actually *do* but tell people for
* posterity, we're probably about to run out of power. */
dev_crit(wm831x->dev, "SYSVDD under voltage\n");
return IRQ_HANDLED;
}
static int wdt_ping(struct watchdog_device *wd)
{
struct device *dev = watchdog_get_drvdata(wd);
int ret;
ret = wdt_command(SCU_WATCHDOG_KEEPALIVE, NULL, 0);
if (ret)
dev_crit(dev, "Error executing keepalive: %d\n", ret);
return ret;
}
irqreturn_t cxl_slice_irq_err(int irq, void *data)
{
struct cxl_afu *afu = data;
u64 fir_slice, errstat, serr, afu_debug;
WARN(irq, "CXL SLICE ERROR interrupt %i\n", irq);
serr = cxl_p1n_read(afu, CXL_PSL_SERR_An);
fir_slice = cxl_p1n_read(afu, CXL_PSL_FIR_SLICE_An);
errstat = cxl_p2n_read(afu, CXL_PSL_ErrStat_An);
afu_debug = cxl_p1n_read(afu, CXL_AFU_DEBUG_An);
dev_crit(&afu->dev, "PSL_SERR_An: 0x%.16llx\n", serr);
dev_crit(&afu->dev, "PSL_FIR_SLICE_An: 0x%.16llx\n", fir_slice);
dev_crit(&afu->dev, "CXL_PSL_ErrStat_An: 0x%.16llx\n", errstat);
dev_crit(&afu->dev, "CXL_PSL_AFU_DEBUG_An: 0x%.16llx\n", afu_debug);
cxl_p1n_write(afu, CXL_PSL_SERR_An, serr);
return IRQ_HANDLED;
}
static irqreturn_t wm831x_syslo_irq(int irq, void *data)
{
struct wm831x_power *wm831x_power = data;
struct wm831x *wm831x = wm831x_power->wm831x;
/* Not much we can actually *do* but tell people for
* posterity, we're probably about to run out of power. */
dev_crit(wm831x->dev, "SYSVDD under voltage and wake lock 60s\n");
wake_lock_timeout(&wm831x_power->syslo_wake,60*HZ);//wait for android closing system
return IRQ_HANDLED;
}
static irqreturn_t cxl_irq_err(int irq, void *data)
{
struct cxl *adapter = data;
u64 fir1, fir2, err_ivte;
WARN(1, "CXL ERROR interrupt %i\n", irq);
err_ivte = cxl_p1_read(adapter, CXL_PSL_ErrIVTE);
dev_crit(&adapter->dev, "PSL_ErrIVTE: 0x%.16llx\n", err_ivte);
dev_crit(&adapter->dev, "STOPPING CXL TRACE\n");
cxl_stop_trace(adapter);
fir1 = cxl_p1_read(adapter, CXL_PSL_FIR1);
fir2 = cxl_p1_read(adapter, CXL_PSL_FIR2);
dev_crit(&adapter->dev, "PSL_FIR1: 0x%.16llx\nPSL_FIR2: 0x%.16llx\n", fir1, fir2);
return IRQ_HANDLED;
}
static int wdt_stop(struct watchdog_device *wd)
{
struct device *dev = watchdog_get_drvdata(wd);
int ret;
ret = wdt_command(SCU_WATCHDOG_STOP, NULL, 0);
if (ret)
dev_crit(dev, "Error stopping watchdog: %d\n", ret);
return ret;
}
static void imx2_wdt_shutdown(struct platform_device *pdev)
{
if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
/* we are running, we need to delete the timer but will give
* max timeout before reboot will take place */
del_timer_sync(&imx2_wdt.timer);
imx2_wdt_set_timeout(IMX2_WDT_MAX_TIME);
imx2_wdt_ping();
dev_crit(imx2_wdt_miscdev.parent,
"Device shutdown: Expect reboot!\n");
}
}
static int imx2_wdt_close(struct inode *inode, struct file *file)
{
if (test_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status) && !nowayout)
imx2_wdt_stop();
else {
dev_crit(imx2_wdt_miscdev.parent,
"Unexpected close: Expect reboot!\n");
imx2_wdt_ping();
}
clear_bit(IMX2_WDT_EXPECT_CLOSE, &imx2_wdt.status);
clear_bit(IMX2_WDT_STATUS_OPEN, &imx2_wdt.status);
return 0;
}
static void gemini_poweroff(void)
{
struct gemini_powercon *gpw = gpw_poweroff;
u32 val;
dev_crit(gpw->dev, "Gemini power off\n");
val = readl(gpw->base + GEMINI_PWC_CTRLREG);
val |= GEMINI_CTRL_ENABLE | GEMINI_CTRL_IRQ_CLR;
writel(val, gpw->base + GEMINI_PWC_CTRLREG);
val &= ~GEMINI_CTRL_ENABLE;
val |= GEMINI_CTRL_SHUTDOWN;
writel(val, gpw->base + GEMINI_PWC_CTRLREG);
}
static int nuc900_wdt_close(struct inode *inode, struct file *file)
{
if (nuc900_wdt->expect_close == 42)
nuc900_wdt_stop();
else {
dev_crit(&nuc900_wdt->pdev->dev,
"Unexpected close, not stopping watchdog!\n");
nuc900_wdt_ping();
}
nuc900_wdt->expect_close = 0;
clear_bit(0, &nuc900wdt_busy);
return 0;
}
static int __exit imx2_wdt_remove(struct platform_device *pdev)
{
misc_deregister(&imx2_wdt_miscdev);
if (test_bit(IMX2_WDT_STATUS_STARTED, &imx2_wdt.status)) {
del_timer_sync(&imx2_wdt.timer);
dev_crit(imx2_wdt_miscdev.parent,
"Device removed: Expect reboot!\n");
}
imx2_wdt_miscdev.parent = NULL;
return 0;
}
static irqreturn_t coh901327_interrupt(int irq, void *data)
{
u16 val;
clk_enable(clk);
val = readw(virtbase + U300_WDOG_IER);
if (val == U300_WDOG_IER_WILL_BARK_IRQ_EVENT_IND)
writew(U300_WDOG_IER_WILL_BARK_IRQ_ACK_ENABLE,
virtbase + U300_WDOG_IER);
writew(0x0000U, virtbase + U300_WDOG_IMR);
clk_disable(clk);
dev_crit(parent, "watchdog is barking!\n");
return IRQ_HANDLED;
}
static irqreturn_t hisi_thermal_alarm_irq_thread(int irq, void *dev)
{
struct hisi_thermal_data *data = dev;
struct hisi_thermal_sensor *sensor = &data->sensor;
int temp = 0;
data->irq_handler(data);
hisi_thermal_get_temp(data, &temp);
if (temp >= sensor->thres_temp) {
dev_crit(&data->pdev->dev, "THERMAL ALARM: %d > %d\n",
temp, sensor->thres_temp);
thermal_zone_device_update(data->sensor.tzd,
THERMAL_EVENT_UNSPECIFIED);
} else {
dev_crit(&data->pdev->dev, "THERMAL ALARM stopped: %d < %d\n",
temp, sensor->thres_temp);
}
return IRQ_HANDLED;
}
static irqreturn_t wm831x_bat_irq(int irq, void *data)
{
struct wm831x_power *wm831x_power = data;
struct wm831x *wm831x = wm831x_power->wm831x;
int irq0;
irq0 = wm831x->irq_base + WM831X_IRQ_CHG_BATT_HOT + 1;
dev_crit(wm831x->dev, "battery changed: i=%d\n", irq-irq0);
/* The battery charger is autonomous so we don't need to do
* anything except kick user space */
power_supply_changed(&wm831x_power->battery);
return IRQ_HANDLED;
}
/*
* Close the watchdog device.
*/
static int ms6_wdt_release(struct inode *inode, struct file *file)
{
if (test_bit(WDT_OK_TO_CLOSE, &ms6_data.status)) {
del_timer_sync(&ms6_data.timer);
wdt_disable();
}
else {
dev_crit(&ms6_data.client->dev, "Device closed unexpectedly - timer will not stop\n");
}
clear_bit(WDT_IN_USE, &ms6_data.status);
clear_bit(WDT_OK_TO_CLOSE, &ms6_data.status);
return 0;
}
/*
* The open implementation.
*/
static int kern_open(struct inode *inode, struct file *filp)
{
/* you can use dev_printk like you would printk only with the
added device... */
dev_printk(KERN_DEBUG, my_device, "this is my debug message");
/* or better yet, use the predefined ones: */
dev_emerg(my_device, "emergency");
dev_alert(my_device, "alert");
dev_crit(my_device, "critical");
dev_err(my_device, "error");
dev_warn(my_device, "warning");
dev_notice(my_device, "notice");
dev_info(my_device, "info");
return 0;
}
static irqreturn_t arizona_thermal_warn(int irq, void *data)
{
struct arizona *arizona = data;
unsigned int val;
int ret;
ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
&val);
if (ret != 0) {
dev_err(arizona->dev, "Failed to read thermal status: %d\n",
ret);
} else if (val & ARIZONA_SPK_SHUTDOWN_WARN_STS) {
dev_crit(arizona->dev, "Thermal warning\n");
}
return IRQ_HANDLED;
}
